Add a test to verify that FPU registers are properly saved and restored on context switches.
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4421 42af7a65-404d-4744-a932-0658087f49c3
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@ -68,6 +68,10 @@ ifeq ($(CONFIG_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CSRCS += up_ostest.c
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endif
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COBJS = $(CSRCS:.c=$(OBJEXT))
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SRCS = $(ASRCS) $(CSRCS)
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142
configs/stm3240g-eval/src/up_ostest.c
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142
configs/stm3240g-eval/src/up_ostest.c
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@ -0,0 +1,142 @@
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/************************************************************************************
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* configs/stm3240g-eval/src/up_ostest.c
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* arch/arm/src/board/up_ostest.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <debug.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "stm3240g-internal.h"
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#undef HAVE_FPU
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#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \
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defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \
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!defined(CONFIG_ARMV7M_CMNVECTOR)
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# define HAVE_FPU 1
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#endif
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#ifdef HAVE_FPU
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#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
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# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
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#endif
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/* Given a uint8_t array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this
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* function will return the current FPU registers.
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*/
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void arch_getfpu(FAR uint8_t *fpusave)
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{
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irqstate_t flags;
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uint32_t regs[XCPTCONTEXT_REGS];
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flags = irqsave();
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up_savefpu(regs);
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irqrestore(flags);
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memcpy(fpusave, ®s[REG_S0], (4*SW_FPU_REGS));
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}
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/* Given a uint8_t array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this
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* function will set the current FPU regisers to match the provided
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* register save set.
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*/
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void arch_setfpu(FAR const uint8_t *fpusave)
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{
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irqstate_t flags;
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uint32_t regs[XCPTCONTEXT_REGS];
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memcpy(®s[REG_S0], fpusave, (4*SW_FPU_REGS));
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flags = irqsave();
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up_restorefpu(regs);
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irqrestore(flags);
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}
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/* Given a uint8_t array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE and a
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* seed value, this function will set the FPU registers to a known
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* values for testing purposes. The contents of the FPU registers
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* must be uniqe for each sed value.
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*/
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void arch_initfpu(FAR uint8_t *fpusave, int seed)
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{
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FAR uint32_t *dest = (FAR uint32_t *)fpusave;
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uint32_t mask = 0x01010101;
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uint32_t incr = 0x01010101;
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int i;
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for (i = 0; i < 32; i++)
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{
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*dest = (uint32_t)seed ^ mask;
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mask += incr;
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}
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}
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/* Given two uint8_t arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this
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* function will compare then an return true if they are identical.
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*/
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bool arch_cmpfpu(FAR const uint8_t *fpusave1, FAR const uint8_t *fpusave2)
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{
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return memcmp(fpusave1, fpusave2, (4*32)) == 0;
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}
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#endif /* HAVE_FPU */
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