sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Add frame for EFM32 GPIO logic (empty functions)

Browse Source
This commit is contained in:
Gregory Nutt 2014-10-18 18:40:08 -06:00
parent 7075a83ed7
commit c82488f1a0
5 changed files with 240 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/src/efm32/Kconfig
View File

@ -142,4 +142,10 @@ config EFM32_LEUART1
select EFM32_UART
endmenu # EFM32 Peripheral Support
config EFM32_GPIO_IRQ
bool "GPIO pin interrupts"
---help---
Enable support for interrupting GPIO pins
endif # ARCH_CHIP_EFM32

6
arch/arm/src/efm32/Make.defs
View File

@ -95,8 +95,12 @@ CHIP_ASRCS += efm32_vectors.S
endif
CHIP_CSRCS = efm32_start.c efm32_clockconfig.c efm32_irq.c efm32_timerisr.c
CHIP_CSRCS += efm32_lowputc.c
CHIP_CSRCS += efm32_gpio.c efm32_lowputc.c
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CHIP_CSRCS += efm32_idle.c
endif
ifeq ($(CONFIG_EFM32_GPIO_IRQ),y)
CHIP_CSRCS += efm32_gpioirq.c
endif

115
arch/arm/src/efm32/efm32_gpio.c Normal file
View File

@ -0,0 +1,115 @@
/************************************************************************************
* arch/arm/src/efm32/efm32_gpio.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include "efm32_gpio.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: efm32_configgpio
*
* Description:
* Configure a PIO pin based on bit-encoded description of the pin.
*
************************************************************************************/
int efm32_configgpio(gpio_pinset_t cfgset)
{
#warning Missing logic
return -ENOSYS;
}
/************************************************************************************
* Name: efm32_gpiowrite
*
* Description:
* Write one or zero to the selected PIO pin
*
************************************************************************************/
void efm32_gpiowrite(gpio_pinset_t pinset, bool value)
{
#warning Missing logic
}
/************************************************************************************
* Name: efm32_gpioread
*
* Description:
* Read one or zero from the selected PIO pin
*
************************************************************************************/
bool efm32_gpioread(gpio_pinset_t pinset)
{
#warning Missing logic
return false;
}
/************************************************************************************
* Function: efm32_dumpgpio
*
* Description:
* Dump all PIO registers associated with the base address of the provided pinset.
*
************************************************************************************/
#ifdef CONFIG_DEBUG_GPIO
int efm32_dumpgpio(uint32_t pinset, const char *msg)
{
#warning Missing logic
return -ENOSYS;
}
#endif

113
arch/arm/src/efm32/efm32_gpioirq.c Normal file
View File

@ -0,0 +1,113 @@
/************************************************************************************
* arch/arm/src/efm32/efm32_gpioirq.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include "efm32_gpio.h"
#ifdef CONFIG_EFM32_GPIO_IRQ
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: efm32_gpioirqinitialize
*
* Description:
* Initialize logic to support a second level of interrupt decoding for PIO pins.
*
************************************************************************************/
void efm32_gpioirqinitialize(void)
{
#warning Missing logic
}
/************************************************************************************
* Name: efm32_gpioirq
*
* Description:
* Configure an interrupt for the specified PIO pin.
*
************************************************************************************/
void efm32_gpioirq(gpio_pinset_t pinset)
{
#warning Missing logic
}
/************************************************************************************
* Name: efm32_gpioirqenable
*
* Description:
* Enable the interrupt for specified PIO IRQ
*
************************************************************************************/
void efm32_gpioirqenable(int irq)
{
#warning Missing logic
}
/************************************************************************************
* Name: efm32_gpioirqdisable
*
* Description:
* Disable the interrupt for specified PIO IRQ
*
************************************************************************************/
void efm32_gpioirqdisable(int irq)
{
#warning Missing logic
}
#endif /* CONFIG_EFM32_GPIO_IRQ */

1
configs/efm32-g8xx-stk/nsh/defconfig
View File

@ -146,6 +146,7 @@ CONFIG_EFM32_UART0=y
# CONFIG_EFM32_UART1 is not set
# CONFIG_EFM32_LEUART0 is not set
# CONFIG_EFM32_LEUART1 is not set
CONFIG_EFM32_GPIO_IRQ=y
#
# Architecture Options