xtensa:kconfig: move ARCH_HAVE_TESTSET config to chip
Some xtensa arch have not implentment testset instructions Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
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c833048484
@ -107,7 +107,6 @@ config ARCH_XTENSA
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select ARCH_HAVE_INTERRUPTSTACK
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select ARCH_HAVE_INTERRUPTSTACK
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select ARCH_HAVE_STACKCHECK
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select ARCH_HAVE_STACKCHECK
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select ARCH_HAVE_CUSTOMOPT
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select ARCH_HAVE_CUSTOMOPT
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select ARCH_HAVE_TESTSET
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select ARCH_HAVE_STDARG_H
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select ARCH_HAVE_STDARG_H
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select ARCH_HAVE_SETJMP if ARCH_TOOLCHAIN_GNU
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select ARCH_HAVE_SETJMP if ARCH_TOOLCHAIN_GNU
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select ARCH_HAVE_SYSCALL_HOOKS
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select ARCH_HAVE_SYSCALL_HOOKS
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@ -18,6 +18,7 @@ config ARCH_CHIP_ESP32
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_RESET
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select ARCH_HAVE_RESET
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_TESTSET
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select ARCH_VECNOTIRQ
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select ARCH_VECNOTIRQ
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCHR
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select LIBC_ARCH_MEMCHR
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@ -51,6 +52,7 @@ config ARCH_CHIP_ESP32S2
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_RESET
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select ARCH_HAVE_RESET
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_TESTSET
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select ARCH_VECNOTIRQ
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select ARCH_VECNOTIRQ
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCHR
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select LIBC_ARCH_MEMCHR
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@ -79,6 +81,7 @@ config ARCH_CHIP_ESP32S3
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_SDRAM
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select ARCH_HAVE_RESET
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select ARCH_HAVE_RESET
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_BOOTLOADER
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select ARCH_HAVE_TESTSET
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select ARCH_VECNOTIRQ
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select ARCH_VECNOTIRQ
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCHR
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select LIBC_ARCH_MEMCHR
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