SAML21: Add configuration logic and placeholders for memory man and pin configruation header files

This commit is contained in:
Gregory Nutt 2015-05-14 14:02:50 -06:00
parent 14d6d059ac
commit c84eb2f9fb
7 changed files with 646 additions and 6 deletions

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@ -253,6 +253,13 @@
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
#else
# undef SAMD20 /* Not SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# undef SAMD20J
#endif
/* SAMD20 Peripherals */
@ -261,47 +268,357 @@
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 6 /* 6 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMA 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 4 /* 4 SERCOM */
# define SAMDL_NADC 10 /* 10 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 10 /* PTC X */
# define SAMDL_NPTCY 6 /* PTC Y */
# define SAMDL_WDT /* Have watchdog timer */
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20G)
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 6 /* 6 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMA 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NADC 15 /* 14 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 12 /* PTC X */
# define SAMDL_NPTCY 10 /* PTC Y */
# define SAMDL_WDT /* Have watchdog timer */
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20J)
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 8 /* 8 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMA 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NADC 20 /* 20 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 16 /* PTC X */
# define SAMDL_NPTCY 16 /* PTC Y */
# define SAMDL_WDT /* Have watchdog timer */
# define SAMDL_WDT 1 /* Have watchdog timer */
#endif
/* SAML21 Family ********************************************************************/
/* FEATURE SAM D21J SAM D21G SAM D21E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64KB 256/128/64KB 256/128/64/32KB
* Flash RWW 8/4/2KB 8/4/2KB 8/4/2/1KB
* SRAM 32/16/8KB 32/16/8KB 32/16/8/4KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 12 12 12
* Timer/counters 5 3 3
* TC output channels 2 2 2
* T/C Control 3 3 3
* TCC output channels 2 2 2
* TCC waveform output 8/4/2 8/4/2 6/4/2
* DMA channels 16 16 16
* USB interface 1 1 1
* AES engine 1 1 1
* CCLs 4 4 4
* TRNG 1 1 1
* SERCOM 6 6 4
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 2 2 2
* OPAMP 3 3 3
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 12x16 8x12 6x10
* 16x12 12x8 10x6
* Packages QFN/TQFP QFN/TQFP QFN/TQFP
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC16M, DFLL48M, and FDPLL96M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAML21E15)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_FLASHRWW_SIZE (1*1024) /* 1KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E16)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E17)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E18)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 6 /* 6 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 8 /* 8 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC wavefor outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 8 /* 8 TCC wavefor outputs */
#else
# undef SAML21 /* Not SAML21 family */
# undef SAML21E
# undef SAML21G
# undef SAML21J
#endif
#if defined(SAML21E)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMA 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 4 /* 4 SERCOM */
# define SAMDL_NADC 10 /* 10 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 10 /* PTC X 6 or 10 */
# define SAMDL_NPTCY 10 /* PTC Y 6 or 10*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAML21G)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMA 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NADC 14 /* 14 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 12 /* PTC X 8 or 12 */
# define SAMDL_NPTCY 12 /* PTC Y 8 or 12*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAML21J)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 5 /* 5 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMA 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NADC 20 /* 20 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 16 /* PTC X 12 or 16 */
# define SAMDL_NPTCY 16 /* PTC Y 12 or 16*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#endif
/* NVIC priority levels *************************************************************/

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@ -131,11 +131,94 @@ config ARCH_CHIP_SAMD20J18
---help---
Flash 256KB SRAM 32KB
config ARCH_CHIP_SAML21E15
bool "SAML21E15"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21E
---help---
Flash 32KB SRAM 4KB
config ARCH_CHIP_SAML21E16
bool "SAML21E16"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21E
---help---
Flash 64KB SRAM 8KB
config ARCH_CHIP_SAML21E17
bool "SAML21E17"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21E
---help---
Flash 128KB SRAM 16KB
config ARCH_CHIP_SAML21E18
bool "SAML21E18"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21E
---help---
Flash 256KB SRAM 32KB
config ARCH_CHIP_SAML21G16
bool "SAML21G16"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21G
---help---
Flash 64KB SRAM 4KB
config ARCH_CHIP_SAML21G17
bool "SAML21G17"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21G
---help---
Flash 128KB SRAM 16KB
config ARCH_CHIP_SAML21G18
bool "SAML21G18"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21G
---help---
Flash 256KB SRAM 32KB
config ARCH_CHIP_SAML21J16
bool "SAML21J16"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21J
---help---
Flash 64KB SRAM 4KB
config ARCH_CHIP_SAML21J17
bool "SAML21J17"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21J
---help---
Flash 128KB SRAM 16KB
config ARCH_CHIP_SAML21J18
bool "SAML21J18"
depends on ARCH_CHIP_SAML
select ARCH_FAMILY_SAML21
select ARCH_FAMILY_SAML21J
---help---
Flash 256KB SRAM 32KB
endchoice
config ARCH_FAMILY_SAMD20
bool
default n
select SAMDL_HAVE_TC2
select SAMDL_HAVE_TC3
select SAMDL_HAVE_TC5
config ARCH_FAMILY_SAMD20E
bool
@ -155,6 +238,29 @@ config ARCH_FAMILY_SAMD20J
select SAMDL_HAVE_TC6
select SAMDL_HAVE_TC7
config ARCH_FAMILY_SAML21
bool
default n
config ARCH_FAMILY_SAML21E
bool
default n
config ARCH_FAMILY_SAML21G
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
config ARCH_FAMILY_SAML21J
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMDL_HAVE_TC2
select SAMDL_HAVE_TC3
select SAMDL_HAVE_TC5
config SAMDL_HAVE_SERCOM4
bool
default n
@ -163,6 +269,18 @@ config SAMDL_HAVE_SERCOM5
bool
default n
config SAMDL_HAVE_TC5
bool
default n
config SAMDL_HAVE_TC2
bool
default n
config SAMDL_HAVE_TC3
bool
default n
config SAMDL_HAVE_TC6
bool
default n
@ -226,10 +344,12 @@ config SAMDL_TC1
config SAMDL_TC2
bool "Timer/Counter 2"
default n
depends on SAMDL_HAVE_TC2
config SAMDL_TC3
bool "Timer/Counter 3"
default n
depends on SAMDL_HAVE_TC3
config SAMDL_TC4
bool "Timer/Counter 4"
@ -238,6 +358,7 @@ config SAMDL_TC4
config SAMDL_TC5
bool "Timer/Counter 5"
default n
depends on SAMDL_HAVE_TC5
config SAMDL_TC6
bool "Timer/Counter 6"

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@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/samdl/chip/sam_memorymap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,6 +45,8 @@
#if defined(SAMD20)
# include "chip/samd20_memorymap.h"
#elif defined(SAML21)
# include "chip/saml21_memorymap.h"
#else
# error Unrecognized SAMD/L architecture
#endif

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@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/samdl/chip/sam_pinmap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,6 +45,9 @@
#if defined(SAMD20)
# include "chip/samd20_pinmap.h"
#elif defined(SAML21)
# include "chip/saml21_pinmap.h"
#else
#else
# error Unrecognized SAMD/L architecture
#endif

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@ -193,7 +193,7 @@
#define PORT_GCLK_IO7_1 (PORT_FUNCH | PORTA | PORT_PIN23)
#define PORT_GCLK_IO7_2 (PORT_FUNCH | PORTB | PORT_PIN13)
/* No maskable interrupt */
/* Non maskable interrupt */
#define PORT_NMI (PORT_FUNCA | PORTA | PORT_PIN8)

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@ -0,0 +1,81 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml21_memorymap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* "Atmel SAM L21E / SAM L21G / SAM L21J Smart ARM-Based Microcontroller
* Datasheet", Ateml-42385C-SAML21_Datasheet_Preliminary-03/20/15
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* System Memory Map */
/* Calibration and Auxiliary Space */
/* AHB-APB Bridge A */
/* AHB-APB Bridge B */
/* AHB-APB Bridge C */
/********************************************************************************************
* Public Types
********************************************************************************************/
/********************************************************************************************
* Public Data
********************************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H */

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@ -0,0 +1,116 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd20_pinmap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* "Atmel SAM L21E / SAM L21G / SAM L21J Smart ARM-Based Microcontroller
* Datasheet", Ateml-42385C-SAML21_Datasheet_Preliminary-03/20/15
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* GPIO pin definitions *********************************************************************/
/* Alternate Pin Functions.
*
* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
* Drivers, however, will use the pin selection without the numeric suffix.
* Additional definitions are required in the board.h file. For example, if we
* wanted the SERCOM0 PAD0 on PA8, then the following definition should appear in
* the board.h header file for that board:
*
* #define PORT_SERCOM0_PAD0 PORT_SERCOM0_PAD0_1
*
* The driver will then automatically configure PA8 as the SERCOM0 PAD0 pin.
*/
/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
* Additional effort is required to select specific GPIO options such as frequency,
* open-drain/push-pull, and pull-up/down! Just the basics are defined for most
* pins in this file.
*/
/* Analog comparator */
/* ADC voltage references */
/* DAC */
/* External interrupts */
/* Generic clock controller I/O */
/* Non maskable interrupt */
/* Serial communication interface (SERCOM) */
/* JTAG/SWI */
/* Timer/Counters */
/* Peripheral touch controller */
/********************************************************************************************
* Public Types
********************************************************************************************/
/********************************************************************************************
* Public Data
********************************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H */