arm64/a64: Add driver for Reduced Serial Bus
This PR adds the driver for Reduced Serial Bus (RSB) on Allwinner A64 SoC. The RSB Driver will be called by the upcoming Power Mgmt IC Driver for PINE64 PinePhone, to power on the LCD Display. `arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > RSB" (`CONFIG_A64_RSB`), which enables the RSB Driver `arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for RSB `arch/arm64/src/a64/Make.defs`: Added the RSB Driver to the Makefile `arch/arm64/src/a64/a64_de.c`: Increase PLL Timeout for Allwinner A64 Display Engine `boards/arm64/a64/pinephone/configs/nsh/defconfig`: Set PinePhone Board Config `CONFIG_BOARD_LOOPSPERMSEC` to the value computed by `calib_udelay` `arch/arm64/src/a64/a64_rsb.c`, `a64_rsb.h`: RSB Driver for Allwinner A64 `platforms/arm/a64/boards/pinephone/index.rst`: Added RSB as supported peripheral for PinePhone
This commit is contained in:
Lee Lup Yuen
Xiang Xiao
parent
7bd2195fde
commit
c8cf27e848
@ -149,6 +149,7 @@ Display Engine Yes
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MIPI D-PHY Yes
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MIPI DSI Yes
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PIO Yes
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RSB Yes
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TCON0 Yes
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UART Yes Only UART0 is supported
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============== ======= =====
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@ -21,6 +21,12 @@ config A64_MIPI_DSI
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Select to enable support for MIPI Display Serial Interface (DSI)
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and MIPI Display Physical Layer (D-PHY).
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config A64_RSB
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bool "RSB"
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default n
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---help---
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Select to enable support for Reduced Serial Bus.
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config A64_TCON0
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bool "TCON0"
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default n
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@ -31,6 +31,10 @@ ifeq ($(CONFIG_A64_MIPI_DSI),y)
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CHIP_CSRCS += a64_mipi_dphy.c a64_mipi_dsi.c mipi_dsi.c
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endif
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ifeq ($(CONFIG_A64_RSB),y)
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CHIP_CSRCS += a64_rsb.c
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endif
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ifeq ($(CONFIG_A64_TCON0),y)
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CHIP_CSRCS += a64_tcon0.c
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endif
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@ -57,7 +57,7 @@
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/* Timeout for Display Engine PLL in milliseconds */
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#define PLL_TIMEOUT_MS 5
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#define PLL_TIMEOUT_MS 100
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/* A64 Display Engine Base Addresses ****************************************/
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293
arch/arm64/src/a64/a64_rsb.c
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293
arch/arm64/src/a64/a64_rsb.c
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@ -0,0 +1,293 @@
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/****************************************************************************
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* arch/arm64/src/a64/a64_rsb.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Reference:
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*
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* "Rendering PinePhone's Display (DE and TCON0)"
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* https://lupyuen.github.io/articles/de
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*
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* "NuttX RTOS for PinePhone: Render Graphics in Zig"
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* https://lupyuen.github.io/articles/de2
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*
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* "A80 Page" refers to Allwinner A80 User Manual
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* https://lupyuen.github.io/images/A80_User_Manual_v1.3.1_20150513.pdf
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <string.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "hardware/a64_memorymap.h"
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#include "arm64_arch.h"
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#include "a64_rsb.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Timeout for RSB Transactions in milliseconds */
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#define TRANS_TIMEOUT_MS 5
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/* A64 Reduced Serial Bus Registers and Bit Definitions *********************/
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/* RSB Control Register (A80 Page 923) */
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#define RSB_CTRL (A64_RSB_ADDR + 0x00)
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#define START_TRANS (1 << 7)
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/* RSB Status Register (A80 Page 924) */
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#define RSB_STAT (A64_RSB_ADDR + 0x0c)
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#define TRANS_OVER (1 << 0)
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/* RSB Address Register (A80 Page 926) */
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#define RSB_AR (A64_RSB_ADDR + 0x10)
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/* RSB Data Buffer Register (A80 Page 926) */
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#define RSB_DATA (A64_RSB_ADDR + 0x1c)
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/* RSB Command Register (A80 Page 928) */
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#define RSB_CMD (A64_RSB_ADDR + 0x2c)
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/* RSB Device Address Register (A80 Page 928) */
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#define RSB_DAR (A64_RSB_ADDR + 0x30)
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#define RTA(n) ((n) << 16)
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/* A64 Reduced Serial Bus Commands ******************************************/
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/* Write a byte to Reduced Serial Bus (A80 Page 918) */
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#define RSBCMD_WR8 0x4e
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/* Read a byte from Reduced Serial Bus (A80 Page 918) */
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#define RSBCMD_RD8 0x8b
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rsb_wait_trans
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*
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* Description:
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* Wait for Reduced Serial Bus Transaction to complete or fail with error.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; ERROR if timeout.
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*
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****************************************************************************/
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static int rsb_wait_trans(void)
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{
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int i;
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for (i = 0; i < TRANS_TIMEOUT_MS; i++)
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{
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/* Poll on START_TRANS (Bit 7) of RSB Control Register */
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if ((getreg32(RSB_CTRL) & START_TRANS) == 0)
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{
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/* If START_TRANS is 0, then transaction has completed or failed */
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return OK;
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}
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/* Sleep 1 millisecond and try again */
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up_mdelay(1);
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}
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baterr("RSB Transaction Timeout");
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return ERROR;
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}
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/****************************************************************************
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* Name: rsb_wait_status
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*
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* Description:
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* Wait for Reduced Serial Bus Transaction to complete or fail with error.
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* Return the Transaction Status.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; ERROR if status is error or timeout.
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*
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****************************************************************************/
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static int rsb_wait_status(void)
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{
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int ret;
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/* Wait for transaction to complete or fail with error */
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ret = rsb_wait_trans();
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if (ret < 0)
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{
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return ret;
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}
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/* RSB Status Register (A80 Page 924)
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* If TRANS_OVER (Bit 0) is 1, RSB Transfer has completed without error
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*/
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if (getreg32(RSB_STAT) == TRANS_OVER)
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{
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return OK;
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}
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baterr("RSB Transaction Failed\n");
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return ERROR;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: a64_rsb_read
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*
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* Description:
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* Read a byte from a device on the Reduced Serial Bus.
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*
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* Input Parameters:
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* rt_addr - Run-Time Address of RSB Device
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* reg_addr - Register Address of RSB Device
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*
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* Returned Value:
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* Byte read from the RSB Device; ERROR if the read failed or timed out.
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*
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****************************************************************************/
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int a64_rsb_read(uint8_t rt_addr, uint8_t reg_addr)
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{
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int ret;
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/* RSB Command Register (A80 Page 928)
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* Set to 0x8B (RD8) to read one byte
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*/
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batinfo("rt_addr=0x%x, reg_addr=0x%x\n", rt_addr, reg_addr);
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putreg32(RSBCMD_RD8, RSB_CMD);
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/* RSB Device Address Register (A80 Page 928)
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* Set RTA (Bits 16 to 23) to the Run-Time Address of RSB Device
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*/
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putreg32(RTA(rt_addr), RSB_DAR);
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/* RSB Address Register (A80 Page 926)
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* Set to the Register Address that will be read from RSB Device
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*/
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putreg32(reg_addr, RSB_AR);
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/* RSB Control Register (A80 Page 923)
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* Set START_TRANS (Bit 7) to 1 (Start Transaction)
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*/
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putreg32(START_TRANS, RSB_CTRL);
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/* Wait for RSB Transaction to complete and read the RSB Status */
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ret = rsb_wait_status();
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if (ret < 0)
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{
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return ret;
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}
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/* RSB Data Buffer Register (A80 Page 926)
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* Contains the Register Value read from RSB Device
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*/
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return getreg8(RSB_DATA);
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}
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/****************************************************************************
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* Name: a64_rsb_write
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*
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* Description:
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* Write a byte to a device on the Reduced Serial Bus.
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*
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* Input Parameters:
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* rt_addr - Run-Time Address of RSB Device
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* reg_addr - Register Address of RSB Device
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* value - Byte to be written
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*
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* Returned Value:
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* Zero (OK) on success; ERROR if the write failed or timed out.
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*
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****************************************************************************/
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int a64_rsb_write(uint8_t rt_addr, uint8_t reg_addr, uint8_t value)
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{
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/* RSB Command Register (A80 Page 928)
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* Set to 0x4E (WR8) to write one byte
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*/
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batinfo("rt_addr=0x%x, reg_addr=0x%x, value=0x%x\n",
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rt_addr, reg_addr, value);
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putreg32(RSBCMD_WR8, RSB_CMD);
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/* RSB Device Address Register (A80 Page 928)
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* Set RTA (Bits 16 to 23) to the Run-Time Address of RSB Device
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*/
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putreg32(RTA(rt_addr), RSB_DAR);
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/* RSB Address Register (A80 Page 926)
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* Set to the Register Address that will be written to RSB Device
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*/
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putreg32(reg_addr, RSB_AR);
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/* RSB Data Buffer Register (A80 Page 926)
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* Set to the Register Value that will be written to RSB Device
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*/
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putreg32(value, RSB_DATA);
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/* RSB Control Register (A80 Page 923)
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* Set START_TRANS (Bit 7) to 1 (Start Transaction)
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*/
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putreg32(START_TRANS, RSB_CTRL);
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/* Wait for RSB Transaction to complete and return the RSB Status */
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return rsb_wait_status();
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}
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69
arch/arm64/src/a64/a64_rsb.h
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69
arch/arm64/src/a64/a64_rsb.h
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@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/arm64/src/a64/a64_rsb.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM64_SRC_A64_A64_RSB_H
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#define __ARCH_ARM64_SRC_A64_A64_RSB_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: a64_rsb_read
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*
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* Description:
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* Read a byte from a device on the Reduced Serial Bus.
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*
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* Input Parameters:
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* rt_addr - Run-Time Address of RSB Device
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* reg_addr - Register Address of RSB Device
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*
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* Returned Value:
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* Byte read from the RSB Device; ERROR if the read failed or timed out.
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*
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****************************************************************************/
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int a64_rsb_read(uint8_t rt_addr, uint8_t reg_addr);
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/****************************************************************************
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* Name: a64_rsb_write
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*
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* Description:
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* Write a byte to a device on the Reduced Serial Bus.
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*
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* Input Parameters:
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* rt_addr - Run-Time Address of RSB Device
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* reg_addr - Register Address of RSB Device
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* value - Byte to be written
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*
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* Returned Value:
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* Zero (OK) on success; ERROR if the write failed or timed out.
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*
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****************************************************************************/
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int a64_rsb_write(uint8_t rt_addr, uint8_t reg_addr, uint8_t value);
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#endif /* __ARCH_ARM64_SRC_A64_A64_RSB_H */
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@ -41,6 +41,7 @@
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#define A64_DSI_ADDR 0x01ca0000 /* MIPI DSI 0x01ca:0000-0x01ca:0fff 4K */
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#define A64_DPHY_ADDR 0x01ca1000 /* MIPI DSI-PHY 0x01ca:1000-0x01ca:1fff 4K */
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#define A64_RPIO_ADDR 0x01f02c00 /* R_PIO 0x01f0:2c00-0x01f0:2fff 1K */
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#define A64_RSB_ADDR 0x01f03400 /* R_RSB 0x01f0:3400-0x01f0:37ff 1K */
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/****************************************************************************
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* Public Types
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@ -14,6 +14,7 @@ CONFIG_ARCH_CHIP="a64"
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CONFIG_ARCH_CHIP_A64=y
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CONFIG_ARCH_INTERRUPTSTACK=4096
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARD_LOOPSPERMSEC=116524
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_ASSERTIONS=y
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CONFIG_DEBUG_ERROR=y
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