Add support for .data and .bss in SDRAM
This commit is contained in:
Gregory Nutt
parent
4aee332cd1
commit
c930554c2c
@ -111,6 +111,22 @@ extern "C" {
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: arm_data_initialize
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*
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* Description:
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* Clear all of .bss to zero; set .data to the correct initial values
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void arm_data_initialize(void);
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#undef EXTERN
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#ifdef __cplusplus
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}
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@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/armv7-a/arm_head.S
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -70,8 +70,6 @@
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*/
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#ifdef CONFIG_BOOT_RUNFROMFLASH
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# define DO_SDRAM_INIT 1
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/* Check for the identity mapping: For this configuration, this would be
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* the case where the virtual beginning of FLASH is the same as the physical
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* beginning of FLASH.
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@ -98,7 +96,6 @@
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#elif defined(CONFIG_BOOT_COPYTORAM)
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# error "configuration not implemented
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# define DO_SDRAM_INIT 1
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/* Check for the identity mapping: For this configuration, this would be
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* the case where the virtual beginning of FLASH is the same as the physical
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@ -193,18 +190,6 @@ __start:
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mov r0, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT)
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msr cpsr_c, r0
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/* Initialize DRAM using a macro provided by board-specific logic.
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*
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* This must be done in two cases:
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* 1. CONFIG_BOOT_RUNFROMFLASH. The system is running from FLASH
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* 2. CONFIG_BOOT_COPYTORAM. The system booted from FLASH but
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* will copy itself to SDRAM.
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*/
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#ifdef DO_SDRAM_INIT
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config_sdram
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#endif
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/* Clear the 16K level 1 page table */
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ldr r5, .LCppgtable /* r5=phys. page table */
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@ -626,19 +611,70 @@ __start:
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str r3, [r5, r3, lsr #18] /* identity mapping */
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#endif /* !CONFIG_ARCH_ROMPGTABLE && !CONFIG_IDENTITY_TEXTMAP */
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/* Zero BSS and set up the stack pointer */
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/* Set up the stack pointer and clear the frame pointer */
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ldr sp, .Lstackpointer
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mov fp, #0
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/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
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* ready to use. Other memory, such as SDRAM, must be initialized before
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* it can be used. up_boot() will perform that memory initialization and
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* .bss and .data can be initialized after up_boot() returns.
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*/
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#ifndef CONFIG_BOOT_SDRAM_DATA
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bl arm_data_initialize
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#endif
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/* Perform early C-level, platform-specific initialization. Logic
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* within up_boot() must configure SDRAM and call arm_ram_initailize.
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*/
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bl up_boot
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#ifdef CONFIG_DEBUG_STACK
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/* Write a known value to the IDLE thread stack to support stack
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* monitoring logic
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*/
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adr r3, .Lstkinit
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ldmia r3, {r0, r1, r2} /* R0 = start of IDLE stack; R1 = Size of tack; R2 = coloration */
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1: /* Top of the loop */
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sub r1, r1, #1 /* R1 = Number of words remaining */
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cmp r1, #0 /* Check (nwords == 0) */
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str r2, [r0], #4 /* Save stack color word, increment stack address */
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bne 1b /* Bottom of the loop */
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#endif
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/* Finally branch to the OS entry point */
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mov lr, #0 /* LR = return address (none) */
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b os_start /* Branch to os_start */
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.size .Lvstart, .-.Lvstart
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/***************************************************************************
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* Name: arm_data_initialize
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***************************************************************************/
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.global arm_data_initialize
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.type arm_data_initialize, #function
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arm_data_initialize:
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/* zero BSS and set up the stack pointer */
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adr r0, .Linitparms
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ldmia r0, {r0, r1, sp}
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ldmia r0, {r0, r1}
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/* Clear the frame pointer and .bss */
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mov fp, #0
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.Lbssinit:
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1:
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cmp r0, r1 /* Clear up to _bss_end_ */
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strcc fp, [r0],#4
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bcc .Lbssinit
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bcc 1b
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/* If the .data section is in a separate, uninitialized address space,
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* then we will also need to copy the initial values of of the .data
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@ -653,45 +689,34 @@ __start:
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adr r3, .Ldatainit
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ldmia r3, {r0, r1, r2}
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1: ldmia r0!, {r3 - r10}
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2:
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ldmia r0!, {r3 - r10}
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stmia r1!, {r3 - r10}
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cmp r1, r2
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blt 1b
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blt 2b
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#endif
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/* Perform early C-level, platform-specific initialization */
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/* And return to the caller */
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bl up_boot
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bx lr
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.size arm_data_initialize, . - arm_data_initialize
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#ifdef CONFIG_DEBUG_STACK
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/* Write a known value to the IDLE thread stack to support stack
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* monitoring logic
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*/
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adr r3, .Lstkinit
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ldmia r3, {r0, r1, r2} /* R0 = start of IDLE stack; R1 = Size of tack; R2 = coloration */
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2: /* Top of the loop */
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sub r1, r1, #1 /* R1 = Number of words remaining */
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cmp r1, #0 /* Check (nwords == 0) */
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str r2, [r0], #4 /* Save stack color word, increment stack address */
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bne 2b /* Bottom of the loop */
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#endif
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/* Finally branch to the OS entry point */
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mov lr, #0 /* LR = return address (none) */
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b os_start /* Branch to os_start */
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/***************************************************************************
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* Text-section constants
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***************************************************************************/
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/* Text-section constants:
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*
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* _sbss is the start of the BSS region (see ld.script)
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* _ebss is the end of the BSS regsion (see ld.script)
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* _ebss is the end of the BSS region (see ld.script)
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*
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* The idle task stack starts at the end of BSS and is of size
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* The idle task stack usually starts at the end of BSS and is of size
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* CONFIG_IDLETHREAD_STACKSIZE. The heap continues from there until the
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* end of memory. See g_idle_topstack below.
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*
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* In the case where CONFIG_BOOT_SDRAM_DATA is defined, the IDLE stack is
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* in ISRAM, but the heap is in SDRAM beginning at _ebss and extending
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* to the end of SDRAM.
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*/
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#ifndef CONFIG_ARCH_ROMPGTABLE
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@ -708,9 +733,16 @@ __start:
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.Linitparms:
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.long _sbss
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.long _ebss
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
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.size .Linitparms, . -.Linitparms
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.Lstackpointer:
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#ifdef CONFIG_BOOT_SDRAM_DATA
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.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE-4
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#else
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
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#endif
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.size .Lstackpointer, . -.Lstackpointer
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#ifdef CONFIG_BOOT_RUNFROMFLASH
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.type .Ldatainit, %object
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.Ldatainit:
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@ -723,14 +755,19 @@ __start:
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#ifdef CONFIG_DEBUG_STACK
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.type .Lstkinit, %object
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.Lstkinit:
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#ifdef CONFIG_BOOT_SDRAM_DATA
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.long IDLE_STACK_VBASE /* Beginning of the IDLE stack, then words of IDLE stack */
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#else
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.long _ebss /* Beginning of the IDLE stack, then words of IDLE stack */
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#endif
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.long (CONFIG_IDLETHREAD_STACKSIZE >> 2)
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.long STACK_COLOR /* Stack coloration word */
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.size .Lstkinit, . -.Lstkinit
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#endif
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.size .Lvstart, .-.Lvstart
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/* Data section variables */
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/***************************************************************************
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* Data section variables
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***************************************************************************/
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/* This global variable is unsigned long g_idle_topstack and is
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* exported from here only because of its coupling to .Linitparms
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@ -741,7 +778,13 @@ __start:
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.align 4
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.globl g_idle_topstack
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.type g_idle_topstack, object
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g_idle_topstack:
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#ifdef CONFIG_BOOT_SDRAM_DATA
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.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE
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#else
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
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#endif
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.size g_idle_topstack, .-g_idle_topstack
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.end
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@ -80,8 +80,6 @@
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*/
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#ifdef CONFIG_BOOT_RUNFROMFLASH
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# define DO_SDRAM_INIT 1
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/* Check for the identity mapping: For this configuration, this would be
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* the case where the virtual beginning of FLASH is the same as the physical
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* beginning of FLASH.
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@ -108,7 +106,6 @@
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#elif defined(CONFIG_BOOT_COPYTORAM)
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# error "configuration not implemented
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# define DO_SDRAM_INIT 1
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/* Check for the identity mapping: For this configuration, this would be
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* the case where the virtual beginning of FLASH is the same as the physical
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@ -221,18 +218,6 @@ __start:
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mov r0, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT)
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msr cpsr_c, r0
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/* Initialize DRAM using a macro provided by board-specific logic.
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*
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* This must be done in two cases:
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* 1. CONFIG_BOOT_RUNFROMFLASH. The system is running from FLASH
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* 2. CONFIG_BOOT_COPYTORAM. The system booted from FLASH but
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* will copy itself to SDRAM.
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*/
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#ifdef DO_SDRAM_INIT
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config_sdram
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#endif
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/* Clear the 16K level 1 page table */
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ldr r4, .LCppgtable /* r4=phys. page table */
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@ -665,38 +650,30 @@ __start:
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#endif /* CONFIG_BOOT_RUNFROMFLASH */
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/* Zero BSS and set up the stack pointer */
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adr r0, .Linitparms
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ldmia r0, {r0, r1, sp}
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/* Clear the frame pointer and .bss */
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mov fp, #0
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.Lbssinit:
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cmp r0, r1 /* Clear up to _bss_end_ */
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strcc fp, [r0],#4
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bcc .Lbssinit
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/* If the .data section is in a separate, unitialized address space,
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* then we will also need to copy the initial values of of the .data
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* section from the .text region into that .data region. This would
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* be the case if we are executing from FLASH and the .data section
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* lies in a different physical address region OR if we are support
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* on-demand paging and the .data section lies in a different virtual
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* address region.
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/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
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* ready to use. Other memory, such as SDRAM, must be initialized before
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* it can be used. up_boot() will perform that memory initialization and
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* .bss and .data can be initialized after up_boot() returns.
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*/
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adr r3, .Ldatainit
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ldmia r3, {r0, r1, r2}
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/* Set up the stack pointer and clear the frame pointer */
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1: ldmia r0!, {r3 - r10}
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stmia r1!, {r3 - r10}
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cmp r1, r2
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blt 1b
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ldr sp, .Lstackpointer
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mov fp, #0
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/* Perform early C-level, platform-specific initialization */
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/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
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* ready to use. Other memory, such as SDRAM, must be initialized before
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* it can be used. up_boot() will perform that memory initialization and
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* .bss and .data can be initialized after up_boot() returns.
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*/
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#ifndef CONFIG_BOOT_SDRAM_DATA
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bl arm_data_initialize
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#endif
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/* Perform early C-level, platform-specific initialization. Logic
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* within up_boot() must configure SDRAM and call arm_ram_initailize.
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*/
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bl up_boot
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@ -708,36 +685,99 @@ __start:
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adr r3, .Lstkinit
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ldmia r3, {r0, r1, r2} /* R0 = start of IDLE stack; R1 = Size of tack; R2 = coloration */
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2: /* Top of the loop */
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1: /* Top of the loop */
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sub r1, r1, #1 /* R1 = Number of words remaining */
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cmp r1, #0 /* Check (nwords == 0) */
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str r2, [r0], #4 /* Save stack color word, increment stack address */
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bne 2b /* Bottom of the loop */
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bne 1b /* Bottom of the loop */
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#endif
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/* Finally branch to the OS entry point */
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mov lr, #0 /* LR = return address (none) */
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b os_start /* Branch to os_start */
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.size .Lvstart, .-.Lvstart
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/***************************************************************************
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* Name: arm_data_initialize
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***************************************************************************/
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.global arm_data_initialize
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.type arm_data_initialize, #function
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arm_data_initialize:
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/* zero BSS and set up the stack pointer */
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adr r0, .Linitparms
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ldmia r0, {r0, r1}
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/* Clear the frame pointer and .bss */
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mov fp, #0
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1:
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cmp r0, r1 /* Clear up to _bss_end_ */
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strcc fp, [r0],#4
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bcc 1b
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/* If the .data section is in a separate, uninitialized address space,
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* then we will also need to copy the initial values of of the .data
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* section from the .text region into that .data region. This would
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* be the case if we are executing from FLASH and the .data section
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* lies in a different physical address region OR if we are support
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* on-demand paging and the .data section lies in a different virtual
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* address region.
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*/
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#if defined(CONFIG_BOOT_RUNFROMFLASH)
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adr r3, .Ldatainit
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ldmia r3, {r0, r1, r2}
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2:
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ldmia r0!, {r3 - r10}
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stmia r1!, {r3 - r10}
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cmp r1, r2
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blt 2b
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#endif
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/* And return to the caller */
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bx lr
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.size arm_data_initialize, . - arm_data_initialize
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/***************************************************************************
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* Text-section constants
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***************************************************************************/
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/* Text-section constants:
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*
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* _sbss is the start of the BSS region (see ld.script)
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* _ebss is the end of the BSS regsion (see ld.script)
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*
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* The idle task stack starts at the end of BSS and is of size
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* The idle task stack usually starts at the end of BSS and is of size
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* CONFIG_IDLETHREAD_STACKSIZE. The heap continues from there until the
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* end of memory. See g_idle_topstack below.
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*
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* In the case where CONFIG_BOOT_SDRAM_DATA is defined, the IDLE stack is
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* in ISRAM, but the heap is in SDRAM beginning at _ebss and extending
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* to the end of SDRAM.
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*/
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.type .Linitparms, %object
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.Linitparms:
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.long _sbss
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.long _ebss
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
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.size .Linitparms, . -.Linitparms
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.Lstackpointer:
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#ifdef CONFIG_BOOT_SDRAM_DATA
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.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE-4
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#else
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
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#endif
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.size .Lstackpointer, . -.Lstackpointer
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.type .Ldataspan, %object
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.Ldataspan:
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.long PG_L1_DATA_VADDR /* Virtual address in the L1 table */
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@ -765,15 +805,19 @@ __start:
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#ifdef CONFIG_DEBUG_STACK
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.type .Lstkinit, %object
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.Lstkinit:
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#ifdef CONFIG_BOOT_SDRAM_DATA
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.long IDLE_STACK_VBASE /* Beginning of the IDLE stack, then words of IDLE stack */
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#else
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.long _ebss /* Beginning of the IDLE stack, then words of IDLE stack */
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#endif
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.long (CONFIG_IDLETHREAD_STACKSIZE >> 2)
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.long STACK_COLOR /* Stack coloration word */
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.size .Lstkinit, . -.Lstkinit
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#endif
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.size .Lvstart, .-.Lvstart
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/* Data section variables */
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/***************************************************************************
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* Data section variables
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***************************************************************************/
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/* This global variable is unsigned long g_idle_topstack and is
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* exported from here only because of its coupling to .Linitparms
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@ -784,7 +828,13 @@ __start:
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.align 4
|
||||
.globl g_idle_topstack
|
||||
.type g_idle_topstack, object
|
||||
|
||||
g_idle_topstack:
|
||||
|
||||
#ifdef CONFIG_BOOT_SDRAM_DATA
|
||||
.long IDLE_STACK_VBASE+CONFIG_IDLETHREAD_STACKSIZE
|
||||
#else
|
||||
.long _ebss+CONFIG_IDLETHREAD_STACKSIZE
|
||||
#endif
|
||||
.size g_idle_topstack, .-g_idle_topstack
|
||||
.end
|
||||
|
||||
@ -2969,6 +2969,7 @@ config SAMA5_DDRCS
|
||||
bool "External DDR-SDRAM Memory"
|
||||
default n
|
||||
depends on SAMA5_MPDDRC
|
||||
select ARCH_HAVE_SDRAM
|
||||
---help---
|
||||
Build in support for DDR-SDRAM memory resources.
|
||||
|
||||
|
||||
@ -616,6 +616,10 @@
|
||||
# endif
|
||||
# define PGTABLE_IN_HIGHSRAM 1
|
||||
|
||||
# ifdef CONFIG_BOOT_SDRAM_DATA
|
||||
# error CONFIG_BOOT_SDRAM_DATA not suupported in this configuration
|
||||
# endif
|
||||
|
||||
# else /* CONFIG_BOOT_RUNFROMISRAM && CONFIG_ARCH_LOWVECTORS */
|
||||
|
||||
/* Otherwise, the vectors lie at another location (perhaps in NOR FLASH, perhaps
|
||||
@ -629,6 +633,11 @@
|
||||
# endif
|
||||
# define PGTABLE_IN_LOWSRAM 1
|
||||
|
||||
# ifdef CONFIG_BOOT_SDRAM_DATA
|
||||
# define IDLE_STACK_PBASE (PGTABLE_BASE_PADDR + PGTABLE_SIZE)
|
||||
# define IDLE_STACK_VBASE (PGTABLE_BASE_VADDR + PGTABLE_SIZE)
|
||||
# endif
|
||||
|
||||
# endif /* CONFIG_BOOT_RUNFROMISRAM && CONFIG_ARCH_LOWVECTORS */
|
||||
|
||||
/* In either case, the page table lies in ISRAM. If ISRAM is not the
|
||||
@ -640,6 +649,21 @@
|
||||
# define ARMV7A_PGTABLE_MAPPING 1
|
||||
# endif
|
||||
|
||||
#else /* !PGTABLE_BASE_PADDR || !PGTABLE_BASE_VADDR */
|
||||
|
||||
/* Sanity check.. if one is defined, both should be defined */
|
||||
|
||||
# if !defined(PGTABLE_BASE_PADDR) || !defined(PGTABLE_BASE_VADDR)
|
||||
# error "One of PGTABLE_BASE_PADDR or PGTABLE_BASE_VADDR is undefined"
|
||||
# endif
|
||||
|
||||
/* If data is in SDRAM, then the IDLE stack at the beginning of ISRAM */
|
||||
|
||||
# ifdef CONFIG_BOOT_SDRAM_DATA
|
||||
# define IDLE_STACK_PBASE (SAM_ISRAM0_PADDR + PGTABLE_SIZE)
|
||||
# define IDLE_STACK_VBASE (SAM_ISRAM0_VADDR + PGTABLE_SIZE)
|
||||
# endif
|
||||
|
||||
#endif /* !PGTABLE_BASE_PADDR || !PGTABLE_BASE_VADDR */
|
||||
|
||||
/* Level 2 Page table start addresses.
|
||||
|
||||
@ -72,7 +72,7 @@
|
||||
* start would exclude, for example, any memory at the bottom of the RAM
|
||||
* region used for the 16KB page table. If we are also executing from this
|
||||
* same RAM region then CONFIG_RAM_START is not used. Instead, the value of
|
||||
* g_idle_stack is the used; this variable holds the first avaiable byte of
|
||||
* g_idle_stack is the used; this variable holds the first available byte of
|
||||
* memory after the .text, .data, .bss, and IDLE stack allocations.
|
||||
*
|
||||
* CONFIG_RAM_VEND is defined in the configuration it is the usable top of
|
||||
@ -94,7 +94,8 @@
|
||||
# undef CONFIG_SAMA5_ISRAM_HEAP
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_SAMA5_DDRCS) || defined(CONFIG_SAMA5_BOOT_SDRAM)
|
||||
#if !defined(CONFIG_SAMA5_DDRCS) || defined(CONFIG_SAMA5_BOOT_SDRAM) || \
|
||||
defined(CONFIG_BOOT_SDRAM_DATA)
|
||||
# undef CONFIG_SAMA5_DDRCS_HEAP
|
||||
#endif
|
||||
|
||||
@ -216,9 +217,20 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
||||
board_led_on(LED_HEAPALLOCATE);
|
||||
*heap_start = (FAR void*)ubase;
|
||||
*heap_size = usize;
|
||||
#else
|
||||
|
||||
/* Return the heap settings */
|
||||
#elif defined(CONFIG_BOOT_SDRAM_DATA)
|
||||
/* In this case, the IDLE stack is in ISRAM, but data is in SDRAM. The
|
||||
* heap is at the end of BSS through the configured end of SDRAM.
|
||||
*/
|
||||
|
||||
board_led_on(LED_HEAPALLOCATE);
|
||||
*heap_start = (FAR void*)&_ebss;
|
||||
*heap_size = CONFIG_RAM_VEND - (size_t)&_ebss;
|
||||
|
||||
#else
|
||||
/* Both data and the heap are in ISRAM. The heap is then from the end of
|
||||
* IDLE stack through the configured end of ISRAM.
|
||||
*/
|
||||
|
||||
board_led_on(LED_HEAPALLOCATE);
|
||||
*heap_start = (FAR void*)g_idle_topstack;
|
||||
|
||||
@ -633,6 +633,35 @@ void up_boot(void)
|
||||
arm_fpuconfig();
|
||||
#endif
|
||||
|
||||
/* Perform board-specific initialization, This must include:
|
||||
*
|
||||
* - Initialization of board-specific memory resources (e.g., SDRAM)
|
||||
* - Configuration of board specific resources (PIOs, LEDs, etc).
|
||||
*
|
||||
* NOTE: We must use caution prior to this point to make sure that
|
||||
* the logic does not access any global variables that might lie
|
||||
* in SDRAM.
|
||||
*/
|
||||
|
||||
sam_boardinitialize();
|
||||
|
||||
/* SDRAM was configured in a temporary state to support low-level
|
||||
* initialization. Now that the SDRAM has been fully initialized,
|
||||
* we can reconfigure the SDRAM in its final, fully cache-able state.
|
||||
*/
|
||||
|
||||
#ifdef NEED_SDRAM_REMAPPING
|
||||
sam_remap();
|
||||
#endif
|
||||
|
||||
/* If .data and .bss reside in SDRAM, then initialize the data sections
|
||||
* now after SDRAM has been initialized.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_BOOT_SDRAM_DATA
|
||||
arm_data_initialize();
|
||||
#endif
|
||||
|
||||
/* Perform common, low-level chip initialization (might do nothing) */
|
||||
|
||||
sam_lowsetup();
|
||||
@ -654,21 +683,4 @@ void up_boot(void)
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
sam_userspace();
|
||||
#endif
|
||||
|
||||
/* Perform board-specific initialization, This must include:
|
||||
*
|
||||
* - Initialization of board-specific memory resources (e.g., SDRAM)
|
||||
* - Configuration of board specific resources (PIOs, LEDs, etc).
|
||||
*/
|
||||
|
||||
sam_boardinitialize();
|
||||
|
||||
/* SDRAM was configured in a temporary state to support low-level
|
||||
* ininitialization. Now that the SDRAM has been fully initialized,
|
||||
* we can reconfigure the SDRAM in its final, fully cache-able state.
|
||||
*/
|
||||
|
||||
#ifdef NEED_SDRAM_REMAPPING
|
||||
sam_remap();
|
||||
#endif
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user