Fix access to ez80 I/O address space
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@748 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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87
arch/z80/include/ez80/io.h
Normal file
87
arch/z80/include/ez80/io.h
Normal file
@ -0,0 +1,87 @@
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/****************************************************************************
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* arch/z80/include/ez80/io.h
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* arch/chip/io.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through arch/io.h
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*/
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#ifndef __ARCH_EZ80_IO_H
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#define __ARCH_EZ80_IO_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <sys/types.h>
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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EXTERN void outp(uint16 p, ubyte c);
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EXTERN ubyte inp(uint16 p);
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_EZ80_IO_H */
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@ -43,7 +43,7 @@ CMN_CSRCS = up_initialize.c up_allocateheap.c up_createstack.c \
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up_reprioritizertr.c up_idle.c up_assert.c up_doirq.c \
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up_mdelay.c up_udelay.c up_usestack.c
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CHIP_ASRCS = ez80_startup.asm ez80_irqsave.asm \
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CHIP_ASRCS = ez80_startup.asm ez80_io.asm ez80_irqsave.asm \
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ez80_saveusercontext.asm ez80_restorecontext.asm
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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CHIP_ASRCS += ez80f91_init.asm
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@ -251,19 +251,6 @@
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#define EZ80_UARTMSR_DDSR 0x02 /* Bit 1: Delta on DSR input */
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#define EZ80_UARTMSR_DCTS 0x01 /* Bit 0: Delta on CTS input */
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/* Register access macros ***********************************************************/
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#ifndef __ASSEMBLY__
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# define getreg8(a) (*(volatile ubyte *)(a))
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# define putreg8(v,a) (*(volatile ubyte *)(a) = (v))
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# define getreg16(a) (*(volatile uint16 *)(a))
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# define putreg16(v,a) (*(volatile uint16 *)(a) = (v))
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# define getreg32(a) (*(volatile uint32 *)(a))
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# define putreg32(v,a) (*(volatile uint32 *)(a) = (v))
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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154
arch/z80/src/ez80/ez80_io.asm
Normal file
154
arch/z80/src/ez80/ez80_io.asm
Normal file
@ -0,0 +1,154 @@
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;**************************************************************************
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; arch/z80/src/ze80/ez80_io.c
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;
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; Copyright (C) 2008 Gregory Nutt. All rights reserved.
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; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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||||
; are met:
|
||||
;
|
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; 1. Redistributions of source code must retain the above copyright
|
||||
; notice, this list of conditions and the following disclaimer.
|
||||
; 2. Redistributions in binary form must reproduce the above copyright
|
||||
; notice, this list of conditions and the following disclaimer in
|
||||
; the documentation and/or other materials provided with the
|
||||
; distribution.
|
||||
; 3. Neither the name NuttX nor the names of its contributors may be
|
||||
; used to endorse or promote products derived from this software
|
||||
; without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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; POSSIBILITY OF SUCH DAMAGE.
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;
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;**************************************************************************
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;**************************************************************************
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; Global Symbols Imported
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;**************************************************************************
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;**************************************************************************
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; Global Symbols Expported
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;**************************************************************************
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xdef _outp
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xdef _inp
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;**************************************************************************
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; Global Symbols Expported
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;**************************************************************************
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CONFIG_EZ80_Z80MODE equ 0
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;**************************************************************************
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; Code
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;**************************************************************************
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segment CODE
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.assume ADL=1
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;**************************************************************************
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; Name: void outp(uint16 p, ubyte c)
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;
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; Description:
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; Output byte c on port p
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;
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;**************************************************************************
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_outp:
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; Create a stack frame
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push ix
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ld ix, #0
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add ix, sp
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; Get the arguments from the stack
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.if CONFIG_EZ80_Z80MODE
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; Stack looks like:
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;
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; 7-8 Unused
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; 6 Value
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; 4-5 Port
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; 2-3 Return address
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; SP: 0-1 Caller's fame pointer
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ld bc, (ix + 4) ; Port
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ld a, (ix + 6) ; Value
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.else
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; Stack looks like:
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;
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; 10-11 Unused
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; 9 Value
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; 8 Unused
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; 6-7 Port
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; 3-5 Return address
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; SP: 0-2 Caller's frame pointer
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ld bc, (ix + 6) ; Port (upper 8 bits not used)
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ld a, (ix + 9) ; Value
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.endif
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; Output the specified by to the specified 8-bit I/O address
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out (bc), a
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pop ix
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ret
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;**************************************************************************
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; Name: ubyte inp(uint16 p)
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;
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; Description:
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; Input byte from port p
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;
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;**************************************************************************
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_inp:
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; Create a stack frame
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push ix
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ld ix, #0
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add ix, sp
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; Get the arguments from the stack
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.if CONFIG_EZ80_Z80MODE
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; Stack looks like:
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;
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; 4-5 Port
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; 2-3 Return address
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; SP: 0-1 Caller's fame pointer
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ld bc, (ix + 4) ; Port
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.else
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; Stack looks like:
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;
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; 8 Unused
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; 6-7 Port
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; 3-5 Return address
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; SP: 0-2 Caller's frame pointer
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ld bc, (ix + 6) ; Port (upper 8 bits not used)
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.endif
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; Return port value in A
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in a, (bc)
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pop ix
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ret
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end
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@ -91,34 +91,35 @@ void up_irqinitialize(void)
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* Name: up_disable_irq
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*
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* Description:
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* Disable the IRQ specified by 'irq'
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* On many architectures, there are three levels of interrupt enabling: (1)
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* at the global level, (2) at the level of the interrupt controller,
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* and (3) at the device level. In order to receive interrupts, they
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* must be enabled at all three levels.
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*
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* This function implements disabling of the device specified by 'irq'
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* at the interrupt controller level if supported by the architecture
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* (irqsave() supports the global level, the device level is hardware
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* specific).
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*
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****************************************************************************/
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void up_disable_irq(int irq)
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{
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/* There are no ez80 interrupt controller settings to disable IRQs */
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}
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/****************************************************************************
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* Name: up_enable_irq
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*
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* Description:
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* Enable the IRQ specified by 'irq'
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* This function implements enabling of the device specified by 'irq'
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* at the interrupt controller level if supported by the architecture
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* (irqsave() supports the global level, the device level is hardware
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* specific).
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*
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****************************************************************************/
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void up_enable_irq(int irq)
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{
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}
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/****************************************************************************
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* Name: up_maskack_irq
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*
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* Description:
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* Mask the IRQ and acknowledge it
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*
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****************************************************************************/
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void up_maskack_irq(int irq)
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{
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/* There are no ez80 interrupt controller settings to enable IRQs */
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}
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@ -51,13 +51,13 @@
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segment CODE
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.assume ADL=1
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;****************************************************************************
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;**************************************************************************
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;* Name: irqstate_t irqsave(void)
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;*
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;* Description:
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;* Disable all interrupts; return previous interrupt state
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;*
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;****************************************************************************
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;**************************************************************************
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_irqsave:
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ld a, i ; AF = interrupt state
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@ -66,13 +66,13 @@ _irqsave:
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pop hl ;
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ret ; And return
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;****************************************************************************
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;**************************************************************************
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;* Name: void irqrestore(irqstate_t flags)
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;*
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;* Description:
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;* Restore previous interrupt state
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;*
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;****************************************************************************
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;**************************************************************************
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_irqrestore:
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di ; Assume disabled
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@ -42,6 +42,7 @@
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#include <sys/types.h>
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#include <string.h>
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#include <arch/io.h>
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#include <nuttx/arch.h>
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#include <nuttx/sched.h>
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@ -59,9 +60,9 @@
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extern unsigned long SYS_CLK_FREQ;
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#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
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#ifdef CONFIG_UART1_SERIAL_CONSOLE
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# define ez80_getreg(offs) getreg8((EZ80_UART1_BASE+(offs)))
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# define ez80_putreg(val,offs) putreg8((val), (EZ80_UART1_BASE+(offs)))
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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# define ez80_inp(offs) inp((EZ80_UART0_BASE+(offs)))
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# define ez80_outp(offs,val) outp((EZ80_UART0_BASE+(offs)), (val))
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# define CONFIG_UART_BAUD CONFIG_UART0_BAUD
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# if CONFIG_UART0_BITS == 7
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# define CONFIG_UART_BITS EZ80_UARTCHAR_7BITS
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@ -81,8 +82,8 @@ extern unsigned long SYS_CLK_FREQ;
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# define CONFIG_UART_PARITY 0
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# endif
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#else
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# define ez80_getreg(offs) getreg8((EZ80_UART0_BASE+(offs)))
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# define ez80_putreg(val,offs) putreg8((val), (EZ80_UART0_BASE+(offs)))
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# define ez80_inp(offs) inp((EZ80_UART1_BASE+(offs)))
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# define ez80_outp(offs.val) outp((EZ80_UART1_BASE+(offs)), (val))
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# define CONFIG_UART_BAUD CONFIG_UART1_BAUD
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# if CONFIG_UART1_BITS == 7
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# define CONFIG_UART_BITS EZ80_UARTCHAR_7BITS
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@ -131,15 +132,15 @@ static void ez80_setbaud(void)
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/* Set the DLAB bit to enable access to the BRG registers */
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lctl = ez80_getreg(EZ80_UART_LCTL);
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lctl = ez80_inp(EZ80_UART_LCTL);
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lctl |= EZ80_UARTLCTL_DLAB;
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ez80_putreg(lctl, EZ80_UART_LCTL);
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ez80_outp(EZ80_UART_LCTL, lctl);
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ez80_putreg((ubyte)(brg_divisor & 0xff), EZ80_UART_BRGL);
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ez80_putreg((ubyte)(brg_divisor >> 8), EZ80_UART_BRGH);
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ez80_outp(EZ80_UART_BRGL, (ubyte)(brg_divisor & 0xff));
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ez80_outp(EZ80_UART_BRGH, (ubyte)(brg_divisor >> 8));
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lctl &= ~EZ80_UARTLCTL_DLAB;
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ez80_putreg(lctl, EZ80_UART_LCTL);
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ez80_outp(EZ80_UART_LCTL, lctl);
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}
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#endif /* CONFIG_SUPPRESS_UART_CONFIG */
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@ -158,33 +159,33 @@ void up_lowuartinit(void)
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/* Disable interrupts from the UART */
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reg = ez80_getreg(EZ80_UART_IER);
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reg = ez80_inp(EZ80_UART_IER);
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reg &= ~EZ80_UARTEIR_INTMASK;
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ez80_putreg(reg, EZ80_UART_IER);
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ez80_outp(EZ80_UART_IER, reg);
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/* Set the baud rate */
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ez80_setbaud();
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ez80_putreg(0, EZ80_UART_MCTL);
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ez80_outp(EZ80_UART_MCTL, 0);
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/* Set the character properties */
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reg = ez80_getreg(EZ80_UART_LCTL);
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reg = ez80_inp(EZ80_UART_LCTL);
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reg &= ~EZ80_UARTLCTL_MASK;
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reg |= (CONFIG_UART_BITS | CONFIG_UART_2STOP | CONFIG_UART_PARITY);
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ez80_putreg(reg, EZ80_UART_LCTL);
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ez80_outp(EZ80_UART_LCTL, reg);
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/* Enable and flush the receive FIFO */
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reg = EZ80_UARTFCTL_FIFOEN;
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ez80_putreg(reg, EZ80_UART_FCTL);
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ez80_outp(EZ80_UART_FCTL, reg);
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reg |= (EZ80_UARTFCTL_CLRTxF|EZ80_UARTFCTL_CLRRxF);
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ez80_putreg(reg, EZ80_UART_FCTL);
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ez80_outp(EZ80_UART_FCTL, reg);
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/* Set the receive trigger level to 1 */
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reg |= EZ80_UARTTRIG_1;
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ez80_putreg(reg, EZ80_UART_FCTL);
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ez80_outp(EZ80_UART_FCTL, reg);
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#endif /* CONFIG_SUPPRESS_UART_CONFIG */
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}
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#endif /* CONFIG_USE_LOWUARTINIT */
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@ -79,10 +79,9 @@ static void ez80_registerdump(void)
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{
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if (current_regs)
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{
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lldbg("AF: %02x|%02x I: %02x|%02x\n",
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(ubyte*)current_regs)[XCPT_A_OFFSET], (ubyte*)current_regs)[XCPT_F_OFFSET],
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(ubyte*)current_regs)[XCPT_IA_OFFSET], (ubyte*)current_regs)[XCPT_IF_OFFSET]);
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#ifdef CONFIG_EZ80_Z80MODE
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lldbg("AF: %04x I: %04x\n",
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current_regs[XCPT_AF], current_regs[XCPT_I]);
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lldbg("BC: %04x DE: %04x HL: %04x\n",
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current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]);
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lldbg("IX: %04x IY: %04x\n",
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@ -90,6 +89,8 @@ static void ez80_registerdump(void)
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lldbg("SP: %04x PC: %04x\n"
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current_regs[XCPT_SP], current_regs[XCPT_PC]);
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#else
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lldbg("AF: %06x I: %06x\n",
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current_regs[XCPT_AF], current_regs[XCPT_I]);
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lldbg("BC: %06x DE: %06x HL: %06x\n",
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current_regs[XCPT_BC], current_regs[XCPT_DE], current_regs[XCPT_HL]);
|
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lldbg("IX: %06x IY: %06x\n",
|
||||
|
||||
@ -50,6 +50,7 @@
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/serial.h>
|
||||
#include <arch/serial.h>
|
||||
#include <arch/io.h>
|
||||
|
||||
#include "chip/chip.h"
|
||||
#include "os_internal.h"
|
||||
@ -72,7 +73,7 @@ extern unsigned long SYS_CLK_FREQ;
|
||||
|
||||
struct ez80_dev_s
|
||||
{
|
||||
unsigned int uartbase; /* Base address of UART registers */
|
||||
uint16 uartbase; /* Base address of UART registers */
|
||||
unsigned int baud; /* Configured baud */
|
||||
ubyte irq; /* IRQ associated with this UART */
|
||||
ubyte parity; /* 0=none, 1=odd, 2=even */
|
||||
@ -231,9 +232,9 @@ static uart_dev_t g_uart1port =
|
||||
* Name: ez80_serialin
|
||||
****************************************************************************/
|
||||
|
||||
static inline ubyte ez80_serialin(struct ez80_dev_s *priv, uint32 offset)
|
||||
static inline ubyte ez80_serialin(struct ez80_dev_s *priv, ubyte offset)
|
||||
{
|
||||
return getreg8(priv->uartbase + offset);
|
||||
return inp(priv->uartbase + offset);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -242,7 +243,7 @@ static inline ubyte ez80_serialin(struct ez80_dev_s *priv, uint32 offset)
|
||||
|
||||
static inline void ez80_serialout(struct ez80_dev_s *priv, ubyte offset, ubyte value)
|
||||
{
|
||||
putreg8(value, priv->uartbase + offset);
|
||||
outp(priv->uartbase + offset, value);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -359,7 +360,7 @@ static int ez80_setup(struct uart_dev_s *dev)
|
||||
|
||||
/* Set the baud rate */
|
||||
|
||||
ez80_disableuartint(priv, NULL);
|
||||
ez80_disableuartint(priv);
|
||||
ez80_setbaud(priv, priv->baud);
|
||||
ez80_serialout(priv, EZ80_UART_MCTL, 0);
|
||||
|
||||
@ -415,20 +416,10 @@ static void ez80_shutdown(struct uart_dev_s *dev)
|
||||
static int ez80_attach(struct uart_dev_s *dev)
|
||||
{
|
||||
struct ez80_dev_s *priv = (struct ez80_dev_s*)dev->priv;
|
||||
int ret;
|
||||
|
||||
/* Attach and enable the IRQ */
|
||||
/* Attach the IRQ */
|
||||
|
||||
ret = irq_attach(priv->irq, ez80_interrrupt);
|
||||
if (ret == OK)
|
||||
{
|
||||
/* Enable the interrupt (RX and TX interrupts are still disabled
|
||||
* in the UART
|
||||
*/
|
||||
|
||||
up_enable_irq(priv->irq);
|
||||
}
|
||||
return ret;
|
||||
return irq_attach(priv->irq, ez80_interrrupt);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -444,7 +435,7 @@ static int ez80_attach(struct uart_dev_s *dev)
|
||||
static void ez80_detach(struct uart_dev_s *dev)
|
||||
{
|
||||
struct ez80_dev_s *priv = (struct ez80_dev_s*)dev->priv;
|
||||
up_disable_irq(priv->irq);
|
||||
ez80_disableuartint(priv);
|
||||
irq_detach(priv->irq);
|
||||
}
|
||||
|
||||
@ -726,15 +717,15 @@ int up_putc(int ch)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_UART1_SERIAL_CONSOLE
|
||||
# define ez80_getreg(offs) getreg8((EZ80_UART1_BASE+(offs)))
|
||||
# define ez80_putreg(val,offs) putreg8((val), (EZ80_UART1_BASE+(offs)))
|
||||
# define ez80_inp(offs) inp((EZ80_UART1_BASE+(offs)))
|
||||
# define ez80_outp(offs,val) outp((EZ80_UART1_BASE+(offs)), (val))
|
||||
#else
|
||||
# define ez80_getreg(offs) getreg8((EZ80_UART0_BASE+(offs)))
|
||||
# define ez80_putreg(val,offs) putreg8((val), (EZ80_UART0_BASE+(offs)))
|
||||
# define ez80_inp(offs) inp((EZ80_UART0_BASE+(offs)))
|
||||
# define ez80_outp(offs,val) outp((EZ80_UART0_BASE+(offs)), (val))
|
||||
#endif
|
||||
|
||||
#define ez80_txready() ((ez80_getreg(EZ80_UART_LSR) & EZ80_UARTLSR_THRE) != 0)
|
||||
#define ez80_send(ch) ez80_putreg(ch, EZ80_UART_THR)
|
||||
#define ez80_txready() ((ez80_inp(EZ80_UART_LSR) & EZ80_UARTLSR_THRE) != 0)
|
||||
#define ez80_send(ch) ez80_outp(EZ80_UART_THR, ch)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
|
||||
@ -42,6 +42,7 @@
|
||||
#include <sys/types.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <arch/io.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include "chip/chip.h"
|
||||
@ -85,11 +86,11 @@ int up_timerisr(int irq, chipreg_t *regs)
|
||||
/* Read the appropropriate timer0 registr to clear the interrupt */
|
||||
|
||||
#ifdef _EZ80F91
|
||||
reg = getreg8(EZ80_TMR0_IIR);
|
||||
reg = inp(EZ80_TMR0_IIR);
|
||||
#else
|
||||
/* _EZ80190, _EZ80L92, _EZ80F92, _EZ80F93 */
|
||||
|
||||
reg = getreg8(EZ80_TMR0_CTL);
|
||||
reg = inp(EZ80_TMR0_CTL);
|
||||
#endif
|
||||
|
||||
/* Process timer interrupt */
|
||||
@ -112,13 +113,13 @@ void up_timerinit(void)
|
||||
uint16 reload;
|
||||
ubyte reg;
|
||||
|
||||
/* Disable timer0 interrupts */
|
||||
|
||||
up_disable_irq(EZ80_IRQ_SYSTIMER);
|
||||
|
||||
/* Disable the timer */
|
||||
|
||||
putreg8(0x00, EZ80_TMR0_CTL);
|
||||
outp(EZ80_TMR0_CTL, 0x00);
|
||||
|
||||
/* Attach system timer interrupts */
|
||||
|
||||
irq_attach(EZ80_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
|
||||
|
||||
/* Set up the timer reload value */
|
||||
/* Write to the timer reload register to set the reload value.
|
||||
@ -138,35 +139,30 @@ void up_timerinit(void)
|
||||
*/
|
||||
|
||||
reload = (uint16)(_DEFCLK / 1600);
|
||||
putreg8((ubyte)(reload >> 8), EZ80_TMR0_RRH);
|
||||
putreg8((ubyte)(reload), EZ80_TMR0_RRL);
|
||||
outp(EZ80_TMR0_RRH, (ubyte)(reload >> 8));
|
||||
outp(EZ80_TMR0_RRL, (ubyte)(reload));
|
||||
|
||||
/* Clear any pending timer interrupts */
|
||||
|
||||
#if defined(_EZ80F91)
|
||||
reg = getreg8(EZ80_TMR0_IIR);
|
||||
reg = inp(EZ80_TMR0_IIR);
|
||||
#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
|
||||
reg = getreg8(EZ80_TMR0_CTL);
|
||||
reg = inp(EZ80_TMR0_CTL);
|
||||
#endif
|
||||
|
||||
/* Configure and enable the timer */
|
||||
|
||||
#if defined(_EZ80190)
|
||||
putreg8(0x5f, EZ80_TMR0_CTL);
|
||||
outp(EZ80_TMR0_CTL, 0x5f);
|
||||
#elif defined(_EZ80F91)
|
||||
putreg8((EZ80_TMRCLKDIV_16|EZ80_TMRCTL_TIMCONT|EZ80_TMRCTL_RLD|EZ80_TMRCTL_TIMEN), EZ80_TMR0_CTL);
|
||||
outp(EZ80_TMR0_CTL, (EZ80_TMRCLKDIV_16|EZ80_TMRCTL_TIMCONT|EZ80_TMRCTL_RLD|EZ80_TMRCTL_TIMEN));
|
||||
#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
|
||||
putreg8(0x57, EZ80_TMR0_CTL);
|
||||
outp(EZ80_TMR0_CTL, 0x57);
|
||||
#endif
|
||||
|
||||
/* Enable timer end-of-count interrupts */
|
||||
|
||||
#if defined(_EZ80F91)
|
||||
putreg8(EZ80_TMRIER_EOCEN, EZ80_TMR0_IER);
|
||||
outp(EZ80_TMR0_IER, EZ80_TMRIER_EOCEN);
|
||||
#endif
|
||||
|
||||
/* Attach and enable the timer */
|
||||
|
||||
irq_attach(EZ80_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
|
||||
up_enable_irq(EZ80_IRQ_SYSTIMER);
|
||||
}
|
||||
|
||||
@ -379,7 +379,18 @@ EXTERN boolean up_interrupt_context(void);
|
||||
* Name: up_enable_irq
|
||||
*
|
||||
* Description:
|
||||
* Enable the IRQ specified by 'irq'
|
||||
* On many architectures, there are three levels of interrupt enabling: (1)
|
||||
* at the global level, (2) at the level of the interrupt controller,
|
||||
* and (3) at the device level. In order to receive interrupts, they
|
||||
* must be enabled at all three levels.
|
||||
*
|
||||
* This function implements enabling of the device specified by 'irq'
|
||||
* at the interrupt controller level if supported by the architecture
|
||||
* (irqsave() supports the global level, the device level is hardware
|
||||
* specific).
|
||||
*
|
||||
* Since this API is not supported on all architectures, it should be
|
||||
* avoided in common implementations where possible.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
@ -389,7 +400,13 @@ EXTERN void up_enable_irq(int irq);
|
||||
* Name: up_disable_irq
|
||||
*
|
||||
* Description:
|
||||
* Disable the IRQ specified by 'irq'
|
||||
* This function implements disabling of the device specified by 'irq'
|
||||
* at the interrupt controller level if supported by the architecture
|
||||
* (irqsave() supports the global level, the device level is hardware
|
||||
* specific).
|
||||
*
|
||||
* Since this API is not supported on all architectures, it should be
|
||||
* avoided in common implementations where possible.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user