SAMA5D4 EMAC: Add a kludge to work around a suspected hardware issue
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@ -1124,6 +1124,9 @@ Networking
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configuration options. The SAMA5D44 supports two different 10/100Base-T
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configuration options. The SAMA5D44 supports two different 10/100Base-T
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Ethernet MAC peripherals.
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Ethernet MAC peripherals.
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NOTE: See the "kludge" for EMAC that is documented in the To-Do
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list at the end of this README file.
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------------------------------ ------------------- -------------------------
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------------------------------ ------------------- -------------------------
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SAMA5D4 PIO SAMA5D4-MB KSZ8081RNB
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SAMA5D4 PIO SAMA5D4-MB KSZ8081RNB
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------------------------------ ------------------- -------------------------
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------------------------------ ------------------- -------------------------
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@ -3392,6 +3395,9 @@ Configurations
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large if no network is attached (A production design would bring up
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large if no network is attached (A production design would bring up
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the network asynchronously to avoid these start up delays).
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the network asynchronously to avoid these start up delays).
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See the "kludge" for EMAC that is documented in the To-Do list at
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the end of this README file.
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12. The SAMA5D4-EK includes for an AT25 serial DataFlash. That support is
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12. The SAMA5D4-EK includes for an AT25 serial DataFlash. That support is
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NOT enabled in this configuration. Support for that serial FLASH can
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NOT enabled in this configuration. Support for that serial FLASH can
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be enabled by modifying the NuttX configuration as described above in
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be enabled by modifying the NuttX configuration as described above in
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@ -3492,7 +3498,37 @@ To-Do List
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Also, we should be receiving interrupts when an SD card is inserted or
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Also, we should be receiving interrupts when an SD card is inserted or
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removed; we are not.
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removed; we are not.
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4) Some drivers may require some adjustments if you intend to run from SDRAM.
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4) There is a kludge in place in the Ethernet code to work around a problem
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that I see. The problem that I see is as follows:
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a. To send packets, the software keeps a queue of TX descriptors in
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memory.
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b. When a packet is ready to be sent, the software clears bit 31 of a
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status word in the descriptor meaning that the descriptor now
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"belongs" to the hardware.
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c. The hardware sets bit 31 in memory when the transfer completes.
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The problem that I see is that:
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d. Occasionally bit 31 of the status word is not cleared even though
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the Ethernet packet was successfully sent.
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Since the software does not see bit 31 set, it seems like the transfer
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did not complete and the Ethernet locks up.
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The workaround/kludge that is in place makes this assumption: If an
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Ethernet transfer complete interrupt is received, then at least one
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packet must have completed. In this case, the software ignores
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checking the USED bit for one packet.
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With this kludge in place, the driver appears to work fine. However,
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there is a danger to what I have done: If a spurious interrupt
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occurs, than the USED bit would not be set and the transfer would be
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lost.
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5) Some drivers may require some adjustments if you intend to run from SDRAM.
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That is because in this case macros like BOARD_MCK_FREQUENCY are not constants
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That is because in this case macros like BOARD_MCK_FREQUENCY are not constants
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but are instead function calls: The MCK clock frequency is not known in
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but are instead function calls: The MCK clock frequency is not known in
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advance but instead has to be calculated from the bootloader PLL configuration.
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advance but instead has to be calculated from the bootloader PLL configuration.
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