From c96a33a12ff43f4d16ab4396a386f3104af685ff Mon Sep 17 00:00:00 2001 From: Windrow14 Date: Mon, 19 Aug 2024 11:27:35 +0800 Subject: [PATCH] drivers/mmcsd/mmcsd_sdio.c: enable clock before issue CMD0 In mmcsd_cardidentify(), the clock is not enabled before issuing CMD0, and the clock has been disabled in mmcsd_removed(). It makes no sense to enable the clock after issuing CMD0, because when CMD0 is issued, it will exit with error due to the clock is not enabled. Signed-off-by: Yinzhe Wu Reviewed-by: Yuezhang Mo Reviewed-by: Jacky Cao Tested-by: Yinzhe Wu --- drivers/mmcsd/mmcsd_sdio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c index eacdb09e60..3ee7eb2680 100644 --- a/drivers/mmcsd/mmcsd_sdio.c +++ b/drivers/mmcsd/mmcsd_sdio.c @@ -3463,6 +3463,10 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv) return -ENODEV; } + /* Set ID mode clocking (<400KHz) */ + + SDIO_CLOCK(priv->dev, CLOCK_IDMODE); + /* For eMMC, Send CMD0 with argument 0xf0f0f0f0 as per JEDEC v4.41 * for pre-idle. No effect for SD. */ @@ -3470,10 +3474,6 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv) mmcsd_sendcmdpoll(priv, MMCSD_CMD0, 0xf0f0f0f0); nxsig_usleep(MMCSD_IDLE_DELAY); - /* Set ID mode clocking (<400KHz) */ - - SDIO_CLOCK(priv->dev, CLOCK_IDMODE); - /* After power up at least 74 clock cycles are required prior to starting * bus communication */