include/nuttx/timers/pwm.h: Correct some typos. arch/arm/src/stm32f0l0g0: Add PWM support.
This commit is contained in:
Daniel Pereira Volpato
Gregory Nutt
parent
2a271a5d62
commit
ca52e33ba9
@ -1451,6 +1451,9 @@ config STM32F0L0G0_I2C
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config STM32F0L0G0_CAN
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bool
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config STM32F0L0G0_PWM
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bool
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config STM32F0L0G0_USART
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bool
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@ -1463,6 +1466,804 @@ config STM32F0L0G0_SERIALDRIVER
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config STM32F0L0G0_1WIREDRIVER
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bool
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menu "Timer Configuration"
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config STM32F0L0G0_TIM1_PWM
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bool "TIM1 PWM"
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default n
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depends on STM32F0L0G0_TIM1
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select PWM
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select STM32F0L0G0_PWM
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select ARCH_HAVE_PWM_PULSECOUNT
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---help---
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Reserve timer 1 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If
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STM32F0L0G0_TIM1 is defined then THIS option may also be defined to
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indicate that the timer is intended to be used for pulsed output modulation.
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Valid channel modes:
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0 -> PWM Mode 1
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1 -> PWM Mode 2
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2 -> Combined PWM mode 1
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3 -> Combined PWM mode 2
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4 -> Asymmetric PWM mode 1
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5 -> Asymmetric PWM mode 2
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if STM32F0L0G0_TIM1_PWM
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config STM32F0L0G0_TIM1_MODE
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int "TIM1 Mode"
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default 0
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range 0 4
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---help---
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Specifies the timer mode:
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0 -> Upcounting mode
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1 -> Downcounting mode
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2 -> Center-aligned mode 1
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3 -> Center-aligned mode 2
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4 -> Center-aligned mode 3
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if STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM1_CHANNEL1
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bool "TIM1 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F0L0G0_TIM1_CHANNEL1
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config STM32F0L0G0_TIM1_CH1MODE
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int "TIM1 Channel 1 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM1_PWM description for available modes.
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config STM32F0L0G0_TIM1_CH1OUT
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bool "TIM1 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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config STM32F0L0G0_TIM1_CH1NOUT
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bool "TIM1 Channel 1 Complementary Output"
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default n
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depends on STM32F0L0G0_TIM1_CH1OUT
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---help---
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Enables channel 1 complementary output.
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endif # STM32F0L0G0_TIM1_CHANNEL1
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config STM32F0L0G0_TIM1_CHANNEL2
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bool "TIM1 Channel 2"
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default n
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---help---
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Enables channel 2.
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if STM32F0L0G0_TIM1_CHANNEL2
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config STM32F0L0G0_TIM1_CH2MODE
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int "TIM1 Channel 2 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM1_PWM description for available modes.
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config STM32F0L0G0_TIM1_CH2OUT
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bool "TIM1 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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config STM32F0L0G0_TIM1_CH2NOUT
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bool "TIM1 Channel 2 Complementary Output"
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default n
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depends on STM32F0L0G0_TIM1_CH2OUT
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---help---
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Enables channel 2 complementary output.
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endif # STM32F0L0G0_TIM1_CHANNEL2
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config STM32F0L0G0_TIM1_CHANNEL3
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bool "TIM1 Channel 3"
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default n
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---help---
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Enables channel 3.
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if STM32F0L0G0_TIM1_CHANNEL3
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config STM32F0L0G0_TIM1_CH3MODE
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int "TIM1 Channel 3 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM1_PWM description for available modes.
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config STM32F0L0G0_TIM1_CH3OUT
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bool "TIM1 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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config STM32F0L0G0_TIM1_CH3NOUT
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bool "TIM1 Channel 3 Complementary Output"
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default n
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depends on STM32F0L0G0_TIM1_CH3OUT
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---help---
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Enables channel 3 complementary output.
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endif # STM32F0L0G0_TIM1_CHANNEL3
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config STM32F0L0G0_TIM1_CHANNEL4
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bool "TIM1 Channel 4"
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default n
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---help---
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Enables channel 4.
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if STM32F0L0G0_TIM1_CHANNEL4
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config STM32F0L0G0_TIM1_CH4MODE
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int "TIM1 Channel 4 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM1_PWM description for available modes.
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config STM32F0L0G0_TIM1_CH4OUT
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bool "TIM1 Channel 4 Output"
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default n
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---help---
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Enables channel 4 output.
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endif # STM32F0L0G0_TIM1_CHANNEL4
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endif # STM32F0L0G0_PWM_MULTICHAN
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if !STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM1_CHANNEL
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int "TIM1 PWM Output Channel"
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default 1
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range 1 4
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---help---
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If TIM1 is enabled for PWM usage, you also need specifies the timer output
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channel {1,..,4}
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config STM32F0L0G0_TIM1_CHMODE
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int "TIM1 Channel Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM1_PWM description for available modes.
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endif # !STM32F0L0G0_PWM_MULTICHAN
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endif # STM32F0L0G0_TIM1_PWM
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config STM32F0L0G0_TIM2_PWM
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bool "TIM2 PWM"
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default n
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depends on STM32F0L0G0_TIM2
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select PWM
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select STM32F0L0G0_PWM
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select ARCH_HAVE_PWM_PULSECOUNT
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---help---
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Reserve timer 2 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If
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STM32F0L0G0_TIM2 is defined then THIS option may also be defined to
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indicate that the timer is intended to be used for pulsed output modulation.
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Valid channel modes:
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0 -> PWM Mode 1
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1 -> PWM Mode 2
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2 -> Combined PWM mode 1
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3 -> Combined PWM mode 2
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4 -> Asymmetric PWM mode 1
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5 -> Asymmetric PWM mode 2
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if STM32F0L0G0_TIM2_PWM
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config STM32F0L0G0_TIM2_MODE
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int "TIM2 Mode"
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default 0
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range 0 4
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---help---
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Specifies the timer mode:
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0 -> Upcounting mode
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1 -> Downcounting mode
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2 -> Center-aligned mode 1
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3 -> Center-aligned mode 2
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4 -> Center-aligned mode 3
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if STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM2_CHANNEL1
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bool "TIM2 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F0L0G0_TIM2_CHANNEL1
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config STM32F0L0G0_TIM2_CH1MODE
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int "TIM2 Channel 1 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM2_PWM description for available modes.
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config STM32F0L0G0_TIM2_CH1OUT
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bool "TIM2 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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endif # STM32F0L0G0_TIM2_CHANNEL1
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config STM32F0L0G0_TIM2_CHANNEL2
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bool "TIM2 Channel 2"
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default n
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---help---
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Enables channel 2.
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if STM32F0L0G0_TIM2_CHANNEL2
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config STM32F0L0G0_TIM2_CH2MODE
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int "TIM2 Channel 2 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM2_PWM description for available modes.
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config STM32F0L0G0_TIM2_CH2OUT
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bool "TIM2 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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endif # STM32F0L0G0_TIM2_CHANNEL2
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config STM32F0L0G0_TIM2_CHANNEL3
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bool "TIM2 Channel 3"
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default n
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---help---
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Enables channel 3.
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if STM32F0L0G0_TIM2_CHANNEL3
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config STM32F0L0G0_TIM2_CH3MODE
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int "TIM2 Channel 3 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM2_PWM description for available modes.
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config STM32F0L0G0_TIM2_CH3OUT
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bool "TIM2 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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endif # STM32F0L0G0_TIM2_CHANNEL3
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config STM32F0L0G0_TIM2_CHANNEL4
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bool "TIM2 Channel 4"
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default n
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---help---
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Enables channel 4.
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if STM32F0L0G0_TIM2_CHANNEL4
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config STM32F0L0G0_TIM2_CH4MODE
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int "TIM2 Channel 4 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM2_PWM description for available modes.
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config STM32F0L0G0_TIM2_CH4OUT
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bool "TIM2 Channel 4 Output"
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default n
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---help---
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Enables channel 4 output.
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endif # STM32F0L0G0_TIM2_CHANNEL4
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endif # STM32F0L0G0_PWM_MULTICHAN
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if !STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM2_CHANNEL
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int "TIM2 PWM Output Channel"
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default 1
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range 1 4
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---help---
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If TIM2 is enabled for PWM usage, you also need specifies the timer output
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channel {1,..,4}
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config STM32F0L0G0_TIM2_CHMODE
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int "TIM2 Channel Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM2_PWM description for available modes.
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endif # !STM32F0L0G0_PWM_MULTICHAN
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endif # STM32F0L0G0_TIM2_PWM
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config STM32F0L0G0_TIM3_PWM
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bool "TIM3 PWM"
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default n
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depends on STM32F0L0G0_TIM3
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select PWM
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select STM32F0L0G0_PWM
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select ARCH_HAVE_PWM_PULSECOUNT
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---help---
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Reserve timer 3 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If
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STM32F0L0G0_TIM3 is defined then THIS option may also be defined to
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indicate that the timer is intended to be used for pulsed output modulation.
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Valid channel modes:
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0 -> PWM Mode 1
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1 -> PWM Mode 2
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2 -> Combined PWM mode 1
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3 -> Combined PWM mode 2
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4 -> Asymmetric PWM mode 1
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5 -> Asymmetric PWM mode 2
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if STM32F0L0G0_TIM3_PWM
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config STM32F0L0G0_TIM3_MODE
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int "TIM3 Mode"
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default 0
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range 0 4
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---help---
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Specifies the timer mode:
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0 -> Upcounting mode
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1 -> Downcounting mode
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2 -> Center-aligned mode 1
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3 -> Center-aligned mode 2
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4 -> Center-aligned mode 3
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if STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM3_CHANNEL1
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bool "TIM3 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F0L0G0_TIM3_CHANNEL1
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config STM32F0L0G0_TIM3_CH1MODE
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int "TIM3 Channel 1 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM3_PWM description for available modes.
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config STM32F0L0G0_TIM3_CH1OUT
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bool "TIM3 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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endif # STM32F0L0G0_TIM3_CHANNEL1
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config STM32F0L0G0_TIM3_CHANNEL2
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bool "TIM3 Channel 2"
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default n
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---help---
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Enables channel 2.
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if STM32F0L0G0_TIM3_CHANNEL2
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config STM32F0L0G0_TIM3_CH2MODE
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int "TIM3 Channel 2 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM3_PWM description for available modes.
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config STM32F0L0G0_TIM3_CH2OUT
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bool "TIM3 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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endif # STM32F0L0G0_TIM3_CHANNEL2
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config STM32F0L0G0_TIM3_CHANNEL3
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bool "TIM3 Channel 3"
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default n
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---help---
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Enables channel 3.
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if STM32F0L0G0_TIM3_CHANNEL3
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config STM32F0L0G0_TIM3_CH3MODE
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int "TIM3 Channel 3 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM3_PWM description for available modes.
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config STM32F0L0G0_TIM3_CH3OUT
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bool "TIM3 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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endif # STM32F0L0G0_TIM3_CHANNEL3
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config STM32F0L0G0_TIM3_CHANNEL4
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bool "TIM3 Channel 4"
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default n
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---help---
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Enables channel 4.
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if STM32F0L0G0_TIM3_CHANNEL4
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config STM32F0L0G0_TIM3_CH4MODE
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int "TIM3 Channel 4 Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM3_PWM description for available modes.
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config STM32F0L0G0_TIM3_CH4OUT
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bool "TIM3 Channel 4 Output"
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default n
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---help---
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Enables channel 4 output.
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endif # STM32F0L0G0_TIM3_CHANNEL4
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endif # STM32F0L0G0_PWM_MULTICHAN
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if !STM32F0L0G0_PWM_MULTICHAN
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config STM32F0L0G0_TIM3_CHANNEL
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int "TIM3 PWM Output Channel"
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default 1
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range 1 4
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---help---
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If TIM3 is enabled for PWM usage, you also need specifies the timer output
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channel {1,..,4}
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config STM32F0L0G0_TIM3_CHMODE
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int "TIM3 Channel Mode"
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default 0
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range 0 5
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---help---
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Specifies the channel mode. See STM32F0L0G0_TIM3_PWM description for available modes.
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endif # !STM32F0L0G0_PWM_MULTICHAN
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endif # STM32F0L0G0_TIM3_PWM
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config STM32F0L0G0_TIM14_PWM
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bool "TIM14 PWM"
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default n
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depends on STM32F0L0G0_TIM14
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select PWM
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---help---
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Reserve timer 14 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If STM32F0L0G0_TIM14
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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|
||||
if STM32F0L0G0_TIM14_PWM
|
||||
|
||||
if STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM14_CHANNEL1
|
||||
bool "TIM14 Channel 1"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1.
|
||||
|
||||
if STM32F0L0G0_TIM14_CHANNEL1
|
||||
|
||||
config STM32F0L0G0_TIM14_CH1MODE
|
||||
int "TIM14 Channel 1 Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
config STM32F0L0G0_TIM14_CH1OUT
|
||||
bool "TIM14 Channel 1 Output"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1 output.
|
||||
|
||||
endif # STM32F0L0G0_TIM14_CHANNEL1
|
||||
|
||||
endif # STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
if !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM14_CHANNEL
|
||||
int "TIM14 PWM Output Channel"
|
||||
default 1
|
||||
range 1 1
|
||||
---help---
|
||||
If TIM14 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {1}
|
||||
|
||||
config STM32F0L0G0_TIM14_CHMODE
|
||||
int "TIM14 Channel Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
endif # !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
endif # STM32F0L0G0_TIM14_PWM
|
||||
|
||||
config STM32F0L0G0_TIM15_PWM
|
||||
bool "TIM15 PWM"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM15
|
||||
select PWM
|
||||
---help---
|
||||
Reserve timer 15 for use by PWM
|
||||
|
||||
Timer devices may be used for different purposes. One special purpose is
|
||||
to generate modulated outputs for such things as motor control. If STM32F0L0G0_TIM15
|
||||
is defined then THIS following may also be defined to indicate that
|
||||
the timer is intended to be used for pulsed output modulation.
|
||||
|
||||
if STM32F0L0G0_TIM15_PWM
|
||||
|
||||
if STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM15_CHANNEL1
|
||||
bool "TIM15 Channel 1"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1.
|
||||
|
||||
if STM32F0L0G0_TIM15_CHANNEL1
|
||||
|
||||
config STM32F0L0G0_TIM15_CH1MODE
|
||||
int "TIM15 Channel 1 Mode"
|
||||
default 0
|
||||
range 0 3
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
config STM32F0L0G0_TIM15_CH1OUT
|
||||
bool "TIM15 Channel 1 Output"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1 output.
|
||||
|
||||
config STM32F0L0G0_TIM15_CH1NOUT
|
||||
bool "TIM15 Channel 1 Complementary Output"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM15_CH1OUT
|
||||
---help---
|
||||
Enables channel 1 complementary output.
|
||||
|
||||
endif # STM32F0L0G0_TIM15_CHANNEL1
|
||||
|
||||
config STM32F0L0G0_TIM15_CHANNEL2
|
||||
bool "TIM15 Channel 2"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 2.
|
||||
|
||||
if STM32F0L0G0_TIM15_CHANNEL2
|
||||
|
||||
config STM32F0L0G0_TIM15_CH2MODE
|
||||
int "TIM15 Channel 2 Mode"
|
||||
default 0
|
||||
range 0 3
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
config STM32F0L0G0_TIM15_CH2OUT
|
||||
bool "TIM15 Channel 2 Output"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 2 output.
|
||||
|
||||
endif # STM32F0L0G0_TIM15_CHANNEL2
|
||||
|
||||
endif # STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
if !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM15_CHANNEL
|
||||
int "TIM15 PWM Output Channel"
|
||||
default 1
|
||||
range 1 2
|
||||
---help---
|
||||
If TIM15 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {1,2}
|
||||
|
||||
config STM32F0L0G0_TIM15_CHMODE
|
||||
int "TIM15 Channel Mode"
|
||||
default 0
|
||||
range 0 3
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
endif # !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
endif # STM32F0L0G0_TIM15_PWM
|
||||
|
||||
config STM32F0L0G0_TIM16_PWM
|
||||
bool "TIM16 PWM"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM16
|
||||
select PWM
|
||||
---help---
|
||||
Reserve timer 16 for use by PWM
|
||||
|
||||
Timer devices may be used for different purposes. One special purpose is
|
||||
to generate modulated outputs for such things as motor control. If STM32F0L0G0_TIM16
|
||||
is defined then THIS following may also be defined to indicate that
|
||||
the timer is intended to be used for pulsed output modulation.
|
||||
|
||||
if STM32F0L0G0_TIM16_PWM
|
||||
|
||||
if STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM16_CHANNEL1
|
||||
bool "TIM16 Channel 1"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1.
|
||||
|
||||
if STM32F0L0G0_TIM16_CHANNEL1
|
||||
|
||||
config STM32F0L0G0_TIM16_CH1MODE
|
||||
int "TIM16 Channel 1 Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
config STM32F0L0G0_TIM16_CH1OUT
|
||||
bool "TIM16 Channel 1 Output"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1 output.
|
||||
|
||||
config STM32F0L0G0_TIM16_CH1NOUT
|
||||
bool "TIM16 Channel 1 Complementary Output"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM16_CH1OUT
|
||||
---help---
|
||||
Enables channel 1 complementary output.
|
||||
|
||||
endif # STM32F0L0G0_TIM16_CHANNEL1
|
||||
|
||||
endif # STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
if !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM16_CHANNEL
|
||||
int "TIM16 PWM Output Channel"
|
||||
default 1
|
||||
range 1 1
|
||||
---help---
|
||||
If TIM16 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {1}
|
||||
|
||||
config STM32F0L0G0_TIM16_CHMODE
|
||||
int "TIM16 Channel Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
endif # !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
endif # STM32F0L0G0_TIM16_PWM
|
||||
|
||||
config STM32F0L0G0_TIM17_PWM
|
||||
bool "TIM17 PWM"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM17
|
||||
select PWM
|
||||
---help---
|
||||
Reserve timer 17 for use by PWM
|
||||
|
||||
Timer devices may be used for different purposes. One special purpose is
|
||||
to generate modulated outputs for such things as motor control. If STM32F0L0G0_TIM17
|
||||
is defined then THIS following may also be defined to indicate that
|
||||
the timer is intended to be used for pulsed output modulation.
|
||||
|
||||
if STM32F0L0G0_TIM17_PWM
|
||||
|
||||
if STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM17_CHANNEL1
|
||||
bool "TIM17 Channel 1"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1.
|
||||
|
||||
if STM32F0L0G0_TIM17_CHANNEL1
|
||||
|
||||
config STM32F0L0G0_TIM17_CH1MODE
|
||||
int "TIM17 Channel 1 Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
config STM32F0L0G0_TIM17_CH1OUT
|
||||
bool "TIM17 Channel 1 Output"
|
||||
default n
|
||||
---help---
|
||||
Enables channel 1 output.
|
||||
|
||||
config STM32F0L0G0_TIM17_CH1NOUT
|
||||
bool "TIM17 Channel 1 Complementary Output"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM17_CH1OUT
|
||||
---help---
|
||||
Enables channel 1 complementary output.
|
||||
|
||||
endif # STM32F0L0G0_TIM17_CHANNEL1
|
||||
|
||||
endif # STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
if !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
config STM32F0L0G0_TIM17_CHANNEL
|
||||
int "TIM17 PWM Output Channel"
|
||||
default 1
|
||||
range 1 1
|
||||
---help---
|
||||
If TIM17 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {1}
|
||||
|
||||
config STM32F0L0G0_TIM17_CHMODE
|
||||
int "TIM17 Channel Mode"
|
||||
default 0
|
||||
range 0 1
|
||||
---help---
|
||||
Specifies the channel mode.
|
||||
|
||||
endif # !STM32F0L0G0_PWM_MULTICHAN
|
||||
|
||||
endif # STM32F0L0G0_TIM17_PWM
|
||||
|
||||
config STM32F0L0G0_PWM_MULTICHAN
|
||||
bool "PWM Multiple Output Channels"
|
||||
default n
|
||||
depends on STM32F0L0G0_TIM1_PWM || STM32F0L0G0_TIM2_PWM || STM32F0L0G0_TIM3_PWM || STM32F0L0G0_TIM15_PWM
|
||||
select ARCH_HAVE_PWM_MULTICHAN
|
||||
select PWM_MULTICHAN
|
||||
---help---
|
||||
Specifies that the PWM driver supports multiple output channels per timer.
|
||||
|
||||
endmenu # Timer Configuration
|
||||
|
||||
menu "U[S]ART Configuration"
|
||||
depends on STM32F0L0G0_USART
|
||||
|
||||
|
||||
@ -91,27 +91,39 @@
|
||||
#define GPIO_TIM1_BKIN2_1 (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM1_BKIN2_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN14)
|
||||
#define GPIO_TIM1_BKIN2_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH1_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN8)
|
||||
#define GPIO_TIM1_CH1_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN8)
|
||||
#define GPIO_TIM1_CH1N_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM1_CH1N_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN13)
|
||||
#define GPIO_TIM1_CH1N_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN2)
|
||||
#define GPIO_TIM1_CH2_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH2_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM1_CH2_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH2N_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM1_CH2N_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN14)
|
||||
#define GPIO_TIM1_CH2N_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN3)
|
||||
#define GPIO_TIM1_CH3_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH3_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM1_CH3_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH3N_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN1)
|
||||
#define GPIO_TIM1_CH3N_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN15)
|
||||
#define GPIO_TIM1_CH3N_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN4)
|
||||
#define GPIO_TIM1_CH4_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM1_CH4_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN11)
|
||||
#define GPIO_TIM1_CH1OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN8)
|
||||
#define GPIO_TIM1_CH1OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN8)
|
||||
#define GPIO_TIM1_CH1NOUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM1_CH1NOUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN13)
|
||||
#define GPIO_TIM1_CH1NOUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN2)
|
||||
#define GPIO_TIM1_CH2OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH2OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM1_CH2OUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH2NOUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM1_CH2NOUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN14)
|
||||
#define GPIO_TIM1_CH2NOUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN3)
|
||||
#define GPIO_TIM1_CH3OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH3OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM1_CH3OUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH3NOUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN1)
|
||||
#define GPIO_TIM1_CH3NOUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTB | GPIO_PIN15)
|
||||
#define GPIO_TIM1_CH3NOUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN4)
|
||||
#define GPIO_TIM1_CH4OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM1_CH4OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_PORTC | GPIO_PIN11)
|
||||
#define GPIO_TIM1_ETR (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN12)
|
||||
|
||||
#define GPIO_TIM3_CH1OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM3_CH1OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM3_CH1OUT_3 (GPIO_ALT | GPIO_AF1 | GPIO_PORTC | GPIO_PIN6)
|
||||
#define GPIO_TIM3_CH2OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM3_CH2OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM3_CH2OUT_3 (GPIO_ALT | GPIO_AF1 | GPIO_PORTC | GPIO_PIN7)
|
||||
#define GPIO_TIM3_CH3OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM3_CH3OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTC | GPIO_PIN8)
|
||||
#define GPIO_TIM3_CH4OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN1)
|
||||
#define GPIO_TIM3_CH4OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_PORTC | GPIO_PIN9)
|
||||
#define GPIO_TIM3_ETR (GPIO_ALT | GPIO_AF1 | GPIO_PORTD | GPIO_PIN2)
|
||||
|
||||
/* TODO: USART */
|
||||
|
||||
#define GPIO_USART1_CTS_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTA | GPIO_PIN11)
|
||||
|
||||
2028
arch/arm/src/stm32f0l0g0/stm32_pwm.c
Normal file
2028
arch/arm/src/stm32f0l0g0/stm32_pwm.c
Normal file
File diff suppressed because it is too large
Load Diff
539
arch/arm/src/stm32f0l0g0/stm32_pwm.h
Normal file
539
arch/arm/src/stm32f0l0g0/stm32_pwm.h
Normal file
@ -0,0 +1,539 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32f0l0g0/stm32_pwm.h
|
||||
*
|
||||
* Copyright (C) 2019 Fundação CERTI. All rights reserved.
|
||||
* Author: Daniel Pereira Volpato <dpo@certi.org.br>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H
|
||||
#define __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H
|
||||
|
||||
/* The STM32F0L0G0 does not have dedicated PWM hardware. Rather, pulsed
|
||||
* output control is a capability of the STM32F0L0G0 timers. The logic in
|
||||
* this file implements the lower half of the standard, NuttX PWM interface
|
||||
* using the STM32F0L0G0 timers. That interface is described in
|
||||
* include/nuttx/timers/pwm.h.
|
||||
*/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Configuration ********************************************************************/
|
||||
|
||||
/* Timer devices may be used for different purposes. One special purpose is
|
||||
* to generate modulated outputs for such things as motor control. If
|
||||
* CONFIG_STM32F0L0G0_TIMn is defined then the CONFIG_STM32F0L0G0_TIMn_PWM must also
|
||||
* be defined to indicate that timer "n" is intended to be used for pulsed output
|
||||
* signal generation.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM1
|
||||
# undef CONFIG_STM32F0L0G0_TIM1_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM2
|
||||
# undef CONFIG_STM32F0L0G0_TIM2_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM3
|
||||
# undef CONFIG_STM32F0L0G0_TIM3_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM14
|
||||
# undef CONFIG_STM32F0L0G0_TIM14_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM15
|
||||
# undef CONFIG_STM32F0L0G0_TIM15_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM16
|
||||
# undef CONFIG_STM32F0L0G0_TIM16_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_STM32F0L0G0_TIM17
|
||||
# undef CONFIG_STM32F0L0G0_TIM17_PWM
|
||||
#endif
|
||||
|
||||
/* The basic timers (timer 6 and 7) are not capable of generating output pulses */
|
||||
|
||||
#undef CONFIG_STM32F0L0G0_TIM6_PWM
|
||||
#undef CONFIG_STM32F0L0G0_TIM7_PWM
|
||||
|
||||
/* Check if PWM support for any channel is enabled. */
|
||||
|
||||
#if defined(CONFIG_STM32F0L0G0_TIM1_PWM) || defined(CONFIG_STM32F0L0G0_TIM2_PWM) || \
|
||||
defined(CONFIG_STM32F0L0G0_TIM3_PWM) || defined(CONFIG_STM32F0L0G0_TIM14_PWM) || \
|
||||
defined(CONFIG_STM32F0L0G0_TIM15_PWM) || defined(CONFIG_STM32F0L0G0_TIM16_PWM) || \
|
||||
defined(CONFIG_STM32F0L0G0_TIM17_PWM)
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "hardware/stm32_tim.h"
|
||||
|
||||
#ifdef CONFIG_PWM_MULTICHAN
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH1OUT
|
||||
# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM1_CH1CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH1NOUT
|
||||
# define PWM_TIM1_CH1NCFG GPIO_TIM1_CH1NOUT
|
||||
# else
|
||||
# define PWM_TIM1_CH1NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM1_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM1_CHANNEL1 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL2
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH2OUT
|
||||
# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT
|
||||
# else
|
||||
# define PWM_TIM1_CH2CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH2NOUT
|
||||
# define PWM_TIM1_CH2NCFG GPIO_TIM1_CH2NOUT
|
||||
# else
|
||||
# define PWM_TIM1_CH2NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM1_CHANNEL2 1
|
||||
#else
|
||||
# define PWM_TIM1_CHANNEL2 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL3
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH3OUT
|
||||
# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT
|
||||
# else
|
||||
# define PWM_TIM1_CH3CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH3NOUT
|
||||
# define PWM_TIM1_CH3NCFG GPIO_TIM1_CH3NOUT
|
||||
# else
|
||||
# define PWM_TIM1_CH3NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM1_CHANNEL3 1
|
||||
#else
|
||||
# define PWM_TIM1_CHANNEL3 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL4
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM1_CH4OUT
|
||||
# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT
|
||||
# else
|
||||
# define PWM_TIM1_CH4CFG 0
|
||||
# endif
|
||||
# define PWM_TIM1_CHANNEL4 1
|
||||
#else
|
||||
# define PWM_TIM1_CHANNEL4 0
|
||||
#endif
|
||||
#define PWM_TIM1_NCHANNELS (PWM_TIM1_CHANNEL1 + PWM_TIM1_CHANNEL2 + \
|
||||
PWM_TIM1_CHANNEL3 + PWM_TIM1_CHANNEL4)
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM2_CH1OUT
|
||||
# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM2_CH1CFG 0
|
||||
# endif
|
||||
# define PWM_TIM2_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM2_CHANNEL1 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL2
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM2_CH2OUT
|
||||
# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT
|
||||
# else
|
||||
# define PWM_TIM2_CH2CFG 0
|
||||
# endif
|
||||
# define PWM_TIM2_CHANNEL2 1
|
||||
#else
|
||||
# define PWM_TIM2_CHANNEL2 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL3
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM2_CH3OUT
|
||||
# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT
|
||||
# else
|
||||
# define PWM_TIM2_CH3CFG 0
|
||||
# endif
|
||||
# define PWM_TIM2_CHANNEL3 1
|
||||
#else
|
||||
# define PWM_TIM2_CHANNEL3 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL4
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM2_CH4OUT
|
||||
# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT
|
||||
# else
|
||||
# define PWM_TIM2_CH4CFG 0
|
||||
# endif
|
||||
# define PWM_TIM2_CHANNEL4 1
|
||||
#else
|
||||
# define PWM_TIM2_CHANNEL4 0
|
||||
#endif
|
||||
#define PWM_TIM2_NCHANNELS (PWM_TIM2_CHANNEL1 + PWM_TIM2_CHANNEL2 + \
|
||||
PWM_TIM2_CHANNEL3 + PWM_TIM2_CHANNEL4)
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM3_CH1OUT
|
||||
# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM3_CH1CFG 0
|
||||
# endif
|
||||
# define PWM_TIM3_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM3_CHANNEL1 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL2
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM3_CH2OUT
|
||||
# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT
|
||||
# else
|
||||
# define PWM_TIM3_CH2CFG 0
|
||||
# endif
|
||||
# define PWM_TIM3_CHANNEL2 1
|
||||
#else
|
||||
# define PWM_TIM3_CHANNEL2 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL3
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM3_CH3OUT
|
||||
# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT
|
||||
# else
|
||||
# define PWM_TIM3_CH3CFG 0
|
||||
# endif
|
||||
# define PWM_TIM3_CHANNEL3 1
|
||||
#else
|
||||
# define PWM_TIM3_CHANNEL3 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL4
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM3_CH4OUT
|
||||
# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT
|
||||
# else
|
||||
# define PWM_TIM3_CH4CFG 0
|
||||
# endif
|
||||
# define PWM_TIM3_CHANNEL4 1
|
||||
#else
|
||||
# define PWM_TIM3_CHANNEL4 0
|
||||
#endif
|
||||
#define PWM_TIM3_NCHANNELS (PWM_TIM3_CHANNEL1 + PWM_TIM3_CHANNEL2 + \
|
||||
PWM_TIM3_CHANNEL3 + PWM_TIM3_CHANNEL4)
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM14_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM14_CH1OUT
|
||||
# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM14_CH1CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM14_CH1NOUT
|
||||
# define PWM_TIM14_CH1NCFG GPIO_TIM14_CH1NOUT
|
||||
# else
|
||||
# define PWM_TIM14_CH1NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM14_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM14_CHANNEL1 0
|
||||
#endif
|
||||
#define PWM_TIM14_NCHANNELS PWM_TIM14_CHANNEL1
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM15_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM15_CH1OUT
|
||||
# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM15_CH1CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM15_CH1NOUT
|
||||
# define PWM_TIM15_CH1NCFG GPIO_TIM15_CH1NOUT
|
||||
# else
|
||||
# define PWM_TIM15_CH1NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM15_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM15_CHANNEL1 0
|
||||
#endif
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM15_CHANNEL2
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM15_CH2OUT
|
||||
# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT
|
||||
# else
|
||||
# define PWM_TIM15_CH2CFG 0
|
||||
# endif
|
||||
# define PWM_TIM15_CHANNEL2 1
|
||||
#else
|
||||
# define PWM_TIM15_CHANNEL2 0
|
||||
#endif
|
||||
#define PWM_TIM15_NCHANNELS (PWM_TIM15_CHANNEL1 + PWM_TIM15_CHANNEL2)
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM16_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM16_CH1OUT
|
||||
# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM16_CH1CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM16_CH1NOUT
|
||||
# define PWM_TIM16_CH1NCFG GPIO_TIM16_CH1NOUT
|
||||
# else
|
||||
# define PWM_TIM16_CH1NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM16_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM16_CHANNEL1 0
|
||||
#endif
|
||||
#define PWM_TIM16_NCHANNELS PWM_TIM16_CHANNEL1
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM17_CHANNEL1
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM17_CH1OUT
|
||||
# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT
|
||||
# else
|
||||
# define PWM_TIM17_CH1CFG 0
|
||||
# endif
|
||||
# ifdef CONFIG_STM32F0L0G0_TIM17_CH1NOUT
|
||||
# define PWM_TIM17_CH1NCFG GPIO_TIM17_CH1NOUT
|
||||
# else
|
||||
# define PWM_TIM17_CH1NCFG 0
|
||||
# endif
|
||||
# define PWM_TIM17_CHANNEL1 1
|
||||
#else
|
||||
# define PWM_TIM17_CHANNEL1 0
|
||||
#endif
|
||||
#define PWM_TIM17_NCHANNELS PWM_TIM17_CHANNEL1
|
||||
|
||||
#define PWM_MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
|
||||
#define PWM_NCHANNELS PWM_MAX(PWM_TIM1_NCHANNELS, \
|
||||
PWM_MAX(PWM_TIM2_NCHANNELS, \
|
||||
PWM_MAX(PWM_TIM3_NCHANNELS, \
|
||||
PWM_MAX(PWM_TIM14_NCHANNELS, \
|
||||
PWM_MAX(PWM_TIM15_NCHANNELS, \
|
||||
PWM_MAX(PWM_TIM16_NCHANNELS, \
|
||||
PWM_TIM17_NCHANNELS))))))
|
||||
|
||||
#else /* !CONFIG_PWM_MULTICHAN */
|
||||
|
||||
/* For each timer that is enabled for PWM usage, we need the following additional
|
||||
* configuration settings:
|
||||
*
|
||||
* CONFIG_STM32F0L0G0_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||
* PWM_TIMx_CHn - One of the values defined in chip/stm32*_pinmap.h. In the
|
||||
* case where there are multiple pin selections, the correct setting must be
|
||||
* provided in the arch/board/board.h file.
|
||||
*
|
||||
* NOTE: The STM32 timers are each capable of generating different signals on
|
||||
* each of the four channels with different duty cycles. That capability is
|
||||
* not supported by this driver: Only one output channel per timer.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM1_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM1_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM1_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CH1MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
|
||||
# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT
|
||||
# define PWM_TIM1_CH1NCFG 0
|
||||
# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 2
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CHANNEL2 1
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CH2MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
|
||||
# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT
|
||||
# define PWM_TIM1_CH2NCFG 0
|
||||
# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 3
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CHANNEL3 1
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CH3MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
|
||||
# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT
|
||||
# define PWM_TIM1_CH3NCFG 0
|
||||
# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 4
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CHANNEL4 1
|
||||
# define CONFIG_STM32F0L0G0_TIM1_CH4MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
|
||||
# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM1_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM2_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM2_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM2_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CH1MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
|
||||
# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 2
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CHANNEL2 1
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CH2MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
|
||||
# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 3
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CHANNEL3 1
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CH3MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
|
||||
# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 4
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CHANNEL4 1
|
||||
# define CONFIG_STM32F0L0G0_TIM2_CH4MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
|
||||
# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM2_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM3_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM3_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM3_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CH1MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
||||
# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 2
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL2 1
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CH2MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
||||
# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 3
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL3 1
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CH3MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
||||
# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT
|
||||
# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 4
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL4 1
|
||||
# define CONFIG_STM32F0L0G0_TIM3_CH4MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
||||
# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM3_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM14_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM14_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM14_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM14_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM14_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM14_CH1MODE CONFIG_STM32F0L0G0_TIM14_CHMODE
|
||||
# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT
|
||||
# define PWM_TIM14_CH1NCFG 0
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM14_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM15_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM15_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM15_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM15_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM15_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM15_CH1MODE CONFIG_STM32F0L0G0_TIM15_CHMODE
|
||||
# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT
|
||||
# define PWM_TIM15_CH1NCFG 0
|
||||
# elif CONFIG_STM32F0L0G0_TIM15_CHANNEL == 2
|
||||
# define CONFIG_STM32F0L0G0_TIM15_CHANNEL2 1
|
||||
# define CONFIG_STM32F0L0G0_TIM15_CH2MODE CONFIG_STM32F0L0G0_TIM15_CHMODE
|
||||
# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM15_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM16_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM16_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM16_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM16_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM16_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM16_CH1MODE CONFIG_STM32F0L0G0_TIM16_CHMODE
|
||||
# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT
|
||||
# define PWM_TIM16_CH1NCFG 0
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM16_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F0L0G0_TIM17_PWM
|
||||
# if !defined(CONFIG_STM32F0L0G0_TIM17_CHANNEL)
|
||||
# error "CONFIG_STM32F0L0G0_TIM17_CHANNEL must be provided"
|
||||
# elif CONFIG_STM32F0L0G0_TIM17_CHANNEL == 1
|
||||
# define CONFIG_STM32F0L0G0_TIM17_CHANNEL1 1
|
||||
# define CONFIG_STM32F0L0G0_TIM17_CH1MODE CONFIG_STM32F0L0G0_TIM17_CHMODE
|
||||
# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT
|
||||
# define PWM_TIM17_CH1NCFG 0
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM17_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#define PWM_NCHANNELS 1
|
||||
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_pwminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize one timer for use with the upper_level PWM driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* timer - A number identifying the timer use. The number of valid timer
|
||||
* IDs varies with the STM32 MCU and MCU family but is somewhere in
|
||||
* the range of {1,..,17}.
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a pointer to the STM32 lower half PWM driver is returned.
|
||||
* NULL is returned on any failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* CONFIG_STM32F0L0G0_TIMx_PWM */
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H */
|
||||
@ -44,7 +44,7 @@
|
||||
*
|
||||
* The PWM driver is split into two parts:
|
||||
*
|
||||
* 1) An "upper half", generic driver that provides the comman PWM interface
|
||||
* 1) An "upper half", generic driver that provides the common PWM interface
|
||||
* to application level code, and
|
||||
* 2) A "lower half", platform-specific driver that implements the low-level
|
||||
* timer controls to implement the PWM functionality.
|
||||
@ -66,6 +66,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* CONFIG_PWM - Enables because PWM driver support
|
||||
* CONFIG_PWM_PULSECOUNT - Some hardware will support generation of a fixed
|
||||
* number of pulses. This might be used, for example to support a stepper
|
||||
@ -79,10 +80,11 @@
|
||||
*/
|
||||
|
||||
/* IOCTL Commands ***********************************************************/
|
||||
|
||||
/* The PWM module uses a standard character driver framework. However, since
|
||||
* the PWM driver is a device control interface and not a data transfer
|
||||
* interface, the majority of the functionality is implemented in driver
|
||||
* ioctl calls. The PWM ioctl commands are lised below:
|
||||
* ioctl calls. The PWM ioctl commands are listed below:
|
||||
*
|
||||
* PWMIOC_SETCHARACTERISTICS - Set the characteristics of the next pulsed
|
||||
* output. This command will neither start nor stop the pulsed output.
|
||||
@ -97,7 +99,7 @@
|
||||
* PWMIOC_GETCHARACTERISTICS - Get the currently selected characteristics of
|
||||
* the pulsed output (independent of whether the output is start or stopped).
|
||||
*
|
||||
* ioctl argument: A reference to struct pwm_info_s to recevie the
|
||||
* ioctl argument: A reference to struct pwm_info_s to receive the
|
||||
* characteristics of the pulsed output.
|
||||
*
|
||||
* PWMIOC_START - Start the pulsed output. The PWMIOC_SETCHARACTERISTICS
|
||||
@ -285,7 +287,7 @@ int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev);
|
||||
* 1. The upper half driver calls the start method, providing the lower
|
||||
* half driver with the pulse train characteristics. If a fixed
|
||||
* number of pulses is required, the 'count' value will be nonzero.
|
||||
* 2. The lower half driver's start() methoc must verify that it can
|
||||
* 2. The lower half driver's start() method must verify that it can
|
||||
* support the request pulse train (frequency, duty, AND pulse count).
|
||||
* It it cannot, it should return an error. If the pulse count is
|
||||
* non-zero, it should set up the hardware for that number of pulses
|
||||
|
||||
Loading…
Reference in New Issue
Block a user