Make Pirelli-DLP10 a true board configuration; Calypso no compiles without errors

ChangeLog

@@ -4669,5 +4669,5 @@
 	* drivers/mtd/m25px.c:  Some rearchitecting to use the byte write
 	  capability (when possible) and to use 4KB sectors for the erase block
 	  size when the part supports it (Ken Pettit, 2013-5-3).
-	* configs/pirelli_dp10: Adds a configuration for the pirelli phone
+	* configs/pirelli_dpl10: Adds a configuration for the pirelli phone
 	  (from Alan Alan Carvalho de Assis, 2013-5-3).

Documentation/README.html

@@ -92,6 +92,8 @@
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/ez80f910200zco/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- fire-stm32v2/
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/fire-stm32v2/README.txt"><b><i>README.txt</i></b></a>
+ |   |   |- freedom-kl25z/
+ |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/freedom-kl25z/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- hymini-stm32v/
  |   |   |   |- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/hymini-stm32v/include/README.txt">include/README.txt</a>
  |   |   |   |- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/hymini-stm32v/RIDE/README.txt">RIDE/README.txt</a>
@@ -128,6 +130,8 @@
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/mcu123-lpc214x/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- micropendous3/
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/micropendous3/README.txt"><b><i>README.txt</i></b></a>
+ |   |   |- mikroe-stm32f4/
+ |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/mikroe-stm32f4/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- mirtoo/
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/mirtoo/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- mx1ads/
@@ -164,6 +168,8 @@
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/pic32-starterkit/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- pic32mx7mmb/
  |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/pic32mx7mmb/README.txt"><b><i>README.txt</i></b></a>
+ |   |   |- pirelli_dpl10/
+ |   |   |   `- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/pirelli_dpl10/README.txt"><b><i>README.txt</i></b></a>
  |   |   |- pjrc-8051/
  |   |   |   |- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/pjrc-8051/include/README.txt">include/README.txt</a>
  |   |   |   |- <a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/configs/pjrc-8051/src/README.txt">src/README.txt</a>

README.txt

@@ -1021,6 +1021,8 @@ nuttx
  |   |   `- README.txt
  |   |-  fire-stm32v2/
  |   |   `- README.txt
+ |   |-  freedom-kl25z/
+ |   |   `- README.txt
  |   |-  hymini-stm32v/
  |   |   |- include/README.txt
  |   |   |- src/README.txt
@@ -1056,6 +1058,8 @@ nuttx
  |   |   `- README.txt
  |   |- micropendous3/
  |   |   `- README.txt
+ |   |- mikroe-stm32f/
+ |   |   `- README.txt
  |   |- mirtoo/
  |   |   `- README.txt
  |   |- mx1ads/
@@ -1092,6 +1096,8 @@ nuttx
  |   |   `- README.txt
  |   |- pic32mx7mmb/
  |   |   `- README.txt
+ |   |- pirelli_dpl10/
+ |   |   `- README.txt
  |   |- pjrc-8051/
  |   |   |- include/README.txt
  |   |   |- src/README.txt

arch/arm/include/calypso/armio.h

@@ -34,19 +34,16 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
-
+#include <stdint.h>
 
 /****************************************************************************
  * Prototypes for interrupt handling
  ****************************************************************************/
 
-void calypso_kbd_irq();
+inline int calypso_kbd_irq(int irq, uint32_t *regs);
-void calypso_gpio_irq();
-
 
 /****************************************************************************
  * Initialize device, add /dev/... nodes
  ****************************************************************************/
 
 void calypso_armio(void);
-void calypso_keypad(void);

arch/arm/src/calypso/calypso_armio.c

@@ -48,7 +48,7 @@
  ****************************************************************************/
 
 #define BASE_ADDR_ARMIO  0xfffe4800
-#define ARMIO_REG(x)	((void *)BASE_ADDR_ARMIO + (x))
+#define ARMIO_REG(x)     (BASE_ADDR_ARMIO + (x))
 
 enum armio_reg {
   LATCH_IN        = 0x00,
@@ -71,7 +71,6 @@ enum armio_reg {
 #define KBD_INT    (1 << 0)
 #define GPIO_INT   (1 << 1)
 
-
 /****************************************************************************
  * ARMIO interrupt handler
  *   forward keypad events
@@ -80,12 +79,9 @@ enum armio_reg {
 
 static int kbd_gpio_irq(int irq, uint32_t *regs)
 {
-	calypso_kbd_irq();
+  return calypso_kbd_irq(irq, regs);
-
-	return 0;
 }
 
-
 /****************************************************************************
  * Initialize ARMIO
  ****************************************************************************/
@@ -93,12 +89,15 @@ static int kbd_gpio_irq(int irq, uint32_t *regs)
 void calypso_armio(void)
 {
   /* Enable ARMIO clock */
+
   putreg16(1<<5, ARMIO_REG(CNTL_REG));
 
   /* Mask GPIO interrupt and keypad interrupt */
+
   putreg16(KBD_INT|GPIO_INT, ARMIO_REG(KBD_GPIO_MASKIT));
 
   /* Attach and enable the interrupt */
+
   irq_attach(IRQ_KEYPAD_GPIO, (xcpt_t)kbd_gpio_irq);
   up_enable_irq(IRQ_KEYPAD_GPIO);
 }

arch/arm/src/calypso/calypso_irq.c

@@ -47,7 +47,9 @@
 #include <stdint.h>
 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
+
 #include <arch/calypso/memory.h>
+#include <arch/calypso/clock.h>
 
 #include "arm.h"
 #include "up_arch.h"
@@ -59,7 +61,8 @@
 #define BASE_ADDR_IRQ       0xfffffa00
 #define BASE_ADDR_IBOOT_EXC 0x0080001C
 
-enum irq_reg {
+enum irq_reg
+{
   IT_REG1      = 0x00,
   IT_REG2      = 0x02,
   MASK_IT_REG1 = 0x08,
@@ -70,7 +73,7 @@ enum irq_reg {
 };
 
 #define ILR_IRQ(x)  (0x20 + (x*2))
-#define IRQ_REG(x)	((void *)BASE_ADDR_IRQ + (x))
+#define IRQ_REG(x)  (BASE_ADDR_IRQ + (x))
 
 #ifndef ARRAY_SIZE
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
@@ -87,7 +90,8 @@ extern uint32_t _exceptions;
  * Private Data
  ****************************************************************************/
 
-static uint8_t default_irq_prio[] = {
+static uint8_t default_irq_prio[] =
+{
   [IRQ_WATCHDOG]       = 0xff,
   [IRQ_TIMER1]         = 0xff,
   [IRQ_TIMER2]         = 0xff,
@@ -117,19 +121,25 @@ static uint8_t default_irq_prio[] = {
 
 static void _irq_enable(enum irq_nr nr, int enable)
 {
-	uint16_t *reg = IRQ_REG(MASK_IT_REG1);
+  uintptr_t reg = IRQ_REG(MASK_IT_REG1);
   uint16_t val;
 
-	if (nr > 15) {
+  if (nr > 15)
+    {
       reg = IRQ_REG(MASK_IT_REG2);
       nr -= 16;
     }
 
   val = getreg16(reg);
   if (enable)
+    {
       val &= ~(1 << nr);
+    }
   else
+    {
       val |= (1 << nr);
+    }
+
   putreg16(val, reg);
 }
 
@@ -137,17 +147,22 @@ static void set_default_priorities(void)
 {
   unsigned int i;
 
-	for (i = 0; i < ARRAY_SIZE(default_irq_prio); i++) {
+  for (i = 0; i < ARRAY_SIZE(default_irq_prio); i++)
+    {
       uint16_t val;
       uint8_t prio = default_irq_prio[i];
+
       if (prio > 31)
+        {
           prio = 31;
+        }
 
       val = getreg16(IRQ_REG(ILR_IRQ(i)));
       val &= ~(0x1f << 2);
       val |= prio << 2;
 
       /* Make edge mode default. Hopefully causes less trouble */
+
       val |= 0x02;
 
       putreg16(val, IRQ_REG(ILR_IRQ(i)));
@@ -155,6 +170,7 @@ static void set_default_priorities(void)
 }
 
 /* Install the exception handlers to where the ROM loader jumps */
+
 static void calypso_exceptions_install(void)
 {
   uint32_t *exceptions_dst = (uint32_t *) BASE_ADDR_IBOOT_EXC;
@@ -162,8 +178,9 @@ static void calypso_exceptions_install(void)
   int i;
 
   for (i = 0; i < 7; i++)
+    {
       *exceptions_dst++ = *exceptions_src++;
-
+    }
 }
 
 /****************************************************************************
@@ -181,16 +198,20 @@ static void calypso_exceptions_install(void)
 void up_irqinitialize(void)
 {
   /* Prepare hardware */
+
   calypso_exceptions_install();
   current_regs = NULL;
 
   /* Switch to internal ROM */
+
   calypso_bootrom(1);
 
-	/* set default priorities */
+  /* Set default priorities */
+
   set_default_priorities();
 
-	/* mask all interrupts off */
+  /* Mask all interrupts off */
+
   putreg16(0xffff, IRQ_REG(MASK_IT_REG1));
   putreg16(0xffff, IRQ_REG(MASK_IT_REG2));
 
@@ -198,7 +219,8 @@ void up_irqinitialize(void)
   putreg16(0, IRQ_REG(IT_REG1));
   putreg16(0, IRQ_REG(IT_REG2));
 
-	/* enable interrupts globally to the ARM core */
+  /* Enable interrupts globally to the ARM core */
+
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
   irqrestore(SVC_MODE | PSR_F_BIT);
 #endif
@@ -215,8 +237,10 @@ void up_irqinitialize(void)
 void up_disable_irq(int irq)
 {
   if ((unsigned)irq < NR_IRQS)
+    {
       _irq_enable(irq, 0);
     }
+}
 
 /****************************************************************************
  * Name: up_enable_irq
@@ -229,8 +253,10 @@ void up_disable_irq(int irq)
 void up_enable_irq(int irq)
 {
   if((unsigned)irq < NR_IRQS)
+    {
       _irq_enable(irq, 1);
     }
+}
 
 /****************************************************************************
  * Name: up_prioritize_irq
@@ -246,15 +272,19 @@ int up_prioritize_irq(int nr, int prio)
   uint16_t val;
 
   if (prio == -1)
+    {
       prio = default_irq_prio[nr];
+    }
 
   if (prio > 31)
+    {
       prio = 31;
+    }
 
   val = prio << 2;
   putreg16(val, IRQ_REG(ILR_IRQ(nr)));
 
-	return 0; // XXX: what's the return???
+  return 0;
 }
 #endif
 
@@ -270,14 +300,17 @@ void up_decodeirq(uint32_t *regs)
   /* XXX: What is this???
    * Passed to but ignored in IRQ handlers
    * Only valid meaning is apparently non-NULL == IRQ context */
+
   saved_regs = (uint32_t *)current_regs;
   current_regs = regs;
 
   /* Detect & deliver the IRQ */
+
   num = getreg8(IRQ_REG(IRQ_NUM)) & 0x1f;
   irq_dispatch(num, regs);
 
   /* Start new IRQ agreement */
+
   tmp = getreg8(IRQ_REG(IRQ_CTRL));
   tmp |= 0x01;
   putreg8(tmp, IRQ_REG(IRQ_CTRL));
@@ -297,14 +330,17 @@ void calypso_fiq(void)
   /* XXX: What is this???
    * Passed to but ignored in IRQ handlers
    * Only valid meaning is apparently non-NULL == IRQ context */
+
   regs = (uint32_t *)current_regs;
   current_regs = (uint32_t *)&num;
 
   /* Detect & deliver like an IRQ but we are in FIQ context */
+
   num = getreg8(IRQ_REG(FIQ_NUM)) & 0x1f;
   irq_dispatch(num, regs);
 
   /* Start new FIQ agreement */
+
   tmp = getreg8(IRQ_REG(IRQ_CTRL));
   tmp |= 0x02;
   putreg8(tmp, IRQ_REG(IRQ_CTRL));

arch/arm/src/calypso/calypso_keypad.c

@@ -48,6 +48,7 @@
 #include <arch/calypso/defines.h>
 #include <arch/calypso/memory.h>
 #include <arch/calypso/timer.h>
+#include <arch/calypso/armio.h>
 
 /****************************************************************************
  * HW access

arch/arm/src/calypso/calypso_spi.c

@@ -40,6 +40,7 @@
 #include <nuttx/config.h>
 #include <nuttx/spi.h>
 
+#include <unistd.h>
 #include <debug.h>
 
 #include "up_arch.h"
@@ -83,6 +84,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 }
 
 /* Osmocom wrapper */
+
 static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 {
   ((FAR struct calypso_spidev_s *)dev)->nbits = nbits;
@@ -95,8 +97,10 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
   size_t i;
 
   for (i = 0; i < nwords; i++)
+    {
       spi_xfer(0, priv->nbits, txbuffer+i, rxbuffer+i);
     }
+}
 
 static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
 {
@@ -149,70 +153,107 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
   uint32_t tmp;
 
   if (bitlen == 0)
+    {
       return 0;
+    }
 
   if (bitlen > 32)
+    {
       return -1;
+    }
 
   if (dev_idx > 4)
+    {
       return -1;
+    }
 
   bytes_per_xfer = bitlen / 8;
   if (bitlen % 8)
+    {
       bytes_per_xfer ++;
+    }
 
   reg_ctrl |= (bitlen - 1) << SPI_CTRL_NB_SHIFT;
   reg_ctrl |= (dev_idx & 0x7) << SPI_CTRL_AD_SHIFT;
 
-	if (bitlen <= 8) {
+  if (bitlen <= 8)
+    {
       tmp = *(uint8_t *)dout;
       tmp <<= 24 + (8-bitlen);  /* align to MSB */
-	} else if (bitlen <= 16) {
+    }
+  else if (bitlen <= 16)
+    {
       tmp = *(uint16_t *)dout;
       tmp <<= 16 + (16-bitlen);  /* align to MSB */
-	} else {
+    }
+  else
+    {
       tmp = *(uint32_t *)dout;
       tmp <<= (32-bitlen);    /* align to MSB */
     }
+
   dbg("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
       dev_idx, bitlen, tmp);
 
   /* fill transmit registers */
+
   putreg16(tmp >> 16, SPI_REG(REG_TX_MSB));
   putreg16(tmp & 0xffff, SPI_REG(REG_TX_LSB));
 
   /* initiate transfer */
+
   if (din)
+    {
       reg_ctrl |= SPI_CTRL_RDWR;
+    }
   else
+    {
       reg_ctrl |= SPI_CTRL_WR;
+    }
+
   putreg16(reg_ctrl, SPI_REG(REG_CTRL));
   dbg("reg_ctrl=0x%04x ", reg_ctrl);
 
   /* wait until the transfer is complete */
-	while (1) {
+
+  while (1)
+  {
     reg_status = getreg16(SPI_REG(REG_STATUS));
     dbg("status=0x%04x ", reg_status);
     if (din && (reg_status & SPI_STATUS_RE))
-			break;
+      {
-		else if (reg_status & SPI_STATUS_WE)
         break;
       }
+    else if (reg_status & SPI_STATUS_WE)
+      {
+        break;
+      }
+  }
+
   /* FIXME: calibrate how much delay we really need (seven 13MHz cycles) */
+
   usleep(1000);
 
-	if (din) {
+  if (din)
+    {
       tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
       tmp |= getreg16(SPI_REG(REG_RX_LSB));
       dbg("data_in=0x%08x ", tmp);
 
       if (bitlen <= 8)
+        {
           *(uint8_t *)din = tmp & 0xff;
+        }
       else if (bitlen <= 16)
+        {
           *(uint16_t *)din = tmp & 0xffff;
+        }
       else
+        {
           *(uint32_t *)din = tmp;
         }
+    }
+
   dbg("\n");
 
   return 0;
@@ -220,12 +261,15 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
 
 FAR struct spi_dev_s *up_spiinitialize(int port)
 {
-	switch(port) {
+  switch (port)
+    {
     case 0:    /* SPI master device */
       spi_init();
       return (FAR struct spi_dev_s *)&g_spidev;
+
     case 1:    /* uWire device */
       return NULL;
+
     default:
       return NULL;
     }

configs/Kconfig

@@ -429,6 +429,13 @@ config ARCH_BOARD_PIC32_PIC32MX7MMB
 		This is the port NuttX to the Mikroelektronika PIC32MX7 Multimedia Board
 		(MMB).  See http://www.mikroe.com/ for further information.
 
+config ARCH_BOARD_PIRELLI_DPL10
+	bool "Pirelli DPL10 phone"
+	depends on ARCH_CHIP_CALYPSO
+	---help---
+		This directory contains the board support for Pirelli dpl10 phones.  The
+		additions were made by Craig Comstock (with help form Alan Carvalho de Assis).
+
 config ARCH_BOARD_PJRC_87C52
 	bool "PJRC 87C52 development system"
 	depends on ARCH_CHIP_8052
@@ -742,6 +749,7 @@ config ARCH_BOARD
 	default "pcblogic-pic32mx"    if ARCH_BOARD_PCBLOGICPIC32MX
 	default "pic32-starterkit"    if ARCH_BOARD_PIC32_STARTERKIT
 	default "pic32mx7mmb"         if ARCH_BOARD_PIC32_PIC32MX7MMB
+	default "pirelli_dpl10"       if ARCH_BOARD_PIRELLI_DPL10
 	default "pjrc-8051"           if ARCH_BOARD_PJRC_87C52
 	default "qemu-i486"           if ARCH_BOARD_QEMU_I486
 	default "rgmp"                if ARCH_BOARD_RGMP
@@ -949,6 +957,9 @@ endif
 if ARCH_BOARD_PIC32_PIC32MX7MMB
 source "configs/pic32mx7mmb/Kconfig"
 endif
+if ARCH_BOARD_PIRELLI_DPL10
+source "configs/pirelli_dpl10/Kconfig"
+endif
 if ARCH_BOARD_PJRC_87C52
 source "configs/pjrc-8051/Kconfig"
 endif

configs/README.txt

@@ -1938,8 +1938,8 @@ configs/pic32mx7mmb
 
 configs/pirelli_dpl10
   This directory contains the board support for pirelli dpl10 phones.
-  It is a variant of the compal_e88 config with the small change of enabling
+  It is a variant of the compal_e88 config with the small changes for the
-  the IrDA serial console.
+  differences in the board.
 
 configs/pjrc-8051
   8051 Microcontroller.  This port uses the PJRC 87C52 development system

configs/pirelli_dpl10/README.txt

@@ -1,7 +1,7 @@
 pirelli_dpl10
 =============
 
-This directory contains the board support for pirelli dpl10 phones.
+This directory contains the board support for Pirelli dpl10 phones.
 
 It is a variant of the compal_e88 configuration with the small change of
 enabling the IrDA serial console:

configs/pirelli_dpl10/include/board.h

@@ -0,0 +1,6 @@
+/************************************************************************
+ * configs/pirelli_dpl10/include/board.h
+ *
+ * Supposed to be empty
+ *
+ ************************************************************************/

configs/pirelli_dpl10/include/power.h

@@ -0,0 +1,6 @@
+/************************************************************************
+ * configs/pirelli_dpl10/include/power.h
+ *
+ * Supposed to be empty
+ *
+ ************************************************************************/

configs/pirelli_dpl10/nsh_highram/Make.defs

@@ -123,5 +123,5 @@ MKDEP			= $(TOPDIR)/tools/mkdeps.sh
 
 HOSTCC			= gcc
 HOSTINCLUDES		= -I.
-HOSTCFLAGS		= -Wall -wstrict-prototypes -Wshadow -g -pipe
+HOSTCFLAGS		= -Wall -Wstrict-prototypes -Wshadow -g -pipe
 HOSTLDFLAGS		=

configs/pirelli_dpl10/nsh_highram/defconfig

@@ -40,8 +40,8 @@ CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM7TDMI=y
 CONFIG_ARCH_CHIP="calypso"
 CONFIG_ARCH_CHIP_CALYPSO=y
-CONFIG_ARCH_BOARD="compal_e88"
+CONFIG_ARCH_BOARD="pirelli_dpl10"
-CONFIG_ARCH_BOARD_COMPALE88=y
+CONFIG_ARCH_BOARD_PIRELLI_DPL10=y
 CONFIG_BOARD_LOOPSPERMSEC=1250
 CONFIG_ROM_VECTORS=n
 CONFIG_ARCH_LEDS=n

configs/pirelli_dpl10/src/.gitignore

@@ -0,0 +1,4 @@
+.depend
+Make.dep
+
+

configs/pirelli_dpl10/src/Makefile

@@ -0,0 +1,79 @@
+############################################################################
+# configs/pirelli_dpl10/src/Makefile
+#
+#   Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+#   Copyright (C) 2011 Stefan Richter. All rights reserved.
+#   Author: Stefan Richter <ichgeh@l--putt.de>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+CFLAGS		+= -I$(TOPDIR)/sched
+
+ASRCS		=
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+CSRCS		= dummy.c
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+CFLAGS		+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/arm
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+	$(call ARCHIVE, $@, $(OBJS))
+
+.depend: Makefile $(SRCS)
+	$(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	$(Q) touch $@
+
+depend: .depend
+
+clean:
+	$(call DELFILE, libboard$(LIBEXT))
+	$(call CLEAN)
+
+distclean: clean
+	$(call DELFILE, Make.dep)
+	$(call DELFILE, .depend)
+
+-include Make.dep

configs/pirelli_dpl10/src/dummy.c

@@ -0,0 +1 @@
+/* no libboard.a otherwise */