LPC31: Configuration and build support for a forthcoming USB host driver; configs/ea3131/nsh converted to use kconfig-frontend tools
This commit is contained in:
Gregory Nutt
parent
1dc1b8caa3
commit
ca61cba028
@ -169,4 +169,3 @@ ifeq ($(CONFIG_ARM_TOOLCHAIN),GNU_EABIW)
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WINTOOL = y
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endif
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endif
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@ -40,30 +40,6 @@ config ARCH_CHIP_LPC3154
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endchoice # LPC31xx Configuration Options
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choice
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prompt "Toolchain Selection"
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default LPC31_BUILDROOT if !HOST_WINDOWS
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default LPC31_CODESOURCERYW if HOST_WINDOWS
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depends on ARCH_CHIP_LPC31XX
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config LPC31_CODESOURCERYW
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bool "CodeSourcery GNU toolchain under Windows"
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depends on HOST_WINDOWS
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config LPC31_CODESOURCERYL
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bool "CodeSourcery GNU toolchain under Linux"
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depends on HOST_LINUX
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config LPC31_DEVKITARM
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bool "devkitARM GNU toolchain"
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depends on HOST_WINDOWS
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config LPC31_BUILDROOT
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bool "Buildroot"
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depends on !WINDOWS_NATIVE
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endchoice # Toolchain Selection
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config LPC31_SDRAMHCLK
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int "External SDRAM HCLK"
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depends on LPC31_EXTSDRAM
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@ -81,8 +57,8 @@ config LPC31_SPI
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bool "SPI"
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default n
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config LPC31_USB
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bool "USB"
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config LPC31_USBOTG
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bool "USB OTG"
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default n
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config LPC31_MCI
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@ -215,6 +191,12 @@ endmenu # External Memory Configuration
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menu "LPC31xx UART Configuration"
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depends on LPC31_UART
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config LPC31_UART_PRECALCULATED
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bool "Use pre-calculated BAD configuration"
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default n
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if LPC31_UART_PRECALCULATED
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config LPC31_UART_DIVADDVAL
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int "BAUD pre-scaler divisor"
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---help---
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@ -230,20 +212,21 @@ config LPC31_UART_MULVAL
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---help---
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BAUD multiplier
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endif # LPC31_UART_PRECALCULATED
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endmenu # LPC31xx UART Configuration
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menu "USB device driver options"
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if LPC31_USBOTG && USBDEV
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menu "USB device controller driver (DCD) options"
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config LPC31_USBDEV_EP0_MAXSIZE
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int "EP0 Max packet size"
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depends on USBDEV
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default 64
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---help---
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Endpoint 0 maximum packet size. Default: 64
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config LPC31_USBDEV_FRAME_INTERRUPT
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bool "USB frame interrupt"
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depends on USBDEV
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default n
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---help---
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Handle USB Start-Of-Frame events. Enable reading SOF from interrupt
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@ -252,19 +235,61 @@ config LPC31_USBDEV_FRAME_INTERRUPT
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config LPC31_USBDEV_DMA
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bool "Enable USB device DMA"
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depends on USBDEV
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default n
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---help---
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Enable lpc31xx-specific DMA support
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config LPC31_USBDEV_REGDEBUG
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bool "Register level debug"
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depends on USBDEV && DEBUG
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depends on DEBUG
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default n
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---help---
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Output detailed register-level USB device debug information. Requires also DEBUG.
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endmenu # USB device driver options
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endmenu # USB device driver controller (DCD) options
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endif # LPC31_USBOTG && USBDEV
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if LPC31_USBOTG && USBHOST
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menu "USB host controller driver (HCD) options"
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config LPC31_EHCI_NQHS
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int "Number of Queue Head (QH) structures"
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default 4
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---help---
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Configurable number of Queue Head (QH) structures. The default is
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one per Root hub port plus one for EP0 (4).
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config LPC31_EHCI_NQTDS
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int "Number of Queue Element Transfer Descriptor (qTDs)"
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default 6
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---help---
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Configurable number of Queue Element Transfer Descriptor (qTDs).
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The default is one per root hub plus three from EP0 (6).
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config LPC31_EHCI_BUFSIZE
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int "Size of one request/descriptor buffer"
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default 128
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---help---
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The size of one request/descriptor buffer in bytes. The TD buffe
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size must be an even number of 32-bit words and must be large enough
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to hangle the largest transfer via a SETUP request.
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config LPC31_EHCI_PREALLOCATE
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bool "Preallocate descriptor pool"
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default y
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---help---
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Select this option to pre-allocate EHCI queue and descriptor
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structure pools in .bss. Otherwise, these pools will be
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dynamically allocated using kmemalign().
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config LPC31_EHCI_REGDEBUG
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bool "Enable low-level EHCI register debug"
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default n
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depends on DEBUG
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endmenu # USB host controller driver (HCD) options
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endif # LPC31_USBOTG && USBHOST
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menu "SPI device driver options"
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@ -33,39 +33,47 @@
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#
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############################################################################
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HEAD_ASRC = up_head.S
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HEAD_ASRC = up_head.S
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CMN_ASRCS = up_cache.S up_fullcontextrestore.S up_saveusercontext.S \
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up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c \
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up_dataabort.c up_mdelay.c up_udelay.c up_exit.c up_idle.c \
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up_initialize.c up_initialstate.c up_interruptcontext.c \
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up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
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up_prefetchabort.c up_releasepending.c up_releasestack.c \
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up_reprioritizertr.c up_schedulesigaction.c \
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up_sigdeliver.c up_syscall.c up_unblocktask.c \
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up_undefinedinsn.c up_usestack.c up_vfork.c
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CMN_ASRCS = up_cache.S up_fullcontextrestore.S up_saveusercontext.S
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CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
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CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c up_idle.c
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CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
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CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
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CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
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CMN_CSRCS += up_sigdeliver.c up_syscall.c up_unblocktask.c
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CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c
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CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c
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endif
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ifeq ($(CONFIG_ELF),y)
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CMN_CSRCS += up_elf.c
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endif
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CGU_ASRCS =
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CGU_CSRCS = lpc31_bcrndx.c lpc31_clkdomain.c lpc31_clkexten.c \
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lpc31_clkfreq.c lpc31_clkinit.c lpc31_defclk.c \
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lpc31_esrndx.c lpc31_fdcndx.c lpc31_fdivinit.c \
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lpc31_freqin.c lpc31_pllconfig.c lpc31_resetclks.c \
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lpc31_setfreqin.c lpc31_setfdiv.c lpc31_softreset.c
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CGU_ASRCS =
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CHIP_ASRCS = $(CGU_ASRCS)
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CHIP_CSRCS = lpc31_allocateheap.c lpc31_boot.c lpc31_decodeirq.c \
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lpc31_irq.c lpc31_lowputc.c lpc31_serial.c lpc31_i2c.c \
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lpc31_spi.c lpc31_timerisr.c $(CGU_CSRCS)
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CGU_CSRCS = lpc31_bcrndx.c lpc31_clkdomain.c lpc31_clkexten.c
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CGU_CSRCS += lpc31_clkfreq.c lpc31_clkinit.c lpc31_defclk.c
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CGU_CSRCS += lpc31_esrndx.c lpc31_fdcndx.c lpc31_fdivinit.c
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CGU_CSRCS += lpc31_freqin.c lpc31_pllconfig.c lpc31_resetclks.c
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CGU_CSRCS += lpc31_setfreqin.c lpc31_setfdiv.c lpc31_softreset.c
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += lpc31_usbdev.c
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CHIP_ASRCS = $(CGU_ASRCS)
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CHIP_CSRCS = lpc31_allocateheap.c lpc31_boot.c lpc31_decodeirq.c
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CHIP_CSRCS += lpc31_irq.c lpc31_lowputc.c lpc31_serial.c lpc31_i2c.c
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CHIP_CSRCS += lpc31_spi.c lpc31_timerisr.c $(CGU_CSRCS)
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ifeq ($(CONFIG_LPC31_USBOTG),y)
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ifeq ($(CONFIG_USBHOST),y)
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CHIP_CSRCS += lpc31_ehci.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += lpc31_usbdev.c
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endif
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endif
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@ -2604,7 +2604,6 @@ void up_usbuninitialize(void)
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lpc31_disableclock (CLKID_USBOTGAHBCLK);
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lpc31_disableclock (CLKID_EVENTROUTERPCLK);
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irqrestore(flags);
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}
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@ -2666,6 +2665,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
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lpc31_pullup(&g_usbdev.usbdev, true);
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}
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return ret;
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}
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@ -47,6 +47,8 @@
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* Pre-processor Definitions
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************************************************************************************************/
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#define LPC31_EHCI_NRHPORT 1 /* There is only a single root hub port */
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/* USBOTG register base address offset into the USBOTG domain ***********************************/
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#define LPC31_USBOTG_VBASE (LPC31_USBOTG_VSECTION)
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@ -47,16 +47,19 @@ ifeq ($(filter y, \
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),y)
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CONFIG_AVR_TOOLCHAIN ?= BUILDROOT
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endif
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ifeq ($(filter y, \
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$(CONFIG_AVR_CROSSPACK) \
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),y)
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CONFIG_AVR_TOOLCHAIN ?= CROSSPACK
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endif
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ifeq ($(filter y, \
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$(CONFIG_AVR_LINUXGCC) \
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),y)
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CONFIG_AVR_TOOLCHAIN ?= LINUXGCC
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endif
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ifeq ($(filter y, \
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$(CONFIG_AVR_WINAVR) \
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),y)
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