SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases
This commit is contained in:
Gregory Nutt
parent
7f733b0472
commit
ca739ce76d
@ -157,10 +157,16 @@
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#define MAX_PERINTERVAL 32
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/* Descriptors *****************************************************************/
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/* Actual number of allocated EDs and TDs will include one for the control ED
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* and one for the tail ED for each RHPort:
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*/
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#define SAMA5_OHCI_NEDS (CONFIG_SAMA5_OHCI_NEDS + SAM_USBHOST_NRHPORT)
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#define SAMA5_OHCI_NTDS (CONFIG_SAMA5_OHCI_NTDS + SAM_USBHOST_NRHPORT)
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/* TD delay interrupt value */
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#define TD_DELAY(n) (uint32_t)((n) << GTD_STATUS_DI_SHIFT)
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#define TD_DELAY(n) (uint32_t)((n) << GTD_STATUS_DI_SHIFT)
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/*******************************************************************************
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* Private Types
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@ -180,8 +186,11 @@ struct sam_rhport_s
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volatile bool connected; /* Connected to device */
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volatile bool lowspeed; /* Low speed device attached. */
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uint8_t rhpndx; /* Root hub port index */
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bool ep0init; /* True: EP0 initialized */
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uint8_t rhpndx; /* Root hub port index */
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bool ep0init; /* True: EP0 initialized */
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struct sam_ed_s *edctrl; /* EP0 control ED */
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struct sam_gtd_s *tdtail; /* EP0 tail TD */
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/* The bound device class driver */
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@ -252,8 +261,7 @@ struct sam_gtd_s
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/* Software specific fields */
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struct sam_ed_s *ed; /* 16-19: Pointer to parent ED */
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bool prealloc; /* 20: Indicates a pre-allocated ED */
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uint8_t pad[11]; /* 21-31: Pad to 32 bytes */
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uint8_t pad[12]; /* 20-31: Pad to 32 bytes */
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};
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#define SIZEOF_SAM_TD_S 32
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@ -296,7 +304,8 @@ static void sam_putle16(uint8_t *dest, uint16_t val);
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/* OHCI memory pool helper functions *******************************************/
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static inline void sam_edfree(struct sam_ed_s *ed);
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static struct sam_ed_s *sam_edalloc(void);
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static void sam_edfree(struct sam_ed_s *ed);
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static struct sam_gtd_s *sam_tdalloc(void);
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static void sam_tdfree(struct sam_gtd_s *buffer);
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static uint8_t *sam_tballoc(void);
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@ -325,8 +334,8 @@ static inline int sam_remisoced(struct sam_ed_s *ed);
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static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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uint32_t dirpid, uint32_t toggle,
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volatile uint8_t *buffer, size_t buflen);
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static void sam_ep0enqueue(int rhpndx);
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static void sam_ep0dequeue(int rhpndx);
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static int sam_ep0enqueue(struct sam_rhport_s *rhport);
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static void sam_ep0dequeue(struct sam_rhport_s *rhport);
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static int sam_wdhwait(struct sam_rhport_s *rhport, struct sam_ed_s *ed);
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static int sam_ctrltd(struct sam_rhport_s *rhport, uint32_t dirpid,
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uint8_t *buffer, size_t buflen);
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@ -394,20 +403,14 @@ static struct sam_list_s *g_tbfree; /* List of unused transfer buffers */
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static struct ohci_hcca_s g_hcca
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__attribute__ ((aligned (256)));
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/* These must be aligned to 8-byte boundaries (we do 16-byte alignment). */
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static struct sam_gtd_s g_tdtail[SAM_USBHOST_NRHPORT]
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__attribute__ ((aligned (16)));
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static struct sam_ed_s g_edctrl[SAM_USBHOST_NRHPORT]
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__attribute__ ((aligned (16)));
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/* Pools of free descriptors and buffers. These will all be linked
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* into the free lists declared above.
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* into the free lists declared above. These must be aligned to 8-byte
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* boundaries (we do 16-byte alignment).
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*/
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static struct sam_ed_s g_edalloc[CONFIG_SAMA5_OHCI_NEDS]
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static struct sam_ed_s g_edalloc[SAMA5_OHCI_NEDS]
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__attribute__ ((aligned (16)));
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static struct sam_gtd_s g_tdalloc[CONFIG_SAMA5_OHCI_NTDS]
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static struct sam_gtd_s g_tdalloc[SAMA5_OHCI_NTDS]
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__attribute__ ((aligned (16)));
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static uint8_t g_bufalloc[SAM_BUFALLOC]
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__attribute__ ((aligned (16)));
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@ -594,6 +597,29 @@ static void sam_putle16(uint8_t *dest, uint16_t val)
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}
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#endif
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/*******************************************************************************
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* Name: sam_edalloc
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*
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* Description:
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* Return an endpoint descriptor to the free list
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*
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*******************************************************************************/
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static struct sam_ed_s *sam_edalloc(void)
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{
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struct sam_ed_s *ed;
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/* Remove the ED from the freelist */
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ed = (struct sam_ed_s *)g_edfree;
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if (ed)
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{
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g_edfree = ((struct sam_list_s*)ed)->flink;
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}
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return ed;
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}
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/*******************************************************************************
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* Name: sam_edfree
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*
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@ -666,7 +692,7 @@ static void sam_tdfree(struct sam_gtd_s *td)
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* allocated tail TD.
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*/
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if (tdfree != NULL && !td->prealloc)
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if (tdfree != NULL)
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{
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tdfree->flink = g_tdfree;
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g_tdfree = tdfree;
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@ -1192,9 +1218,9 @@ static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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cp15_coherent_dcache((uintptr_t)ed,
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(uintptr_t)ed + sizeof(struct sam_ed_s));
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/* Select the common tail ED for this root hub port */
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/* Get the tail ED for this root hub port */
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tdtail = &g_tdtail[rhport->rhpndx];
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tdtail = rhport->tdtail;
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/* Get physical addresses to support the DMA */
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@ -1258,7 +1284,7 @@ static int sam_enqueuetd(struct sam_rhport_s *rhport, struct sam_ed_s *ed,
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*
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*******************************************************************************/
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static void sam_ep0enqueue(int rhpndx)
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static int sam_ep0enqueue(struct sam_rhport_s *rhport)
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{
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struct sam_ed_s *edctrl;
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struct sam_gtd_s *tdtail;
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@ -1266,27 +1292,42 @@ static void sam_ep0enqueue(int rhpndx)
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uintptr_t physaddr;
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uint32_t regval;
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DEBUGASSERT(rhport && !rhport->ep0init && rhport->edctrl == NULL &&
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rhport->tdtail == NULL);
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/* Allocate a control ED and a tail TD */
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flags = irqsave();
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edctrl = sam_edalloc();
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if (!edctrl)
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{
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irqrestore(flags);
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return -ENOMEM;
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}
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tdtail = sam_tdalloc();
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if (!tdtail)
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{
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sam_edfree(rhport->edctrl);
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irqrestore(flags);
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return -ENOMEM;
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}
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rhport->edctrl = edctrl;
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rhport->tdtail = tdtail;
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/* ControlListEnable. This bit is cleared to disable the processing of the
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* Control list. We should never modify the control list while CLE is set.
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*/
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flags = irqsave();
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regval = sam_getreg(SAM_USBHOST_CTRL);
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regval &= ~OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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/* Get some pointers to the EP0 control ED and to the common tail TD
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* for this root hub port.
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*/
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tdtail = &g_tdtail[rhpndx];
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edctrl = &g_edctrl[rhpndx];
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/* Initialize the common tail TD for this port */
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memset(tdtail, 0, sizeof(struct sam_gtd_s));
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tdtail->ed = edctrl;
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tdtail->prealloc = true;
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/* Initialize the control endpoint for this port */
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@ -1297,7 +1338,7 @@ static void sam_ep0enqueue(int rhpndx)
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* NOTE that the SKIP bit is set until the first readl TD is added.
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*/
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(void)sam_ep0configure(&g_ohci.rhport[rhpndx].drvr, 0, 8);
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(void)sam_ep0configure(&rhport->drvr, 0, 8);
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edctrl->hw.ctrl |= ED_CONTROL_K;
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/* Link the common tail TD to the ED's TD list */
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@ -1334,6 +1375,7 @@ static void sam_ep0enqueue(int rhpndx)
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regval |= OHCI_CTRL_CLE;
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sam_putreg(regval, SAM_USBHOST_CTRL);
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irqrestore(flags);
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return OK;
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}
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/*******************************************************************************
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@ -1351,7 +1393,7 @@ static void sam_ep0enqueue(int rhpndx)
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*
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*******************************************************************************/
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static void sam_ep0dequeue(int rhpndx)
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static void sam_ep0dequeue(struct sam_rhport_s *rhport)
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{
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struct sam_ed_s *edctrl;
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struct sam_ed_s *curred;
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@ -1362,6 +1404,9 @@ static void sam_ep0dequeue(int rhpndx)
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uintptr_t physcurr;
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uint32_t regval;
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DEBUGASSERT(rhport && rhport->ep0init && rhport->edctrl != NULL &&
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rhport->tdtail != NULL);
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/* ControlListEnable. This bit is cleared to disable the processing of the
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* Control list. We should never modify the control list while CLE is set.
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*/
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@ -1375,7 +1420,7 @@ static void sam_ep0dequeue(int rhpndx)
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* precedessor).
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*/
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edctrl = &g_edctrl[rhpndx];
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edctrl = rhport->edctrl;
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physcurr = sam_getreg(SAM_USBHOST_CTRLHEADED);
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for (curred = (struct sam_ed_s *)sam_virtramaddr(physcurr),
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@ -1423,7 +1468,7 @@ static void sam_ep0dequeue(int rhpndx)
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/* Release any TDs that may still be attached to the ED */
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tdtail = &g_tdtail[rhpndx];
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tdtail = rhport->tdtail;
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physcurr = edctrl->hw.headp;
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for (currtd = (struct sam_gtd_s *)sam_virtramaddr(physcurr);
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@ -1500,7 +1545,7 @@ static int sam_ctrltd(struct sam_rhport_s *rhport, uint32_t dirpid,
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* transfer.
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*/
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edctrl = &g_edctrl[rhport->rhpndx];
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edctrl = rhport->edctrl;
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ret = sam_wdhwait(rhport, edctrl);
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if (ret != OK)
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{
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@ -1964,6 +2009,7 @@ static int sam_enumerate(FAR struct usbhost_connection_s *conn, int rhpndx)
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{
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struct sam_rhport_s *rhport;
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uint32_t regaddr;
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int ret;
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DEBUGASSERT(rhpndx >= 0 && rhpndx < SAM_USBHOST_NRHPORT);
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rhport = &g_ohci.rhport[rhpndx];
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@ -1984,7 +2030,15 @@ static int sam_enumerate(FAR struct usbhost_connection_s *conn, int rhpndx)
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if (!rhport->ep0init)
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{
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sam_ep0enqueue(rhport->rhpndx);
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ret = sam_ep0enqueue(rhport);
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if (ret < 0)
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{
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udbg("ERRPOR: Failed to enqueue EP0\n");
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return ret;
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}
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/* Successfully initialized */
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rhport->ep0init = true;
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}
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@ -2050,7 +2104,7 @@ static int sam_ep0configure(FAR struct usbhost_driver_s *drvr, uint8_t funcaddr,
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funcaddr >= 0 && funcaddr <= SAM_USBHOST_NRHPORT &&
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maxpacketsize < 2048);
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edctrl = &g_edctrl[rhport->rhpndx];
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edctrl = rhport->edctrl;
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/* We must have exclusive access to EP0 and the control list */
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@ -2106,8 +2160,9 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
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const FAR struct usbhost_epdesc_s *epdesc, usbhost_ep_t *ep)
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{
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struct sam_rhport_s *rhport = (struct sam_rhport_s *)drvr;
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struct sam_ed_s *ed;
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int ret = -ENOMEM;
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struct sam_ed_s *ed;
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uintptr_t physaddr;
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int ret = -ENOMEM;
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/* Sanity check. NOTE that this method should only be called if a device is
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* connected (because we need a valid low speed indication).
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@ -2125,13 +2180,9 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
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* non-empty.
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*/
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if (g_edfree)
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ed = sam_edalloc();
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if (ed)
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{
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/* Remove the ED from the freelist */
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ed = (struct sam_ed_s *)g_edfree;
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g_edfree = ((struct sam_list_s*)ed)->flink;
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/* Configure the endpoint descriptor. */
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memset((void*)ed, 0, sizeof(struct sam_ed_s));
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@ -2177,10 +2228,11 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
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sem_init(&ed->wdhsem, 0, 0);
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/* Link the common tail TD to the ED's TD list */
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/* Link the tail TD to the ED's TD list */
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ed->hw.headp = (uint32_t)&g_tdtail[rhport->rhpndx];
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ed->hw.tailp = (uint32_t)&g_tdtail[rhport->rhpndx];
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physaddr = (uintptr_t)sam_physramaddr((uintptr_t)rhport->tdtail);
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ed->hw.headp = physaddr;
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ed->hw.tailp = physaddr;
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/* Now add the endpoint descriptor to the appropriate list */
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@ -2255,7 +2307,8 @@ static int sam_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
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/* There should not be any pending, real TDs linked to this ED */
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DEBUGASSERT(rhport && ed &&
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(ed->hw.headp & ED_HEADP_ADDR_MASK) == (uint32_t)&g_tdtail[rhport->rhpndx]);
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(ed->hw.headp & ED_HEADP_ADDR_MASK) ==
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sam_physramaddr((uintptr_t)rhport->tdtail));
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/* We must have exclusive access to the ED pool, the bulk list, the periodic list
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* and the interrupt table.
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@ -2744,7 +2797,7 @@ static void sam_disconnect(FAR struct usbhost_driver_s *drvr)
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/* Remove the disconnected port from the control list */
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sam_ep0dequeue(rhport->rhpndx);
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sam_ep0dequeue(rhport);
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rhport->ep0init = false;
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/* Unbind the class */
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@ -2855,7 +2908,7 @@ FAR struct usbhost_connection_s *sam_ohci_initialize(int controller)
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/* Initialize user-configurable EDs */
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for (i = 0; i < CONFIG_SAMA5_OHCI_NEDS; i++)
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for (i = 0; i < SAMA5_OHCI_NEDS; i++)
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{
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/* Put the ED in a free list */
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@ -2864,7 +2917,7 @@ FAR struct usbhost_connection_s *sam_ohci_initialize(int controller)
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/* Initialize user-configurable TDs */
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for (i = 0; i < CONFIG_SAMA5_OHCI_NTDS; i++)
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for (i = 0; i < SAMA5_OHCI_NTDS; i++)
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{
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/* Put the TD in a free list */
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