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Add generic, upper-half PWM driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4191 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-16 16:17:34 +00:00
parent 3a2318e7f6
commit cabf8f45e9
8 changed files with 578 additions and 103 deletions
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170
arch/arm/src/lpc17xx/lpc17_adc.c
View File

@ -83,11 +83,11 @@
struct up_dev_s
{
uint8_t mask;
uint32_t sps;
int irq;
int32_t buf[8];
uint8_t count[8];
uint8_t mask;
uint32_t sps;
int irq;
int32_t buf[8];
uint8_t count[8];
};
/****************************************************************************
@ -109,24 +109,24 @@ static int adc_interrupt(int irq, void *context);
static const struct adc_ops_s g_adcops =
{
.ao_reset =adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
.ao_rxint = adc_rxint,
.ao_ioctl = adc_ioctl,
.ao_reset =adc_reset,
.ao_setup = adc_setup,
.ao_shutdown = adc_shutdown,
.ao_rxint = adc_rxint,
.ao_ioctl = adc_ioctl,
};
static struct up_dev_s g_adcpriv =
{
.sps = CONFIG_ADC0_SPS,
.mask = CONFIG_ADC0_MASK,
.irq = LPC17_IRQ_ADC,
.sps = CONFIG_ADC0_SPS,
.mask = CONFIG_ADC0_MASK,
.irq = LPC17_IRQ_ADC,
};
static struct adc_dev_s g_adcdev =
{
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv,
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv,
};
/****************************************************************************
@ -139,46 +139,46 @@ static struct adc_dev_s g_adcdev =
static void adc_reset(FAR struct adc_dev_s *dev)
{
irqstate_t flags;
uint32_t regval;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
irqstate_t flags;
uint32_t regval;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
flags = irqsave();
flags = irqsave();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCADC;
putreg32(regval, LPC17_SYSCON_PCONP);
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCADC;
putreg32(regval, LPC17_SYSCON_PCONP);
putreg32(ADC_CR_PDN,LPC17_ADC_CR);
putreg32(ADC_CR_PDN,LPC17_ADC_CR);
regval = getreg32(LPC17_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_ADC_MASK;
regval |= (SYSCON_PCLKSEL_CCLK8 << SYSCON_PCLKSEL0_ADC_SHIFT);
putreg32(regval, LPC17_SYSCON_PCLKSEL0);
regval = getreg32(LPC17_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_ADC_MASK;
regval |= (SYSCON_PCLKSEL_CCLK8 << SYSCON_PCLKSEL0_ADC_SHIFT);
putreg32(regval, LPC17_SYSCON_PCLKSEL0);
uint32_t clkdiv=LPC17_CCLK/8/65/priv->sps;
clkdiv<<=8;
clkdiv&=0xff00;
putreg32(ADC_CR_PDN|ADC_CR_BURST|clkdiv|priv->mask,LPC17_ADC_CR);
uint32_t clkdiv=LPC17_CCLK/8/65/priv->sps;
clkdiv<<=8;
clkdiv&=0xff00;
putreg32(ADC_CR_PDN|ADC_CR_BURST|clkdiv|priv->mask,LPC17_ADC_CR);
if(priv->mask&0x01)
lpc17_configgpio(GPIO_AD0p0);
else if(priv->mask&0x02)
lpc17_configgpio(GPIO_AD0p1);
else if(priv->mask&0x04)
lpc17_configgpio(GPIO_AD0p2);
else if(priv->mask&0x08)
lpc17_configgpio(GPIO_AD0p3);
else if(priv->mask&0x10)
lpc17_configgpio(GPIO_AD0p4);
else if(priv->mask&0x20)
lpc17_configgpio(GPIO_AD0p5);
else if(priv->mask&0x40)
lpc17_configgpio(GPIO_AD0p6);
else if(priv->mask&0x80)
lpc17_configgpio(GPIO_AD0p7);
if(priv->mask&0x01)
lpc17_configgpio(GPIO_AD0p0);
else if(priv->mask&0x02)
lpc17_configgpio(GPIO_AD0p1);
else if(priv->mask&0x04)
lpc17_configgpio(GPIO_AD0p2);
else if(priv->mask&0x08)
lpc17_configgpio(GPIO_AD0p3);
else if(priv->mask&0x10)
lpc17_configgpio(GPIO_AD0p4);
else if(priv->mask&0x20)
lpc17_configgpio(GPIO_AD0p5);
else if(priv->mask&0x40)
lpc17_configgpio(GPIO_AD0p6);
else if(priv->mask&0x80)
lpc17_configgpio(GPIO_AD0p7);
irqrestore(flags);
irqrestore(flags);
}
/* Configure the ADC. This method is called the first time that the ADC
@ -189,19 +189,19 @@ static void adc_reset(FAR struct adc_dev_s *dev)
static int adc_setup(FAR struct adc_dev_s *dev)
{
int i;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
int ret = irq_attach(priv->irq, adc_interrupt);
if (ret == OK)
int i;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
int ret = irq_attach(priv->irq, adc_interrupt);
if (ret == OK)
{
for(i=0;i<8;i++)
for (i = 0; i < 8; i++)
{
priv->buf[i]=0;
priv->count[i]=0;
priv->buf[i]=0;
priv->count[i]=0;
}
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
return ret;
return ret;
}
/* Disable the ADC. This method is called when the ADC device is closed.
@ -210,50 +210,50 @@ static int adc_setup(FAR struct adc_dev_s *dev)
static void adc_shutdown(FAR struct adc_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
/* Call to enable or disable RX interrupts */
static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
if (enable)
putreg32(ADC_INTEN_GLOBAL,LPC17_ADC_INTEN);
else
putreg32(0x00,LPC17_ADC_INTEN);
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
if (enable)
putreg32(ADC_INTEN_GLOBAL, LPC17_ADC_INTEN);
else
putreg32(0x00, LPC17_ADC_INTEN);
}
/* All ioctl calls will be routed through this method */
static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
{
dbg("Fix me:Not Implemented\n");
return 0;
dbg("Fix me:Not Implemented\n");
return 0;
}
static int adc_interrupt(int irq, void *context)
{
uint32_t regval;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
unsigned char ch;
int32_t value;
uint32_t regval;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
unsigned char ch;
int32_t value;
regval=getreg32(LPC17_ADC_GDR);
ch=(regval>>24)&0x07;
priv->buf[ch]+=regval&0xfff0;
priv->count[ch]++;
if(priv->count[ch]>=CONFIG_ADC0_AVERAGE)
regval = getreg32(LPC17_ADC_GDR);
ch = (regval >> 24) & 0x07;
priv->buf[ch] += regval & 0xfff0;
priv->count[ch]++;
if (priv->count[ch] >= CONFIG_ADC0_AVERAGE)
{
value=priv->buf[ch]/priv->count[ch];
value<<=15;
adc_receive(&g_adcdev,ch,value);
priv->buf[ch]=0;
priv->count[ch]=0;
value = priv->buf[ch] / priv->count[ch];
value <<= 15;
adc_receive(&g_adcdev,ch,value);
priv->buf[ch] = 0;
priv->count[ch] = 0;
}
return OK;
return OK;
}
/****************************************************************************
@ -261,7 +261,7 @@ static int adc_interrupt(int irq, void *context)
****************************************************************************/
/****************************************************************************
* Name: up_adcinitialize
* Name: stm32_adcinitialize
*
* Description:
* Initialize the adc
@ -271,9 +271,9 @@ static int adc_interrupt(int irq, void *context)
*
****************************************************************************/
FAR struct adc_dev_s *up_adcinitialize( )
FAR struct adc_dev_s *stm32_adcinitialize(void)
{
return &g_adcdev;
return &g_adcdev;
}
#endif

15
arch/arm/src/lpc17xx/lpc17_internal.h
View File

@ -756,6 +756,21 @@ EXTERN void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
#endif
#endif
/****************************************************************************
* Name: stm32_adcinitialize
*
* Description:
* Initialize the adc
*
* Returned Value:
* Valid can device structure reference on succcess; a NULL on failure
*
****************************************************************************/
#ifdef CONFIG_LPC17_ADC
FAR struct adc_dev_s *stm32_adcinitialize(void);
#endif
/****************************************************************************
* Name: lpc17_dacinitialize
*

12
arch/arm/src/stm32/stm32_adc.c
View File

@ -710,16 +710,16 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
adc_receive(dev, priv->current, value);
/* Set the channel number of the next channel that will complete conversion */
/* Set the channel number of the next channel that will complete conversion */
if (++priv->current >= priv->nchannels)
{
/* Restart the conversion sequence from the beginning */
#warning "Is there anything that you have to do to restart the conversion sequence?"
if (++priv->current >= priv->nchannels)
{
/* Restart the conversion sequence from the beginning */
#warning "Missing logic"
/* Reset the index to the first channel to be converted */
priv->current = 0;
priv->current = 0;
}
}

2
arch/arm/src/stm32/stm32f10xxx_rcc.c
View File

@ -298,7 +298,7 @@ static inline void rcc_enableapb1(void)
regval |= RCC_APB1ENR_PWREN;
#endif
#if defined (CONFIG_STM32_DAC1) || defined(CONFIG_STM32_DAC2)
#if defined(CONFIG_STM32_DAC1) || defined(CONFIG_STM32_DAC2)
/* DAC interface clock enable */
regval |= RCC_APB1ENR_DACEN;

3
drivers/Makefile
View File

@ -68,6 +68,9 @@ ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_DISABLE_MOUNTPOINT),y)
CSRCS += ramdisk.c rwbuffer.c
endif
ifeq ($(CONFIG_PWM),y)
CSRCS += pwm.c
endif
endif
AOBJS = $(ASRCS:.S=$(OBJEXT))

422
drivers/pwm.c Normal file
View File

@ -0,0 +1,422 @@
/****************************************************************************
* drivers/pwm.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Compilation Switches
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <semaphore.h>
#include <fcntl.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/fs.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/irq.h>
#ifdef CONFIG_PWM
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/* This structure describes the state of the upper half drivere */
struct pwm_upperhalf_s
{
uint8_t crefs; /* The number of times the device has been opened */
bool started; /* True: pulsed output is being generated */
sem_t sem; /* Supports mutual exclusion */
struct pwm_info_s info; /* Pulsed output characteristics */
FAR struct pwm_lowerhalf_s *dev; /* lower-half state */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int pwm_open(FAR struct file *filep);
static int pwm_close(FAR struct file *filep);
static ssize_t pwm_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/****************************************************************************
* Private Data
****************************************************************************/
static const struct file_operations g_pwmops =
{
pwm_open, /* open */
pwm_close, /* close */
pwm_read, /* read */
pwm_write, /* write */
0, /* seek */
pwm_ioctl /* ioctl */
#ifndef CONFIG_DISABLE_POLL
, 0 /* poll */
#endif
};
/****************************************************************************
* Private Functions
****************************************************************************/
/************************************************************************************
* Name: pwm_open
*
* Description:
* This function is called whenever the PWM device is opened.
*
************************************************************************************/
static int pwm_open(FAR struct file *filep)
{
FAR struct inode *inode = filep->f_inode;
FAR struct pwm_upperhalf_s *upper = inode->i_private;
uint8_t tmp;
int ret;
/* Get exclusive access to the device structures */
ret = sem_wait(&upper->sem);
if (ret < 0)
{
ret = -errno;
goto errout;
}
/* Increment the count of references to the device. If this the first
* time that the driver has been opened for this device, then initialize
* the device.
*/
tmp = upper->crefs + 1;
if (tmp == 0)
{
/* More than 255 opens; uint8_t overflows to zero */
ret = -EMFILE;
goto errout_with_sem;
}
/* Check if this is the first time that the driver has been opened. */
if (tmp == 1)
{
FAR struct pwm_lowerhalf_s *lower = upper->dev;
/* Yes.. perform one time hardware initialization. */
ret = lower->ops->setup(lower);
if (ret < 0)
{
goto errout_with_sem;
}
}
/* Save the new open count on success */
upper->crefs = tmp;
ret = OK;
errout_with_sem:
sem_post(&upper->sem);
errout:
return ret;
}
/************************************************************************************
* Name: pwm_close
*
* Description:
* This function is called when the PWM device is closed.
*
************************************************************************************/
static int pwm_close(FAR struct file *filep)
{
FAR struct inode *inode = filep->f_inode;
FAR struct pwm_upperhalf_s *upper = inode->i_private;
int ret;
/* Get exclusive access to the device structures */
ret = sem_wait(&upper->sem);
if (ret < 0)
{
ret = -errno;
goto errout;
}
/* Decrement the references to the driver. If the reference count will
* decrement to 0, then uninitialize the driver.
*/
if (upper->crefs > 1)
{
upper->crefs--;
}
else
{
FAR struct pwm_lowerhalf_s *lower = upper->dev;
/* There are no more references to the port */
upper->crefs = 0;
/* Disable the PWM device */
lower->ops->shutdown(lower);
}
ret = OK;
//errout_with_sem:
sem_post(&upper->sem);
errout:
return ret;
}
/************************************************************************************
* Name: pwm_read
*
* Description:
* A dummy read method. This is provided only to satsify the VFS layer.
*
************************************************************************************/
static ssize_t pwm_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
{
/* Return zero -- usually meaning end-of-file */
return 0;
}
/************************************************************************************
* Name: pwm_write
*
* Description:
* A dummy write method. This is provided only to satsify the VFS layer.
*
************************************************************************************/
static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
{
return 0;
}
/************************************************************************************
* Name: pwm_ioctl
*
* Description:
* The standard ioctl method. This is where ALL of the PWM work is done.
*
************************************************************************************/
static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
FAR struct inode *inode = filep->f_inode;
FAR struct pwm_upperhalf_s *upper = inode->i_private;
FAR struct pwm_lowerhalf_s *lower = upper->dev;
int ret = OK;
/* Handle built-in ioctl commands */
switch (cmd)
{
/* PWMIOC_SETCHARACTERISTICS - Set the characteristics of the next pulsed
* output. This command will neither start nor stop the pulsed output.
* It will either setup the configuration that will be used when the
* output is started; or it will change the characteristics of the pulsed
* output on the fly if the timer is already started.
*
* ioctl argument: A read-only reference to struct pwm_info_s that provides
* the characteristics of the pulsed output.
*/
case PWMIOC_SETCHARACTERISTICS:
{
FAR const struct pwm_info_s *info = (FAR const struct pwm_info_s*)((uintptr_t)arg);
memcpy(&upper->info, info, sizeof(struct pwm_info_s));
if (upper->started)
{
ret = lower->ops->start(lower, &upper->info);
}
}
break;
/* PWMIOC_GETCHARACTERISTICS - Get the currently selected characteristics of
* the pulsed output (independent of whether the output is start or stopped).
*
* ioctl argument: A reference to struct pwm_info_s to recevie the
* characteristics of the pulsed output.
*/
case PWMIOC_GETCHARACTERISTICS:
{
FAR struct pwm_info_s *info = (FAR struct pwm_info_s*)((uintptr_t)arg);
memcpy(info, &upper->info, sizeof(struct pwm_info_s));
}
break;
/* PWMIOC_START - Start the pulsed output. The PWMIOC_SETCHARACTERISTICS
* command must have previously been sent.
*
* ioctl argument: None
*/
case PWMIOC_START:
{
if (!upper->started)
{
ret = lower->ops->start(lower, &upper->info);
upper->started = true;
}
}
break;
/* PWMIOC_STOP - Stop the pulsed output.
*
* ioctl argument: None
*/
case PWMIOC_STOP:
{
if (upper->started)
{
ret = lower->ops->stop(lower);
upper->started = false;
}
}
break;
/* PWMIOC_GETPULSECOUNT - Return the number of pulses generated.
*
* ioctl argument: A pointer to a pwm_count_t variable that will be used to
* receive the pulse count
*/
case PWMIOC_GETPULSECOUNT:
{
FAR pwm_count_t *count = (FAR pwm_count_t *)((uintptr_t)arg);
ret = lower->ops->pulsecount(lower, count);
}
break;
/* Any unrecognized IOCTL commands might be platform-specific ioctl commands */
default:
{
ret = lower->ops->ioctl(lower, cmd, arg);
}
break;
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: pwm_register
*
* Description:
* This function binds an instance of a "lower half" timer driver with the
* "upper half" PWM device and registers that device so that can be used
* by application code.
*
* When this function is called, the "lower half" driver should be in the
* reset state (as if the shutdown() method had already been called).
*
* Input parameters:
* path - The full path to the driver to be registers in the NuttX pseudo-
* filesystem. The recommended convention is to name all PWM drivers
* as "/dev/pwm0", "/dev/pwm1", etc. where the driver path differs only
* in the "minor" number at the end of the device name.
* dev - A pointer to an instance of lower half timer driver. This instance
* is bound to the PWM driver and must persists as long as the driver
* persists.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev)
{
FAR struct pwm_upperhalf_s *upper;
/* Allocate the upper-half data structure */
upper = (FAR struct pwm_upperhalf_s *)zalloc(sizeof(struct pwm_upperhalf_s));
if (!upper)
{
return -ENOMEM;
}
/* Initialize the PWM device structure (it was already zeroed by zalloc()) */
sem_init(&upper->sem, 0, 1);
upper->dev = dev;
/* Register the PWM device */
vdbg("Registering %s\n", path);
return register_driver(path, &g_pwmops, 0666, dev);
}
#endif /* CONFIG_PWM */

48
include/nuttx/analog/adc.h
View File

@ -159,18 +159,55 @@ struct adc_dev_s
extern "C" {
#endif
/************************************************************************************
* "Upper-Half" ADC Driver Interfaces
************************************************************************************/
/************************************************************************************
* Name: adc_register
*
* Description:
* Register a adc driver.
* Register a ADC driver. This function binds an instance of a "lower half" ADC
* driver with the "upper half" ADC device and registers that device so that can
* be used by application code.
*
* Input parameters:
* path - The full path to the driver to be registers in the NuttX pseudo-
* filesystem. The recommended convention is to name all PWM drivers
* as "/dev/adc", "/dev/adc1", etc. where the driver path differs only
* in the "minor" number at the end of the device name.
* dev - A pointer to an instance of lower half ADC driver. This instance
* is bound to the upper half ADC driver and must persists as long as the
* upper half driver driver persists.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
************************************************************************************/
int adc_register(FAR const char *path, FAR struct adc_dev_s *dev);
/************************************************************************************
* Name: adc_receive
*
* Description:
* This function is called from the lower half, platform-specific ADC logic when
* new ADC sample data is available.
*
* Input Parameters:
* dev - The ADC device structure that was previously registered by adc_register()
* ch - And ID for the ADC channel number that generated the data
* data - The actualy converted data from the channel.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
************************************************************************************/
int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data);
/************************************************************************************
* Platform-Independent "Lower Half" ADC Driver Interfaces
************************************************************************************/
/************************************************************************************
* Name: up_ads1255initialize
*
@ -181,15 +218,6 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data);
FAR struct adc_dev_s *up_ads1255initialize(FAR struct spi_dev_s *spi, unsigned int devno);
/************************************************************************************
* Name: up_adcinitialize
*
* Description:
* Initialize the MCU internal adc driver
*
************************************************************************************/
FAR struct adc_dev_s *up_adcinitialize();
#if defined(__cplusplus)
}
#endif

9
include/nuttx/ioctl.h
View File

@ -61,7 +61,9 @@
#define _ARPIOCBASE (0x0800) /* ARP ioctl commands */
#define _TSIOCBASE (0x0900) /* Touchscreen ioctl commands */
#define _SNIOCBASE (0x0a00) /* Sensor ioctl commands */
#define _CAIOCBASE (0x0b00) /* CDC/ACM ioctl commands */
#define _ANIOCBASE (0x0b00) /* Analog (DAC/ADC) ioctl commands */
#define _PWMIOCBASE (0x0c00) /* PWM ioctl commands */
#define _CAIOCBASE (0x0d00) /* CDC/ACM ioctl commands */
/* Macros used to manage ioctl commands */
@ -173,6 +175,11 @@
#define _SNIOCVALID(c) (_IOC_TYPE(c)==_SNIOCBASE)
#define _SNIOC(nr) _IOC(_SNIOCBASE,nr)
/* NuttX PWM ioctl definitions (see nuttx/pwm.h) ***************************/
#define _PWMIOCVALID(c) (_IOC_TYPE(c)==_PWMIOCBASE)
#define _PWMIOC(nr) _IOC(_PWMIOCBASE,nr)
/* NuttX USB CDC/ACM serial driver ioctl definitions ************************/
/* (see nuttx/usb/cdc_serial.h) */