Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177)

Allow a config to override the SDIO clock edge setting
This commit is contained in:
Gregory Nutt 2016-12-07 12:48:11 +00:00
commit cae56b825b
2 changed files with 25 additions and 9 deletions

View File

@ -149,18 +149,26 @@
#define SDIO_CLKCR_RISINGEDGE (0)
#define SDIO_CLKCR_FALLINGEDGE SDIO_CLKCR_NEGEDGE
/* Use the default of the rising edge but allow a configuration,
* that does not have the errata, to override the edge the SDIO
* command and data is changed on.
*/
#if !defined(SDIO_CLKCR_EDGE)
# define SDIO_CLKCR_EDGE SDIO_CLKCR_RISINGEDGE
#endif
/* Mode dependent settings. These depend on clock devisor settings that must
* be defined in the board-specific board.h header file: SDIO_INIT_CLKDIV,
* SDIO_MMCXFR_CLKDIV, and SDIO_SDXFR_CLKDIV.
*/
#define STM32_CLCKCR_INIT (SDIO_INIT_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
#define STM32_CLCKCR_INIT (SDIO_INIT_CLKDIV | SDIO_CLKCR_EDGE | \
SDIO_CLKCR_WIDBUS_D1)
#define SDIO_CLKCR_MMCXFR (SDIO_MMCXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
#define SDIO_CLKCR_MMCXFR (SDIO_MMCXFR_CLKDIV | SDIO_CLKCR_EDGE | \
SDIO_CLKCR_WIDBUS_D1)
#define SDIO_CLCKR_SDXFR (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
#define SDIO_CLCKR_SDXFR (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_EDGE | \
SDIO_CLKCR_WIDBUS_D1)
#define SDIO_CLCKR_SDWIDEXFR (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_RISINGEDGE | \
#define SDIO_CLCKR_SDWIDEXFR (SDIO_SDXFR_CLKDIV | SDIO_CLKCR_EDGE | \
SDIO_CLKCR_WIDBUS_D4)
/* Timing */

View File

@ -154,7 +154,15 @@
/* Friendly CLKCR bit re-definitions ****************************************/
#define STM32_CLKCR_RISINGEDGE (0)
#define STM32_CLKCR_FALLINGEDGE STM32_CLKCR_NEGEDGE
#define STM32_CLKCR_FALLINGEDGE STM32_SDMMC_CLKCR_NEGEDGE
/* Use the default of the rising edge but allow a configuration,
* that does not have the errata, to override the edge the SDIO
* command and data is changed on.
*/
#if !defined(STM32_SDMMC_CLKCR_EDGE)
# define STM32_SDMMC_CLKCR_EDGE STM32_CLKCR_RISINGEDGE
#endif
/* Mode dependent settings. These depend on clock divisor settings that must
* be defined in the board-specific board.h header file: STM32_SDMMC_INIT_CLKDIV,
@ -162,16 +170,16 @@
*/
#define STM32_CLCKCR_INIT (STM32_SDMMC_INIT_CLKDIV | \
STM32_CLKCR_RISINGEDGE | \
STM32_SDMMC_CLKCR_EDGE | \
STM32_SDMMC_CLKCR_WIDBUS_D1)
#define STM32_SDMMC_CLKCR_MMCXFR (STM32_SDMMC_MMCXFR_CLKDIV | \
STM32_CLKCR_RISINGEDGE | \
STM32_SDMMC_CLKCR_EDGE | \
STM32_SDMMC_CLKCR_WIDBUS_D1)
#define STM32_SDMMC_CLCKR_SDXFR (STM32_SDMMC_SDXFR_CLKDIV | \
STM32_CLKCR_RISINGEDGE | \
STM32_SDMMC_CLKCR_EDGE | \
STM32_SDMMC_CLKCR_WIDBUS_D1)
#define STM32_SDMMC_CLCKR_SDWIDEXFR (STM32_SDMMC_SDXFR_CLKDIV | \
STM32_CLKCR_RISINGEDGE | \
STM32_SDMMC_CLKCR_EDGE | \
STM32_SDMMC_CLKCR_WIDBUS_D4)
/* Timing */