arch/risc-v: Improve the SBI function handle
To simplify processing, the existed SBI function code is just invoking the ecall and return the error value. This omits potential return value in "a1", which is defined in SBI doc. Add the "sbiret" struct so it can handle all the return value. In addition, there are some minor improvement: 1. move the SBI related interface to a separate file to make it clean. 2. add all necessary SBI ecall interface macro until version 2.0. 3. add an utilty function to convert sbi error numner to standard error number. Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
This commit is contained in:
Inochi Amaoto
Xiang Xiao
parent
dab55ef6e2
commit
caeb1757f6
@ -81,8 +81,10 @@ typedef int _wchar_t;
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/* Use uintreg_t for register-width integers */
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#ifdef CONFIG_ARCH_RV32
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typedef _int32_t intreg_t;
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typedef _uint32_t uintreg_t;
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#else
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typedef _int64_t intreg_t;
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typedef _uint64_t uintreg_t;
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#endif
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@ -37,6 +37,7 @@
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#include <nuttx/irq.h>
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#include "riscv_sbi.h"
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#include "riscv_common_memorymap.h"
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/****************************************************************************
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@ -209,40 +210,6 @@ static inline void putreg64(uint64_t v, const volatile uintreg_t a)
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#endif
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/* SBI Extension IDs */
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#define SBI_EXT_HSM 0x48534D
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#define SBI_EXT_IPI 0x735049
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#define SBI_EXT_TIME 0x54494D45
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#define SBI_EXT_SRST 0x53525354
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/* SBI function IDs for TIME extension */
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#define SBI_EXT_TIME_SET_TIMER 0x0
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/* SBI function IDs for HSM extension */
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#define SBI_EXT_HSM_HART_START 0x0
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/* SBI function IDs for IPI extension */
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#define SBI_EXT_IPI_SEND_IPI 0x0
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/* SBI function IDs for SRST extension */
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#define SBI_EXT_SRST_SYS_RESET 0x0
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/* SBI system reset type */
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#define SBI_SRST_TYPE_SHUTDOWN 0
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#define SBI_SRST_TYPE_REBOOT_COLD 1
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#define SBI_SRST_TYPE_REBOOT_WARM 1
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/* SBI system reset reason */
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#define SBI_SRST_REASON_NONE 0
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#define SBI_SRST_REASON_FAILURE 1
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@ -372,17 +339,6 @@ int riscv_check_pmp_access(uintptr_t attr, uintptr_t base, uintptr_t size);
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int riscv_configured_pmp_regions(void);
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int riscv_next_free_pmp_region(void);
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/* RISC-V SBI wrappers ******************************************************/
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#ifdef CONFIG_ARCH_USE_S_MODE
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uintptr_t riscv_sbi_send_ipi(uint32_t hmask, uintptr_t hbase);
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void riscv_sbi_set_timer(uint64_t stime_value);
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uint64_t riscv_sbi_get_time(void);
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uintptr_t riscv_sbi_boot_secondary(uint32_t hartid, uintptr_t addr,
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uintptr_t a1);
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uintptr_t riscv_sbi_system_reset(uint32_t type, uint32_t reason);
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#endif
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/* Power management *********************************************************/
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#ifdef CONFIG_PM
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284
arch/risc-v/src/common/riscv_sbi.h
Normal file
284
arch/risc-v/src/common/riscv_sbi.h
Normal file
@ -0,0 +1,284 @@
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/****************************************************************************
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* arch/risc-v/src/common/riscv_sbi.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_COMMON_RISCV_SBI_H
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#define __ARCH_RISCV_SRC_COMMON_RISCV_SBI_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/types.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* SBI Extension IDs */
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#define SBI_EXT_BASE 0x00000010
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#define SBI_EXT_IPI 0x00735049
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#define SBI_EXT_TIME 0x54494D45
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#define SBI_EXT_RFENCE 0x52464E43
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#define SBI_EXT_HSM 0x0048534D
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#define SBI_EXT_SRST 0x53525354
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#define SBI_EXT_PMU 0x00504D55
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#define SBI_EXT_DBCN 0x4442434E
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#define SBI_EXT_SUSP 0x53555350
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/* SBI function IDs for BASE extension */
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#define SBI_EXT_BASE_GET_SPEC_VERSION 0x0
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#define SBI_EXT_BASE_GET_IMP_ID 0x1
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#define SBI_EXT_BASE_GET_IMP_VERSION 0x2
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#define SBI_EXT_BASE_PROBE_EXT 0x3
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#define SBI_EXT_BASE_GET_MVENDORID 0x4
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#define SBI_EXT_BASE_GET_MARCHID 0x5
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#define SBI_EXT_BASE_GET_MIMPID 0x6
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/* SBI function IDs for TIME extension */
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#define SBI_EXT_TIME_SET_TIMER 0x0
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/* SBI function IDs for IPI extension */
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#define SBI_EXT_IPI_SEND_IPI 0x0
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/* SBI function IDs for RFENCE extension */
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#define SBI_EXT_RFENCE_REMOTE_FENCE_I 0x0
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#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA 0x1
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#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID 0x2
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#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID 0x3
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#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA 0x4
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#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x5
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#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x6
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/* SBI function IDs for HSM extension */
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#define SBI_EXT_HSM_HART_START 0x0
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#define SBI_EXT_HSM_HART_STOP 0x1
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#define SBI_EXT_HSM_HART_GET_STATUS 0x2
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#define SBI_EXT_HSM_HART_SUSPEND 0x3
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#define SBI_HSM_STATE_STARTED 0x0
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#define SBI_HSM_STATE_STOPPED 0x1
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#define SBI_HSM_STATE_START_PENDING 0x2
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#define SBI_HSM_STATE_STOP_PENDING 0x3
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#define SBI_HSM_STATE_SUSPENDED 0x4
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#define SBI_HSM_STATE_SUSPEND_PENDING 0x5
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#define SBI_HSM_STATE_RESUME_PENDING 0x6
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/* SBI function IDs for SRST extension */
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#define SBI_EXT_SRST_SYS_RESET 0x0
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/* SBI system reset type */
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#define SBI_SRST_TYPE_SHUTDOWN 0
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#define SBI_SRST_TYPE_REBOOT_COLD 1
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#define SBI_SRST_TYPE_REBOOT_WARM 1
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/* SBI system reset reason */
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#define SBI_SRST_REASON_NONE 0
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#define SBI_SRST_REASON_FAILURE 1
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/* SBI function IDs for PMU extension */
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#define SBI_EXT_PMU_NUM_COUNTERS 0x0
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#define SBI_EXT_PMU_COUNTER_GET_INFO 0x1
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#define SBI_EXT_PMU_COUNTER_CFG_MATCH 0x2
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#define SBI_EXT_PMU_COUNTER_START 0x3
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#define SBI_EXT_PMU_COUNTER_STOP 0x4
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#define SBI_EXT_PMU_COUNTER_FW_READ 0x5
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#define SBI_EXT_PMU_COUNTER_FW_READ_HI 0x6
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#define SBI_EXT_PMU_SNAPSHOT_SET_SHMEM 0x7
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/* SBI PMU counter config match flags */
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#define SBI_PMU_CFG_FLAG_SKIP_MATCH (1 << 0)
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#define SBI_PMU_CFG_FLAG_CLEAR_VALUE (1 << 1)
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#define SBI_PMU_CFG_FLAG_AUTO_START (1 << 2)
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#define SBI_PMU_CFG_FLAG_SET_VUINH (1 << 3)
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#define SBI_PMU_CFG_FLAG_SET_VSINH (1 << 4)
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#define SBI_PMU_CFG_FLAG_SET_UINH (1 << 5)
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#define SBI_PMU_CFG_FLAG_SET_SINH (1 << 6)
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#define SBI_PMU_CFG_FLAG_SET_MINH (1 << 7)
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/* SBI PMU counter start flags */
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#define SBI_PMU_START_FLAG_SET_INIT_VALUE (1 << 0)
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#define SBI_PMU_START_FLAG_INIT_FROM_SNAPSHOT (1 << 1)
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/* SBI PMU counter stop flags */
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#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
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#define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT (1 << 1)
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/* SBI function IDs for DBCN extension */
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#define SBI_EXT_DBCN_CONSOLE_WRITE 0x0
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#define SBI_EXT_DBCN_CONSOLE_READ 0x1
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#define SBI_EXT_DBCN_CONSOLE_WRITE_BYTE 0x2
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/* SBI function IDs for SUSP extension */
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#define SBI_EXT_SUSP_SUSPEND 0x0
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/* SBI system suspend type */
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#define SBI_SUSP_SLEEP_TYPE_SUSPEND 0x0
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/* SBI return error codes */
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#define SBI_SUCCESS 0
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#define SBI_ERR_FAILED -1
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#define SBI_ERR_NOT_SUPPORTED -2
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#define SBI_ERR_INVALID_PARAM -3
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#define SBI_ERR_DENIED -4
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#define SBI_ERR_INVALID_ADDRESS -5
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#define SBI_ERR_ALREADY_AVAILABLE -6
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#define SBI_ERR_ALREADY_STARTED -7
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#define SBI_ERR_ALREADY_STOPPED -8
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#define SBI_ERR_NO_SHMEM -9
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#define SBI_ERR_INVALID_STATE -10
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#define SBI_ERR_BAD_RANGE -11
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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struct sbiret_s
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{
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intreg_t error;
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uintreg_t value;
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};
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typedef struct sbiret_s sbiret_t;
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/* RISC-V SBI wrappers ******************************************************/
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#ifdef CONFIG_ARCH_USE_S_MODE
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/****************************************************************************
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* Name: sbi_err_map_errno
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*
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* Description:
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* Convert SBI error value to posix error value
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*
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* Input Parameters:
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* err - error value of SBI function
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*
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* Return:
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* Posix error value representing the input
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*
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****************************************************************************/
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int sbi_err_map_errno(intreg_t err);
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/****************************************************************************
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* Name: riscv_sbi_send_ipi
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*
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* Description:
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* Send a ipi to the target harts
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*
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* Input Parameters:
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* hmask - bit mask for target harts
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* hbase - the start hart id to send
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*
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****************************************************************************/
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void riscv_sbi_send_ipi(uintreg_t hmask, uintreg_t hbase);
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/****************************************************************************
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* Name: riscv_sbi_set_timer
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*
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* Description:
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* Set new compare match value for timer
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*
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* Input Parameters:
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* stime_value - Value to set
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*
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****************************************************************************/
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void riscv_sbi_set_timer(uint64_t stime_value);
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/****************************************************************************
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* Name: riscv_sbi_get_time
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*
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* Description:
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* Get value of mtime
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*
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* Return:
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* Value of mtime
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*
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****************************************************************************/
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uint64_t riscv_sbi_get_time(void);
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/****************************************************************************
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* Name: riscv_sbi_boot_secondary
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*
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* Description:
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* Start the target hart
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*
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* Input Parameters:
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* hartid - hart id to start
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* addr - start address for the hart
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* a1 - opaque parameter for the hart
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*
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****************************************************************************/
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int riscv_sbi_boot_secondary(uintreg_t hartid, uintreg_t addr,
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uintreg_t a1);
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/****************************************************************************
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* Name: riscv_sbi_system_reset
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*
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* Description:
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* Reset the system with specific type and reason.
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*
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****************************************************************************/
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int riscv_sbi_system_reset(uint32_t type, uint32_t reason);
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_RISCV_SRC_COMMON_RISCV_SBI_H */
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@ -31,6 +31,7 @@
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#include <stdint.h>
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#include "riscv_sbi.h"
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#include "riscv_internal.h"
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#ifdef CONFIG_NUTTSBI
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@ -41,10 +42,10 @@
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* Private Functions
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****************************************************************************/
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static inline uintptr_t sbi_ecall(unsigned int extid, unsigned int fid,
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uintptr_t parm0, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3,
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uintptr_t parm4, uintptr_t parm5)
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static inline sbiret_t sbi_ecall(unsigned int extid, unsigned int fid,
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uintreg_t parm0, uintreg_t parm1,
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uintreg_t parm2, uintreg_t parm3,
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uintreg_t parm4, uintreg_t parm5)
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{
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register long r0 asm("a0") = (long)(parm0);
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register long r1 asm("a1") = (long)(parm1);
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@ -54,6 +55,7 @@ static inline uintptr_t sbi_ecall(unsigned int extid, unsigned int fid,
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register long r5 asm("a5") = (long)(parm5);
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register long r6 asm("a6") = (long)(fid);
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register long r7 asm("a7") = (long)(extid);
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sbiret_t ret;
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asm volatile
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(
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@ -63,23 +65,34 @@ static inline uintptr_t sbi_ecall(unsigned int extid, unsigned int fid,
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: "memory"
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);
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return r1;
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ret.error = r0;
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ret.value = (uintreg_t)r1;
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: riscv_sbi_set_timer
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*
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* Description:
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* Set new compare match value for timer
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*
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* Input Parameters:
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* stime_value - Value to set
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*
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****************************************************************************/
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int sbi_err_map_errno(intreg_t err)
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{
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switch (err)
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{
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case SBI_SUCCESS:
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return 0;
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case SBI_ERR_DENIED:
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return -EPERM;
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case SBI_ERR_INVALID_PARAM:
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return -EINVAL;
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case SBI_ERR_INVALID_ADDRESS:
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return -EFAULT;
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case SBI_ERR_NOT_SUPPORTED:
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case SBI_ERR_FAILED:
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default:
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return -ENOTSUP;
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};
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}
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void riscv_sbi_set_timer(uint64_t stime_value)
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{
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@ -92,22 +105,13 @@ void riscv_sbi_set_timer(uint64_t stime_value)
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#endif
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}
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/****************************************************************************
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* Name: riscv_sbi_get_time
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*
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* Description:
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* Get value of mtime
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*
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* Return:
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* Value of mtime
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*
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****************************************************************************/
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uint64_t riscv_sbi_get_time(void)
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{
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#ifdef CONFIG_NUTTSBI
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return sbi_ecall(SBI_EXT_FIRMWARE, SBI_EXT_FIRMWARE_GET_MTIME, 0, 0,
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0, 0, 0, 0);
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sbiret_t ret = sbi_ecall(SBI_EXT_FIRMWARE, SBI_EXT_FIRMWARE_GET_MTIME,
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0, 0, 0, 0, 0, 0);
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return ret.value;
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#elif defined(CONFIG_ARCH_RV64)
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return READ_CSR(CSR_TIME);
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#else
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@ -125,23 +129,37 @@ uint64_t riscv_sbi_get_time(void)
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#endif
|
||||
}
|
||||
|
||||
uintptr_t riscv_sbi_send_ipi(uint32_t hmask, uintptr_t hbase)
|
||||
void riscv_sbi_send_ipi(uintreg_t hmask, uintreg_t hbase)
|
||||
{
|
||||
return sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
|
||||
hmask, hbase, 0, 0, 0, 0);
|
||||
sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
|
||||
hmask, hbase, 0, 0, 0, 0);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_NUTTSBI
|
||||
uintptr_t riscv_sbi_system_reset(uint32_t type, uint32_t reason)
|
||||
int riscv_sbi_boot_secondary(uintreg_t hartid, uintreg_t addr,
|
||||
uintreg_t a1)
|
||||
{
|
||||
return sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_SYS_RESET,
|
||||
type, reason, 0, 0, 0, 0);
|
||||
sbiret_t ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START,
|
||||
hartid, addr, a1, 0, 0, 0);
|
||||
|
||||
if (ret.error < 0)
|
||||
{
|
||||
return sbi_err_map_errno(ret.error);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
uintptr_t riscv_sbi_boot_secondary(uint32_t hartid, uintptr_t addr,
|
||||
uintptr_t a1)
|
||||
int riscv_sbi_system_reset(uint32_t type, uint32_t reason)
|
||||
{
|
||||
return sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START,
|
||||
hartid, addr, a1, 0, 0, 0);
|
||||
sbiret_t ret = sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_SYS_RESET,
|
||||
type, reason, 0, 0, 0, 0);
|
||||
|
||||
if (ret.error < 0)
|
||||
{
|
||||
return sbi_err_map_errno(ret.error);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_NUTTSBI */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user