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arch/risc-v/bl602: add gpioirq and i2c(master) driver

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This commit is contained in:
liang 2021-01-14 09:04:49 +08:00 committed by Brennan Ashton
parent c618d0447b
commit caf2d1430e
15 changed files with 2158 additions and 102 deletions
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3
arch/risc-v/src/bl602/Kconfig
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@ -39,6 +39,9 @@ config BL602_TIMER1
config BL602_PWM0
bool "PWM0"
config BL602_I2C0
bool "I2C0"
config BL602_SPIFLASH
bool "SPI Flash"
default n

4
arch/risc-v/src/bl602/Make.defs
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@ -48,6 +48,10 @@ CHIP_CSRCS += bl602_idle.c bl602_irq.c bl602_irq_dispatch.c
CHIP_CSRCS += bl602_serial.c bl602_lowputc.c bl602_tim.c
CHIP_CSRCS += bl602_start.c bl602_timerisr.c
ifeq ($(CONFIG_I2C),y)
CHIP_CSRCS += bl602_i2c.c
endif
ifeq ($(CONFIG_TIMER),y)
CHIP_CSRCS += bl602_tim_lowerhalf.c
endif

28
arch/risc-v/src/bl602/bl602_glb.c
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@ -25,7 +25,6 @@
#include <nuttx/config.h>
#include <stdint.h>
#include "riscv_arch.h"
#include "hardware/bl602_glb.h"
@ -33,7 +32,7 @@
* Pre-Processor Declarations
****************************************************************************/
#define nop() asm volatile ("nop")
#define nop() asm volatile("nop")
/****************************************************************************
* Public Functions
@ -71,3 +70,28 @@ void bl602_swrst_ahb_slave1(uint32_t slave1)
nop();
modifyreg32(BL602_SWRST_CFG1, slave1, 0);
}
/****************************************************************************
* Name: bl602_glb_get_bclk_div
*
* Description:
* get bus clock div.
*
* Input Parameters:
* void
*
* Returned Value:
* bus clock div
*
****************************************************************************/
uint8_t bl602_glb_get_bclk_div(void)
{
uint32_t tmp_val;
tmp_val = getreg32(BL602_CLK_CFG0);
tmp_val =
(CLK_CFG0_REG_BCLK_DIV_MASK & tmp_val) >> CLK_CFG0_REG_BCLK_DIV_SHIFT;
return (uint8_t)tmp_val;
}

16
arch/risc-v/src/bl602/bl602_glb.h
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@ -64,6 +64,22 @@ extern "C"
void bl602_swrst_ahb_slave1(uint32_t slave1);
/****************************************************************************
* Name: bl602_glb_get_bclk_div
*
* Description:
* get bus clock div.
*
* Input Parameters:
* void
*
* Returned Value:
* bus clock div
*
****************************************************************************/
uint8_t bl602_glb_get_bclk_div(void);
#undef EXTERN
#if defined(__cplusplus)
}

2
arch/risc-v/src/bl602/bl602_gpio.c
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@ -219,5 +219,5 @@ void bl602_gpiowrite(gpio_pinset_t pinset, bool value)
bool bl602_gpioread(gpio_pinset_t pinset)
{
uint8_t pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
return (getreg32(BL602_GPIO_CFGCTL30) & (1 << pin)) == 1;
return ((getreg32(BL602_GPIO_CFGCTL30) & (1 << pin)) ? 1 : 0);
}

150
arch/risc-v/src/bl602/bl602_gpio.h
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@ -28,8 +28,8 @@
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#include <stdint.h>
#include <stdbool.h>
#endif
#include <nuttx/irq.h>
@ -81,11 +81,11 @@
* ..UU .... .... ....
*/
#define GPIO_PUPD_SHIFT (12) /* Bits 16-17: Pull-up/down */
#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
# define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
# define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
# define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
#define GPIO_PUPD_SHIFT (12) /* Bits 16-17: Pull-up/down */
#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
#define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
#define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
#define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
/* Drive:
*
@ -95,12 +95,12 @@
* .... DD.. .... ....
*/
#define GPIO_DRV_SHIFT (10) /* Bits 10-11: Drive */
#define GPIO_DRV_MASK (3 << GPIO_DRV_SHIFT)
# define GPIO_DRV_0 (0 << GPIO_DRV_SHIFT)
# define GPIO_DRV_1 (1 << GPIO_DRV_SHIFT)
# define GPIO_DRV_2 (2 << GPIO_DRV_SHIFT)
# define GPIO_DRV_3 (3 << GPIO_DRV_SHIFT)
#define GPIO_DRV_SHIFT (10) /* Bits 10-11: Drive */
#define GPIO_DRV_MASK (3 << GPIO_DRV_SHIFT)
#define GPIO_DRV_0 (0 << GPIO_DRV_SHIFT)
#define GPIO_DRV_1 (1 << GPIO_DRV_SHIFT)
#define GPIO_DRV_2 (2 << GPIO_DRV_SHIFT)
#define GPIO_DRV_3 (3 << GPIO_DRV_SHIFT)
/* Input Schmitt trigger:
*
@ -110,10 +110,10 @@
* .... ..S. .... ....
*/
#define GPIO_SMT_SHIFT (9) /* Bits 9: SMT Enable */
#define GPIO_SMT_MASK (3 << GPIO_SMT_SHIFT)
# define GPIO_SMT_DIS (0 << GPIO_SMT_SHIFT)
# define GPIO_SMT_EN (1 << GPIO_SMT_SHIFT)
#define GPIO_SMT_SHIFT (9) /* Bits 9: SMT Enable */
#define GPIO_SMT_MASK (3 << GPIO_SMT_SHIFT)
#define GPIO_SMT_DIS (0 << GPIO_SMT_SHIFT)
#define GPIO_SMT_EN (1 << GPIO_SMT_SHIFT)
/* GPIO type selection:
*
@ -123,18 +123,18 @@
* .... ...F FFF. ....
*/
#define GPIO_FUNC_SHIFT (5) /* Bits 5-8: GPIO Type */
#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
# define GPIO_FUNC_SDIO (1 << GPIO_FUNC_SHIFT) /* SDIO */
# define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */
# define GPIO_FUNC_SPI (4 << GPIO_FUNC_SHIFT) /* SPI */
# define GPIO_FUNC_I2C (6 << GPIO_FUNC_SHIFT) /* I2C */
# define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */
# define GPIO_FUNC_PWM (8 << GPIO_FUNC_SHIFT) /* PWM */
# define GPIO_FUNC_EXT_PA (9 << GPIO_FUNC_SHIFT) /* Analog */
# define GPIO_FUNC_ANA (10 << GPIO_FUNC_SHIFT) /* Analog */
# define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */
# define GPIO_FUNC_JTAG (14 << GPIO_FUNC_SHIFT) /* JTAG */
#define GPIO_FUNC_SHIFT (5) /* Bits 5-8: GPIO Type */
#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
#define GPIO_FUNC_SDIO (1 << GPIO_FUNC_SHIFT) /* SDIO */
#define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */
#define GPIO_FUNC_SPI (4 << GPIO_FUNC_SHIFT) /* SPI */
#define GPIO_FUNC_I2C (6 << GPIO_FUNC_SHIFT) /* I2C */
#define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */
#define GPIO_FUNC_PWM (8 << GPIO_FUNC_SHIFT) /* PWM */
#define GPIO_FUNC_EXT_PA (9 << GPIO_FUNC_SHIFT) /* Analog */
#define GPIO_FUNC_ANA (10 << GPIO_FUNC_SHIFT) /* Analog */
#define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */
#define GPIO_FUNC_JTAG (14 << GPIO_FUNC_SHIFT) /* JTAG */
/* This identifies the bit in the port:
*
@ -146,35 +146,49 @@
#define GPIO_PIN_SHIFT (0) /* Bits 0-4: GPIO number: 0-28 */
#define GPIO_PIN_MASK (0x1f << GPIO_PIN_SHIFT)
# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
/* GLB GPIO interrupt trigger mode type definition */
#define GLB_GPIO_INT_TRIG_NEG_PULSE \
0 /* GPIO negedge pulse trigger interrupt */
#define GLB_GPIO_INT_TRIG_POS_PULSE \
1 /* GPIO posedge pulse trigger interrupt */
#define GLB_GPIO_INT_TRIG_NEG_LEVEL \
2 /* GPIO negedge level trigger interrupt (32k 3T) */
#define GLB_GPIO_INT_TRIG_POS_LEVEL \
3 /* GPIO posedge level trigger interrupt (32k 3T) */
/****************************************************************************
* Public Types
@ -286,8 +300,22 @@ bool bl602_gpioread(gpio_pinset_t pinset);
*
****************************************************************************/
int bl602_gpiosetevent(gpio_pinset_t pinset, bool risingedge,
bool fallingedge, bool event, xcpt_t func, void *arg);
int bl602_gpiosetevent(gpio_pinset_t pinset,
bool risingedge,
bool fallingedge,
bool event,
xcpt_t func,
void * arg);
/****************************************************************************
* Name: bl602_gpio_initialize
*
* Description:
* Initialize GPIO drivers for use with /apps/examples/gpio
*
****************************************************************************/
int bl602_gpio_initialize(void);
/****************************************************************************
* Function: bl602_dumpgpio
@ -300,7 +328,7 @@ int bl602_gpiosetevent(gpio_pinset_t pinset, bool risingedge,
#ifdef CONFIG_DEBUG_GPIO_INFO
int bl602_dumpgpio(gpio_pinset_t pinset, const char *msg);
#else
# define bl602_dumpgpio(p,m)
#define bl602_dumpgpio(p, m)
#endif
#undef EXTERN

1042
arch/risc-v/src/bl602/bl602_i2c.c Normal file
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File diff suppressed because it is too large Load Diff

92
arch/risc-v/src/bl602/bl602_i2c.h Normal file
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@ -0,0 +1,92 @@
/****************************************************************************
* arch/risc-v/src/bl602/bl602_i2c.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_BL602_BL602_I2C_H
#define __ARCH_RISCV_SRC_BL602_BL602_I2C_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/i2c/i2c_master.h>
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: bl602_i2cbus_initialize
*
* Description:
* Initialize the selected I2C port. And return a unique instance of struct
* struct i2c_master_s. This function may be called to obtain multiple
* instances of the interface, each of which may be set up with a
* different frequency and slave address.
*
* Input Parameters:
* Port number (for hardware that has multiple I2C interfaces)
*
* Returned Value:
* Valid I2C device structure reference on success; a NULL on failure
*
****************************************************************************/
struct i2c_master_s *bl602_i2cbus_initialize(int port);
/****************************************************************************
* Name: bl602_i2cbus_uninitialize
*
* Description:
* De-initialize the selected I2C port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the bl602_i2cbus_initialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
* points to invalid hardware device.
*
****************************************************************************/
int bl602_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_BL602_BL602_HBN_H */

91
arch/risc-v/src/bl602/hardware/bl602_i2c.h
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@ -48,28 +48,36 @@
/* Register definitions *****************************************************/
#define BL602_I2C_CONFIG (BL602_I2C_BASE + BL602_I2C_CONFIG_OFFSET)
#define BL602_I2C_INT_STS (BL602_I2C_BASE + BL602_I2C_INT_STS_OFFSET)
#define BL602_I2C_SUB_ADDR (BL602_I2C_BASE + BL602_I2C_SUB_ADDR_OFFSET)
#define BL602_I2C_BUS_BUSY (BL602_I2C_BASE + BL602_I2C_BUS_BUSY_OFFSET)
#define BL602_I2C_PRD_START (BL602_I2C_BASE + BL602_I2C_PRD_START_OFFSET)
#define BL602_I2C_PRD_STOP (BL602_I2C_BASE + BL602_I2C_PRD_STOP_OFFSET)
#define BL602_I2C_PRD_DATA (BL602_I2C_BASE + BL602_I2C_PRD_DATA_OFFSET)
#define BL602_I2C_FIFO_CONFIG_0 (BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_0_OFFSET)
#define BL602_I2C_FIFO_CONFIG_1 (BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_1_OFFSET)
#define BL602_I2C_FIFO_WDATA (BL602_I2C_BASE + BL602_I2C_FIFO_WDATA_OFFSET)
#define BL602_I2C_FIFO_RDATA (BL602_I2C_BASE + BL602_I2C_FIFO_RDATA_OFFSET)
#define BL602_I2C_CONFIG (BL602_I2C_BASE + BL602_I2C_CONFIG_OFFSET)
#define BL602_I2C_INT_STS (BL602_I2C_BASE + BL602_I2C_INT_STS_OFFSET)
#define BL602_I2C_SUB_ADDR (BL602_I2C_BASE + BL602_I2C_SUB_ADDR_OFFSET)
#define BL602_I2C_BUS_BUSY (BL602_I2C_BASE + BL602_I2C_BUS_BUSY_OFFSET)
#define BL602_I2C_PRD_START (BL602_I2C_BASE + BL602_I2C_PRD_START_OFFSET)
#define BL602_I2C_PRD_STOP (BL602_I2C_BASE + BL602_I2C_PRD_STOP_OFFSET)
#define BL602_I2C_PRD_DATA (BL602_I2C_BASE + BL602_I2C_PRD_DATA_OFFSET)
#define BL602_I2C_FIFO_CONFIG_0 \
(BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_0_OFFSET)
#define BL602_I2C_FIFO_CONFIG_1 \
(BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_1_OFFSET)
#define BL602_I2C_FIFO_WDATA \
(BL602_I2C_BASE + BL602_I2C_FIFO_WDATA_OFFSET)
#define BL602_I2C_FIFO_RDATA \
(BL602_I2C_BASE + BL602_I2C_FIFO_RDATA_OFFSET)
/* Register bit definitions *************************************************/
#define I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT (28)
#define I2C_CONFIG_CR_I2C_DEG_CNT_MASK (0x0f << I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT)
#define I2C_CONFIG_CR_I2C_DEG_CNT_MASK \
(0x0f << I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT)
#define I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT (16)
#define I2C_CONFIG_CR_I2C_PKT_LEN_MASK (0xff << I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT)
#define I2C_CONFIG_CR_I2C_PKT_LEN_MASK \
(0xff << I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT)
#define I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT (8)
#define I2C_CONFIG_CR_I2C_SLV_ADDR_MASK (0x7f << I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT)
#define I2C_CONFIG_CR_I2C_SLV_ADDR_MASK \
(0x7f << I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT)
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT (5)
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_MASK (0x03 << I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT)
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_MASK \
(0x03 << I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT)
#define I2C_CONFIG_CR_I2C_SUB_ADDR_EN (1 << 4)
#define I2C_CONFIG_CR_I2C_SCL_SYNC_EN (1 << 3)
#define I2C_CONFIG_CR_I2C_DEG_EN (1 << 2)
@ -102,38 +110,50 @@
#define I2C_INT_STS_END_INT (1 << 0)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT (24)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_MASK \
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT (16)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_MASK \
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT (8)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_MASK \
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT)
#define I2C_SUB_ADDR_CR_SUB_ADDR_B0_MASK (0xff)
#define I2C_BUS_BUSY_CR_BUS_BUSY_CLR (1 << 1)
#define I2C_BUS_BUSY_STS_BUS_BUSY (1 << 0)
#define I2C_PRD_START_CR_PRD_S_PH_3_SHIFT (24)
#define I2C_PRD_START_CR_PRD_S_PH_3_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_3_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_3_MASK \
(0xff << I2C_PRD_START_CR_PRD_S_PH_3_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_2_SHIFT (16)
#define I2C_PRD_START_CR_PRD_S_PH_2_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_2_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_2_MASK \
(0xff << I2C_PRD_START_CR_PRD_S_PH_2_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_1_SHIFT (8)
#define I2C_PRD_START_CR_PRD_S_PH_1_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_1_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_1_MASK \
(0xff << I2C_PRD_START_CR_PRD_S_PH_1_SHIFT)
#define I2C_PRD_START_CR_PRD_S_PH_0_MASK (0xff)
#define I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT (24)
#define I2C_PRD_STOP_CR_PRD_P_PH_3_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_3_MASK \
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT (16)
#define I2C_PRD_STOP_CR_PRD_P_PH_2_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_2_MASK \
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT (8)
#define I2C_PRD_STOP_CR_PRD_P_PH_1_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_1_MASK \
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT)
#define I2C_PRD_STOP_CR_PRD_P_PH_0_MASK (0xff)
#define I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT (24)
#define I2C_PRD_DATA_CR_PRD_D_PH_3_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_3_MASK \
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT (16)
#define I2C_PRD_DATA_CR_PRD_D_PH_2_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_2_MASK \
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT (8)
#define I2C_PRD_DATA_CR_PRD_D_PH_1_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_1_MASK \
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT)
#define I2C_PRD_DATA_CR_PRD_D_PH_0_MASK (0xff)
#define I2C_FIFO_CONFIG_0_RX_FIFO_UNDERFLOW (1 << 7)
@ -148,7 +168,22 @@
#define I2C_FIFO_CONFIG_1_RX_FIFO_TH (1 << 24)
#define I2C_FIFO_CONFIG_1_TX_FIFO_TH (1 << 16)
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT (8)
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_MASK (0x03 << I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT)
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_MASK \
(0x03 << I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT)
#define I2C_FIFO_CONFIG_1_TX_FIFO_CNT_MASK (0x03)
/****************************************************************************
* Public Types
****************************************************************************/
/* I2C interrupt type definition */
#define I2C_TRANS_END_INT 0 /* I2C transfer end interrupt */
#define I2C_TX_FIFO_READY_INT 1 /* I2C TX fifo ready interrupt */
#define I2C_RX_FIFO_READY_INT 2 /* I2C RX fifo ready interrupt */
#define I2C_NACK_RECV_INT 3 /* I2C nack received interrupt */
#define I2C_ARB_LOST_INT 4 /* I2C arbitration lost interrupt */
#define I2C_FIFO_ERR_INT 5 /* I2C TX/RX FIFO error interrupt */
#define I2C_INT_ALL 6 /* I2C interrupt all type */
#endif /* __ARCH_RISCV_SRC_BL602_HARDWARE_BL602_I2C_H */

77
boards/risc-v/bl602/bl602evb/configs/gpio/defconfig Normal file
View File

@ -0,0 +1,77 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLEBG is not set
# CONFIG_NSH_DISABLE_LOSMART is not set
# CONFIG_NSH_DISABLE_UNAME is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="bl602evb"
CONFIG_ARCH_BOARD_BL602EVB=y
CONFIG_ARCH_CHIP="bl602"
CONFIG_ARCH_CHIP_BL602=y
CONFIG_ARCH_INTERRUPTSTACK=8192
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BINFMT_DISABLE=y
CONFIG_BL602_HAVE_UART0=y
CONFIG_BL602_TIMER0=y
CONFIG_BOARD_LOOPSPERMSEC=10000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y
CONFIG_DEV_GPIO=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_MQUEUE=y
CONFIG_EXAMPLES_GPIO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
CONFIG_EXAMPLES_TIMER=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_MAX_TASKS=8
CONFIG_NFILE_DESCRIPTORS=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_CD=y
CONFIG_NSH_DISABLE_CP=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_MKDIR=y
CONFIG_NSH_DISABLE_RM=y
CONFIG_NSH_DISABLE_RMDIR=y
CONFIG_NSH_DISABLE_UMOUNT=y
CONFIG_NSH_FILEIOSIZE=64
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_PTHREAD_STACK_DEFAULT=8192
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0xc0800000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=20
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2020
CONFIG_STDIO_DISABLE_BUFFERING=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=12
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=8192
CONFIG_TESTING_GETPRIME=y
CONFIG_TIMER=y
CONFIG_TIMER_ARCH=y
CONFIG_UART0_BAUD=2000000
CONFIG_UART0_RXBUFSIZE=128
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART0_TXBUFSIZE=128
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="nsh_main"

78
boards/risc-v/bl602/bl602evb/configs/i2c/defconfig Normal file
View File

@ -0,0 +1,78 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLEBG is not set
# CONFIG_NSH_DISABLE_LOSMART is not set
# CONFIG_NSH_DISABLE_UNAME is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="bl602evb"
CONFIG_ARCH_BOARD_BL602EVB=y
CONFIG_ARCH_CHIP="bl602"
CONFIG_ARCH_CHIP_BL602=y
CONFIG_ARCH_INTERRUPTSTACK=8192
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BINFMT_DISABLE=y
CONFIG_BL602_HAVE_UART0=y
CONFIG_BL602_I2C0=y
CONFIG_BL602_TIMER0=y
CONFIG_BOARD_LOOPSPERMSEC=10000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_MQUEUE=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
CONFIG_EXAMPLES_TIMER=y
CONFIG_FS_PROCFS=y
CONFIG_I2C=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_MAX_TASKS=8
CONFIG_NFILE_DESCRIPTORS=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_CD=y
CONFIG_NSH_DISABLE_CP=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_MKDIR=y
CONFIG_NSH_DISABLE_RM=y
CONFIG_NSH_DISABLE_RMDIR=y
CONFIG_NSH_DISABLE_UMOUNT=y
CONFIG_NSH_FILEIOSIZE=64
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_PTHREAD_STACK_DEFAULT=8192
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0xc0800000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=20
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2020
CONFIG_STDIO_DISABLE_BUFFERING=y
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=12
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=8192
CONFIG_TESTING_GETPRIME=y
CONFIG_TIMER=y
CONFIG_TIMER_ARCH=y
CONFIG_UART0_BAUD=2000000
CONFIG_UART0_RXBUFSIZE=128
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART0_TXBUFSIZE=128
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="nsh_main"

45
boards/risc-v/bl602/bl602evb/include/board.h
View File

@ -33,20 +33,47 @@
* Pre-processor Definitions
****************************************************************************/
/* GPIO Configuration */
#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
#define BOARD_GPIO_IN1 (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_SWGPIO | GPIO_PIN0)
#define BOARD_GPIO_OUT1 (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_SWGPIO | GPIO_PIN1)
#define BOARD_GPIO_INT1 (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_SWGPIO | GPIO_PIN2)
/* UART Configuration */
#define BOARD_UART_0_RX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN7)
#define BOARD_UART_0_TX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN16)
#define BOARD_UART_1_RX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN3)
#define BOARD_UART_1_TX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN4)
#define BOARD_UART_0_RX_PIN (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_UART | GPIO_PIN7)
#define BOARD_UART_0_TX_PIN (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_UART | GPIO_PIN16)
#define BOARD_UART_1_RX_PIN (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_UART | GPIO_PIN3)
#define BOARD_UART_1_TX_PIN (GPIO_INPUT | GPIO_PULLUP | \
GPIO_FUNC_UART | GPIO_PIN4)
/* PWM Configuration */
#define BOARD_PWM_CH0_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN0)
#define BOARD_PWM_CH1_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN1)
#define BOARD_PWM_CH2_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN2)
#define BOARD_PWM_CH3_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN3)
#define BOARD_PWM_CH4_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN4)
#define BOARD_PWM_CH0_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_PWM | GPIO_PIN0)
#define BOARD_PWM_CH1_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_PWM | GPIO_PIN1)
#define BOARD_PWM_CH2_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_PWM | GPIO_PIN2)
#define BOARD_PWM_CH3_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_PWM | GPIO_PIN3)
#define BOARD_PWM_CH4_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
GPIO_FUNC_PWM | GPIO_PIN4)
/* I2C Configuration */
#define BOARD_I2C_SCL (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_I2C | GPIO_PIN4)
#define BOARD_I2C_SDA (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_I2C | GPIO_PIN3)
/****************************************************************************
* Public Types

6
boards/risc-v/bl602/bl602evb/src/Makefile
View File

@ -25,8 +25,12 @@ CSRCS = bl602_bringup.c bl602_boot.c
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += bl602_appinit.c
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += bl602_reset.c
CSRCS += bl602_reset.c
endif
endif
ifeq ($(CONFIG_DEV_GPIO),y)
CSRCS += bl602_gpio.c
endif
include $(TOPDIR)/boards/Board.mk

19
boards/risc-v/bl602/bl602evb/src/bl602_bringup.c
View File

@ -38,6 +38,8 @@
#include <bl602_oneshot_lowerhalf.h>
#include <bl602_pwm_lowerhalf.h>
#include <bl602_wdt_lowerhalf.h>
#include <bl602_gpio.h>
#include <bl602_i2c.h>
#if defined(CONFIG_BL602_SPIFLASH)
#include <bl602_spiflash.h>
@ -62,6 +64,9 @@ int bl602_bringup(void)
#if defined(CONFIG_BL602_SPIFLASH)
FAR struct mtd_dev_s *mtd_part = NULL;
const char *path = "/dev/mtdflash";
#endif
#ifdef CONFIG_I2C
struct i2c_master_s *i2c_bus;
#endif
int ret = OK;
@ -149,6 +154,20 @@ int bl602_bringup(void)
}
#endif
#ifdef CONFIG_DEV_GPIO
ret = bl602_gpio_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_I2C
i2c_bus = bl602_i2cbus_initialize(0);
i2c_register(i2c_bus, 0);
#endif
#ifdef CONFIG_BL602_SPIFLASH
mtd_part = bl602_spiflash_alloc_mtdpart();

607
boards/risc-v/bl602/bl602evb/src/bl602_gpio.c Normal file
View File

@ -0,0 +1,607 @@
/****************************************************************************
* board/risc-v/bl602/bl602evb/src/bl602_gpio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <stdbool.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/ioexpander/gpio.h>
#include <arch/board/board.h>
#include "riscv_arch.h"
#include "bl602_gpio.h"
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define BOARD_GPIO_PIN(mode, pupd, func, pin) (mode | pupd | func | pin)
/****************************************************************************
* Private Types
****************************************************************************/
struct bl602_gpio_dev_s
{
struct gpio_dev_s gpio;
uint8_t id;
};
struct bl602_gpint_dev_s
{
struct bl602_gpio_dev_s bl602gpio;
pin_interrupt_t callback;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value);
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value);
static int gpint_attach(FAR struct gpio_dev_s *dev,
pin_interrupt_t callback);
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
static int gpio_setpintype(FAR struct gpio_dev_s *dev,
enum gpio_pintype_e gp_pintype);
/****************************************************************************
* Private Data
****************************************************************************/
static const struct gpio_operations_s gpin_ops =
{
.go_read = gpin_read,
.go_write = NULL,
.go_attach = NULL,
.go_enable = NULL,
.go_setpintype = gpio_setpintype,
};
static const struct gpio_operations_s gpout_ops =
{
.go_read = gpout_read,
.go_write = gpout_write,
.go_attach = NULL,
.go_enable = NULL,
.go_setpintype = gpio_setpintype,
};
static const struct gpio_operations_s gpint_ops =
{
.go_read = gpint_read,
.go_write = NULL,
.go_attach = gpint_attach,
.go_enable = gpint_enable,
.go_setpintype = gpio_setpintype,
};
#if BOARD_NGPIOIN > 0
/* This array maps the GPIO pins used as INPUT */
static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
{
BOARD_GPIO_IN1,
};
static struct bl602_gpio_dev_s g_gpin[BOARD_NGPIOIN];
#endif
#if BOARD_NGPIOOUT
/* This array maps the GPIO pins used as OUTPUT */
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
{
BOARD_GPIO_OUT1,
};
static struct bl602_gpio_dev_s g_gpout[BOARD_NGPIOOUT];
#endif
#if BOARD_NGPIOINT > 0
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
{
BOARD_GPIO_INT1,
};
static struct bl602_gpint_dev_s g_gpint[BOARD_NGPIOINT];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bl602_gpio_intmask
*
* Description:
* intmask a gpio pin.
*
****************************************************************************/
static void bl602_gpio_intmask(int pin, int intmask)
{
uint32_t tmp_val;
if (pin < 28)
{
tmp_val = getreg32(BL602_GPIO_INT_MASK1);
if (intmask == 1)
{
tmp_val |= (1 << pin);
}
else
{
tmp_val &= ~(1 << pin);
}
putreg32(tmp_val, BL602_GPIO_INT_MASK1);
}
}
/****************************************************************************
* Name: bl602_gpio_set_intmod
*
* Description:
* set gpio intmod.
*
****************************************************************************/
static void bl602_gpio_set_intmod(uint8_t gpio_pin,
uint8_t int_ctlmod, uint8_t int_trgmod)
{
uint32_t tmp_val;
if (gpio_pin < GPIO_PIN10)
{
/* GPIO0 ~ GPIO9 */
tmp_val = gpio_pin;
modifyreg32(BL602_GPIO_INT_MODE_SET1,
0x7 << (3 * tmp_val),
((int_ctlmod << 2) | int_trgmod) << (3 * tmp_val));
}
else if (gpio_pin < GPIO_PIN20)
{
/* GPIO10 ~ GPIO19 */
tmp_val = gpio_pin - GPIO_PIN10;
modifyreg32(BL602_GPIO_INT_MODE_SET2,
0x7 << (3 * tmp_val),
((int_ctlmod << 2) | int_trgmod) << (3 * tmp_val));
}
else
{
/* GPIO20 ~ GPIO29 */
tmp_val = gpio_pin - GPIO_PIN20;
modifyreg32(BL602_GPIO_INT_MODE_SET3,
0x7 << (3 * tmp_val),
((int_ctlmod << 2) | int_trgmod) << (3 * tmp_val));
}
}
/****************************************************************************
* Name: bl602_gpio_get_intstatus
*
* Description:
* get gpio intstatus.
*
****************************************************************************/
static int bl602_gpio_get_intstatus(uint8_t gpio_pin)
{
uint32_t tmp_val = 0;
if (gpio_pin < 28)
{
/* GPIO0 ~ GPIO27 */
tmp_val = getreg32(BL602_GPIO_INT_STAT1);
}
return (tmp_val & (1 << gpio_pin)) ? 1 : 0;
}
/****************************************************************************
* Name: bl602_gpio_intclear
*
* Description:
* clear gpio int.
*
****************************************************************************/
static void bl602_gpio_intclear(uint8_t gpio_pin, uint8_t int_clear)
{
if (gpio_pin < 28)
{
/* GPIO0 ~ GPIO27 */
modifyreg32(BL602_GPIO_INT_CLR1,
int_clear ? 0 : (1 << gpio_pin),
int_clear ? (1 << gpio_pin) : 0);
}
}
/****************************************************************************
* Name: bl602_gpio_interrupt
*
* Description:
* gpio interrupt.
*
****************************************************************************/
static int bl602_gpio_interrupt(int irq, void *context, void *arg)
{
FAR struct bl602_gpint_dev_s *bl602xgpint =
(FAR struct bl602_gpint_dev_s *)arg;
uint32_t time_out = 0;
uint8_t gpio_pin;
DEBUGASSERT(bl602xgpint != NULL && bl602xgpint->callback != NULL);
gpioinfo("Interrupt! callback=%p\n", bl602xgpint->callback);
gpio_pin = (g_gpiointinputs[bl602xgpint->bl602gpio.id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
if (1 == bl602_gpio_get_intstatus(gpio_pin))
{
bl602_gpio_intclear(gpio_pin, 1);
/* timeout check */
time_out = 32;
do
{
time_out--;
}
while ((1 == bl602_gpio_get_intstatus(gpio_pin)) && time_out);
if (!time_out)
{
printf("WARNING: Clear GPIO interrupt status fail.\r\n");
}
/* if time_out==0, GPIO interrupt status not cleared */
bl602_gpio_intclear(gpio_pin, 0);
}
bl602xgpint->callback(&bl602xgpint->bl602gpio.gpio,
gpio_pin);
return OK;
}
/****************************************************************************
* Name: gpio_setpintype
*
* Description:
* set gpio pintype.
*
****************************************************************************/
static int gpio_setpintype(FAR struct gpio_dev_s *dev,
enum gpio_pintype_e gp_pintype)
{
FAR struct bl602_gpint_dev_s *bl602xgpint =
(FAR struct bl602_gpint_dev_s *)dev;
uint8_t gpio_pin;
uint8_t pintype = bl602xgpint->bl602gpio.gpio.gp_pintype;
DEBUGASSERT(bl602xgpint != NULL);
gpioinfo("setpintype...\n");
if (pintype <= GPIO_INPUT_PIN_PULLDOWN)
{
gpio_pin =
(g_gpioinputs[bl602xgpint->bl602gpio.id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
}
else if (pintype <= GPIO_OUTPUT_PIN_OPENDRAIN)
{
gpio_pin =
(g_gpiooutputs[bl602xgpint->bl602gpio.id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
}
else if (pintype < GPIO_NPINTYPES)
{
gpio_pin =
(g_gpiointinputs[bl602xgpint->bl602gpio.id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
}
else
{
printf("pintype error\r\n");
return -1;
}
switch (gp_pintype)
{
case GPIO_INPUT_PIN:
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_INPUT, GPIO_FLOAT, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_INPUT_PIN_PULLUP:
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_INPUT, GPIO_PULLUP, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_INPUT_PIN_PULLDOWN:
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_INPUT, GPIO_PULLDOWN, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_OUTPUT_PIN:
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_OUTPUT, GPIO_PULLUP, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_OUTPUT_PIN_OPENDRAIN:
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_OUTPUT, GPIO_FLOAT, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_INTERRUPT_RISING_PIN:
bl602_gpio_set_intmod(gpio_pin, 1, GLB_GPIO_INT_TRIG_POS_PULSE);
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_INPUT, GPIO_PULLUP, GPIO_FUNC_SWGPIO, gpio_pin));
break;
case GPIO_INTERRUPT_FALLING_PIN:
bl602_gpio_set_intmod(gpio_pin, 1, GLB_GPIO_INT_TRIG_NEG_PULSE);
bl602_configgpio(
BOARD_GPIO_PIN(GPIO_INPUT, GPIO_PULLUP, GPIO_FUNC_SWGPIO, gpio_pin));
break;
default:
break;
}
return 0;
}
/****************************************************************************
* Name: gpin_read
*
* Description:
* read gpio input.
*
****************************************************************************/
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value)
{
FAR struct bl602_gpio_dev_s *bl602xgpio =
(FAR struct bl602_gpio_dev_s *)dev;
DEBUGASSERT(bl602xgpio != NULL && value != NULL);
gpioinfo("Reading...\n");
*value = bl602_gpioread(g_gpioinputs[bl602xgpio->id]);
return OK;
}
/****************************************************************************
* Name: gpout_read
*
* Description:
* read gpio output.
*
****************************************************************************/
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
{
FAR struct bl602_gpio_dev_s *bl602xgpio =
(FAR struct bl602_gpio_dev_s *)dev;
DEBUGASSERT(bl602xgpio != NULL && value != NULL);
DEBUGASSERT(bl602xgpio->id < BOARD_NGPIOOUT);
gpioinfo("Reading...\n");
uint8_t gpio_pin = (g_gpiooutputs[bl602xgpio->id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
*value = (getreg32(BL602_GPIO_CFGCTL32) & (1 << gpio_pin) ? 1 : 0);
return OK;
}
/****************************************************************************
* Name: gpout_write
*
* Description:
* write gpio.
*
****************************************************************************/
static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
{
FAR struct bl602_gpio_dev_s *bl602xgpio =
(FAR struct bl602_gpio_dev_s *)dev;
DEBUGASSERT(bl602xgpio != NULL);
DEBUGASSERT(bl602xgpio->id < BOARD_NGPIOOUT);
gpioinfo("Writing %d\n", (int)value);
bl602_gpiowrite(g_gpiooutputs[bl602xgpio->id], value);
return OK;
}
/****************************************************************************
* Name: gpint_read
*
* Description:
* read gpio.
*
****************************************************************************/
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value)
{
FAR struct bl602_gpint_dev_s *bl602xgpint =
(FAR struct bl602_gpint_dev_s *)dev;
DEBUGASSERT(bl602xgpint != NULL && value != NULL);
DEBUGASSERT(bl602xgpint->bl602xgpio.id < BOARD_NGPIOINT);
gpioinfo("Reading int pin...\n");
*value = bl602_gpioread(g_gpiointinputs[bl602xgpint->bl602gpio.id]);
return OK;
}
/****************************************************************************
* Name: gpint_attach
*
* Description:
* gpio attach.
*
****************************************************************************/
static int gpint_attach(FAR struct gpio_dev_s *dev, pin_interrupt_t callback)
{
FAR struct bl602_gpint_dev_s *bl602xgpint =
(FAR struct bl602_gpint_dev_s *)dev;
uint8_t gpio_pin =
(g_gpiointinputs[bl602xgpint->bl602gpio.id] & GPIO_PIN_MASK) >>
GPIO_PIN_SHIFT;
gpioinfo("Attaching the callback\n");
/* Make sure the interrupt is disabled */
bl602xgpint->callback = callback;
bl602_gpio_intmask(gpio_pin, 1);
irq_attach(BL602_IRQ_GPIO_INT0, bl602_gpio_interrupt, dev);
bl602_gpio_intmask(gpio_pin, 0);
gpioinfo("Attach %p\n", callback);
return OK;
}
/****************************************************************************
* Name: gpint_enable
*
* Description:
* gpint enable.
*
****************************************************************************/
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
{
FAR struct bl602_gpint_dev_s *bl602xgpint =
(FAR struct bl602_gpint_dev_s *)dev;
if (enable)
{
if (bl602xgpint->callback != NULL)
{
gpioinfo("Enabling the interrupt\n");
up_enable_irq(BL602_IRQ_GPIO_INT0);
}
}
else
{
gpioinfo("Disable the interrupt\n");
up_disable_irq(BL602_IRQ_GPIO_INT0);
}
return OK;
}
/****************************************************************************
* Name: bl602_gpio_initialize
*
* Description:
* Initialize GPIO drivers for use with /apps/examples/gpio
*
****************************************************************************/
int bl602_gpio_initialize(void)
{
int i;
int pincount = 0;
#if BOARD_NGPIOIN > 0
for (i = 0; i < BOARD_NGPIOIN; i++)
{
/* Setup and register the GPIO pin */
g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
g_gpin[i].gpio.gp_ops = &gpin_ops;
g_gpin[i].id = i;
gpio_pin_register(&g_gpin[i].gpio, pincount);
/* Configure the pin that will be used as input */
bl602_configgpio(g_gpioinputs[i]);
pincount++;
}
#endif
#if BOARD_NGPIOOUT > 0
for (i = 0; i < BOARD_NGPIOOUT; i++)
{
/* Setup and register the GPIO pin */
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
g_gpout[i].gpio.gp_ops = &gpout_ops;
g_gpout[i].id = i;
gpio_pin_register(&g_gpout[i].gpio, pincount);
/* Configure the pin that will be used as output */
bl602_configgpio(g_gpiooutputs[i]);
pincount++;
}
#endif
#if BOARD_NGPIOINT > 0
for (i = 0; i < BOARD_NGPIOINT; i++)
{
/* Setup and register the GPIO pin */
g_gpint[i].bl602gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
g_gpint[i].bl602gpio.gpio.gp_ops = &gpint_ops;
g_gpint[i].bl602gpio.id = i;
gpio_pin_register(&g_gpint[i].bl602gpio.gpio, pincount);
/* Configure the pin that will be used as interrupt input */
bl602_gpio_set_intmod(
g_gpiointinputs[i], 1, GLB_GPIO_INT_TRIG_NEG_PULSE);
bl602_configgpio(g_gpiointinputs[i]);
pincount++;
}
#endif
return 0;
}
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */