STM32F7: Allow the config to override the clock edge setting
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@ -153,7 +153,15 @@
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/* Friendly CLKCR bit re-definitions ****************************************/
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/* Friendly CLKCR bit re-definitions ****************************************/
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#define STM32_CLKCR_RISINGEDGE (0)
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#define STM32_CLKCR_RISINGEDGE (0)
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#define STM32_CLKCR_FALLINGEDGE STM32_CLKCR_NEGEDGE
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#define STM32_CLKCR_FALLINGEDGE STM32_SDMMC_CLKCR_NEGEDGE
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/* Use the default of the rising edge but allow a configuration,
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* that does not have the errata, to override the edge the SDIO
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* command and data is changed on.
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*/
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#if !defined(STM32_SDMMC_CLKCR_EDGE)
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# define STM32_SDMMC_CLKCR_EDGE STM32_CLKCR_RISINGEDGE
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#endif
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/* Mode dependent settings. These depend on clock divisor settings that must
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/* Mode dependent settings. These depend on clock divisor settings that must
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* be defined in the board-specific board.h header file: STM32_SDMMC_INIT_CLKDIV,
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* be defined in the board-specific board.h header file: STM32_SDMMC_INIT_CLKDIV,
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@ -161,16 +169,16 @@
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*/
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*/
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#define STM32_CLCKCR_INIT (STM32_SDMMC_INIT_CLKDIV | \
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#define STM32_CLCKCR_INIT (STM32_SDMMC_INIT_CLKDIV | \
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STM32_CLKCR_RISINGEDGE | \
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STM32_SDMMC_CLKCR_EDGE | \
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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#define STM32_SDMMC_CLKCR_MMCXFR (STM32_SDMMC_MMCXFR_CLKDIV | \
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#define STM32_SDMMC_CLKCR_MMCXFR (STM32_SDMMC_MMCXFR_CLKDIV | \
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STM32_CLKCR_RISINGEDGE | \
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STM32_SDMMC_CLKCR_EDGE | \
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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#define STM32_SDMMC_CLCKR_SDXFR (STM32_SDMMC_SDXFR_CLKDIV | \
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#define STM32_SDMMC_CLCKR_SDXFR (STM32_SDMMC_SDXFR_CLKDIV | \
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STM32_CLKCR_RISINGEDGE | \
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STM32_SDMMC_CLKCR_EDGE | \
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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STM32_SDMMC_CLKCR_WIDBUS_D1)
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#define STM32_SDMMC_CLCKR_SDWIDEXFR (STM32_SDMMC_SDXFR_CLKDIV | \
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#define STM32_SDMMC_CLCKR_SDWIDEXFR (STM32_SDMMC_SDXFR_CLKDIV | \
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STM32_CLKCR_RISINGEDGE | \
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STM32_SDMMC_CLKCR_EDGE | \
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STM32_SDMMC_CLKCR_WIDBUS_D4)
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STM32_SDMMC_CLKCR_WIDBUS_D4)
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/* Timing */
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/* Timing */
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