A few early STM32 OTF FS fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4581 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
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@ -36,6 +36,7 @@
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@ -103,85 +103,85 @@
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/* Debug ***********************************************************************/
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/* Trace error codes */
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#define STM32_TRACEERR_ALLOCFAIL 0x0001
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#define STM32_TRACEERR_BADCLEARFEATURE 0x0002
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#define STM32_TRACEERR_BADDEVGETSTATUS 0x0003
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#define STM32_TRACEERR_BADEPNO 0x0004
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#define STM32_TRACEERR_BADEPGETSTATUS 0x0005
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#define STM32_TRACEERR_BADGETCONFIG 0x0006
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#define STM32_TRACEERR_BADGETSETDESC 0x0007
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#define STM32_TRACEERR_BADGETSTATUS 0x0008
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#define STM32_TRACEERR_BADSETADDRESS 0x0009
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#define STM32_TRACEERR_BADSETCONFIG 0x000a
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#define STM32_TRACEERR_BADSETFEATURE 0x000b
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#define STM32_TRACEERR_BADTESTMODE 0x000c
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#define STM32_TRACEERR_BINDFAILED 0x000d
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#define STM32_TRACEERR_DISPATCHSTALL 0x000e
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#define STM32_TRACEERR_DRIVER 0x000f
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#define STM32_TRACEERR_DRIVERREGISTERED 0x0010
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#define STM32_TRACEERR_EP0NOSETUP 0x0011
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#define STM32_TRACEERR_EP0SETUPSTALLED 0x0012
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#define STM32_TRACEERR_EPINNULLPACKET 0x0013
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#define STM32_TRACEERR_EPOUTNULLPACKET 0x0014
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#define STM32_TRACEERR_INVALIDCTRLREQ 0x0015
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#define STM32_TRACEERR_INVALIDPARMS 0x0016
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#define STM32_TRACEERR_IRQREGISTRATION 0x0017
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#define STM32_TRACEERR_NOEP 0x0018
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#define STM32_TRACEERR_NOTCONFIGURED 0x0019
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#define STM32_TRACEERR_EPOUTQEMPTY 0x001a
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#define STM32_TRACEERR_EPINQEMPTY 0x001b
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#define STM32_TRACEERR_ALLOCFAIL 0x01
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#define STM32_TRACEERR_BADCLEARFEATURE 0x02
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#define STM32_TRACEERR_BADDEVGETSTATUS 0x03
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#define STM32_TRACEERR_BADEPNO 0x04
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#define STM32_TRACEERR_BADEPGETSTATUS 0x05
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#define STM32_TRACEERR_BADGETCONFIG 0x06
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#define STM32_TRACEERR_BADGETSETDESC 0x07
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#define STM32_TRACEERR_BADGETSTATUS 0x08
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#define STM32_TRACEERR_BADSETADDRESS 0x09
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#define STM32_TRACEERR_BADSETCONFIG 0x0a
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#define STM32_TRACEERR_BADSETFEATURE 0x0b
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#define STM32_TRACEERR_BADTESTMODE 0x0c
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#define STM32_TRACEERR_BINDFAILED 0x0d
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#define STM32_TRACEERR_DISPATCHSTALL 0x0e
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#define STM32_TRACEERR_DRIVER 0x0f
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#define STM32_TRACEERR_DRIVERREGISTERED 0x10
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#define STM32_TRACEERR_EP0NOSETUP 0x11
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#define STM32_TRACEERR_EP0SETUPSTALLED 0x12
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#define STM32_TRACEERR_EPINNULLPACKET 0x13
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#define STM32_TRACEERR_EPOUTNULLPACKET 0x14
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#define STM32_TRACEERR_INVALIDCTRLREQ 0x15
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#define STM32_TRACEERR_INVALIDPARMS 0x16
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#define STM32_TRACEERR_IRQREGISTRATION 0x17
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#define STM32_TRACEERR_NOEP 0x18
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#define STM32_TRACEERR_NOTCONFIGURED 0x19
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#define STM32_TRACEERR_EPOUTQEMPTY 0x1a
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#define STM32_TRACEERR_EPINQEMPTY 0x1b
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/* Trace interrupt codes */
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#define STM32_TRACEINTID_USB 0x0001 /* USB Interrupt entry/exit */
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#define STM32_TRACEINTID_USB 1 /* USB Interrupt entry/exit */
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#define STM32_TRACEINTID_EPOUT 0x0101 /* First level interrupt decode */
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#define STM32_TRACEINTID_EPIN 0x0102
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#define STM32_TRACEINTID_MISMATCH 0x0103
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#define STM32_TRACEINTID_WAKEUP 0x0104
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#define STM32_TRACEINTID_SUSPEND 0x0105
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#define STM32_TRACEINTID_SOF 0x0106
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#define STM32_TRACEINTID_RXFIFO 0x0107
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#define STM32_TRACEINTID_DEVRESET 0x0108
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#define STM32_TRACEINTID_ENUMDNE 0x0109
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#define STM32_TRACEINTID_IISOIXFR 0x010a
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#define STM32_TRACEINTID_IISOOXFR 0x010b
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#define STM32_TRACEINTID_SRQ 0x010c
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#define STM32_TRACEINTID_OTG 0x010d
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#define STM32_TRACEINTID_EPOUT (10 + 0) /* First level interrupt decode */
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#define STM32_TRACEINTID_EPIN (10 + 1)
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#define STM32_TRACEINTID_MISMATCH (10 + 2)
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#define STM32_TRACEINTID_WAKEUP (10 + 3)
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#define STM32_TRACEINTID_SUSPEND (10 + 4)
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#define STM32_TRACEINTID_SOF (10 + 5)
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#define STM32_TRACEINTID_RXFIFO (10 + 6)
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#define STM32_TRACEINTID_DEVRESET (10 + 7)
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#define STM32_TRACEINTID_ENUMDNE (10 + 8)
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#define STM32_TRACEINTID_IISOIXFR (10 + 9)
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#define STM32_TRACEINTID_IISOOXFR (10 + 10)
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#define STM32_TRACEINTID_SRQ (10 + 11)
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#define STM32_TRACEINTID_OTG (10 + 12)
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#define STM32_TRACEINTID_EPOUT_XFRC 0x0200 /* EPOUT second level decode */
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#define STM32_TRACEINTID_EPOUT_EPDISD 0x0201
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#define STM32_TRACEINTID_EPOUT_SETUP 0x0202
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#define STM32_TRACEINTID_DISPATCH 0x0203
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#define STM32_TRACEINTID_EPOUT_XFRC (40 + 0) /* EPOUT second level decode */
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#define STM32_TRACEINTID_EPOUT_EPDISD (40 + 1)
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#define STM32_TRACEINTID_EPOUT_SETUP (40 + 2)
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#define STM32_TRACEINTID_DISPATCH (40 + 3)
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#define STM32_TRACEINTID_GETSTATUS 0x0210 /* EPOUT third level decode */
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#define STM32_TRACEINTID_EPGETSTATUS 0x0211
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#define STM32_TRACEINTID_DEVGETSTATUS 0x0212
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#define STM32_TRACEINTID_IFGETSTATUS 0x0213
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#define STM32_TRACEINTID_CLEARFEATURE 0x0214
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#define STM32_TRACEINTID_SETFEATURE 0x0215
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#define STM32_TRACEINTID_SETADDRESS 0x0216
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#define STM32_TRACEINTID_GETSETDESC 0x0217
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#define STM32_TRACEINTID_GETCONFIG 0x0218
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#define STM32_TRACEINTID_SETCONFIG 0x0219
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#define STM32_TRACEINTID_GETSETIF 0x021a
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#define STM32_TRACEINTID_SYNCHFRAME 0x021b
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#define STM32_TRACEINTID_GETSTATUS (50 + 0) /* EPOUT third level decode */
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#define STM32_TRACEINTID_EPGETSTATUS (50 + 1)
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#define STM32_TRACEINTID_DEVGETSTATUS (50 + 2)
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#define STM32_TRACEINTID_IFGETSTATUS (50 + 3)
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#define STM32_TRACEINTID_CLEARFEATURE (50 + 4)
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#define STM32_TRACEINTID_SETFEATURE (50 + 5)
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#define STM32_TRACEINTID_SETADDRESS (50 + 6)
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#define STM32_TRACEINTID_GETSETDESC (50 + 7)
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#define STM32_TRACEINTID_GETCONFIG (50 + 8)
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#define STM32_TRACEINTID_SETCONFIG (50 + 9)
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#define STM32_TRACEINTID_GETSETIF (50 + 10)
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#define STM32_TRACEINTID_SYNCHFRAME (50 + 11)
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#define STM32_TRACEINTID_EPIN_XFRC 0x0300 /* EPIN second level decode */
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#define STM32_TRACEINTID_EPIN_TOC 0x0301
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#define STM32_TRACEINTID_EPIN_ITTXFE 0x0302
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#define STM32_TRACEINTID_EPIN_EPDISD 0x0303
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#define STM32_TRACEINTID_EPIN_TXFE 0x0304
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#define STM32_TRACEINTID_EPIN_XFRC (70 + 0) /* EPIN second level decode */
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#define STM32_TRACEINTID_EPIN_TOC (70 + 1)
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#define STM32_TRACEINTID_EPIN_ITTXFE (70 + 2)
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#define STM32_TRACEINTID_EPIN_EPDISD (70 + 3)
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#define STM32_TRACEINTID_EPIN_TXFE (70 + 4)
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#define STM32_TRACEINTID_OUTNAK 0x0400 /* RXFLVL second level decode */
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#define STM32_TRACEINTID_OUTRECVD 0x0401
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#define STM32_TRACEINTID_OUTDONE 0x0402
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#define STM32_TRACEINTID_SETUPDONE 0x0403
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#define STM32_TRACEINTID_SETUPRECVD 0x0404
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#define STM32_TRACEINTID_OUTNAK (80 + 0) /* RXFLVL second level decode */
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#define STM32_TRACEINTID_OUTRECVD (80 + 1)
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#define STM32_TRACEINTID_OUTDONE (80 + 2)
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#define STM32_TRACEINTID_SETUPDONE (80 + 3)
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#define STM32_TRACEINTID_SETUPRECVD (80 + 4)
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#define STM32_TRACEINTID_EPINCOMPLETE 0x0500 /* Request handling */
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#define STM32_TRACEINTID_EPOUTCOMPLETE 0x0503
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#define STM32_TRACEINTID_EPOUTQEMPTY 0x0504
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#define STM32_TRACEINTID_EPINCOMPLETE (90 + 0) /* Request handling */
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#define STM32_TRACEINTID_EPOUTCOMPLETE (90 + 1)
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#define STM32_TRACEINTID_EPOUTQEMPTY (90 + 2)
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/* Endpoints ******************************************************************/
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@ -1648,6 +1648,7 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv)
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stm32_setaddress(priv, 0);
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priv->devstate = DEVSTATE_DEFAULT;
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priv->usbdev.speed = USB_SPEED_FULL;
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/* Re-configure EP0 */
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@ -2721,9 +2722,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t*)&priv->ctrlreq,
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USB_SIZEOF_CTRLREQ);
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/* The SETUP data has been processed */
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/* The SETUP data has been received */
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priv->setup = false;
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priv->setup = true;
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}
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break;
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@ -3732,6 +3733,8 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
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irqstate_t flags;
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int ret = OK;
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/* Some sanity checking */
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#ifdef CONFIG_DEBUG
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if (!req || !req->callback || !req->buf || !ep)
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{
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@ -3744,11 +3747,13 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
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usbtrace(TRACE_EPSUBMIT, privep->epphy);
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priv = privep->dev;
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if (!priv->driver || priv->usbdev.speed == USB_SPEED_UNKNOWN)
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#ifdef CONFIG_DEBUG
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if (!priv->driver)
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{
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usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
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return -ESHUTDOWN;
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}
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#endif
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/* Handle the request from the class driver */
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@ -4872,6 +4877,13 @@ void up_usbuninitialize(void)
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int usbdev_register(struct usbdevclass_driver_s *driver)
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{
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/* At present, there is only a single OTG FS device support. Hence it is
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* pre-allocated as g_otgfsdev. However, in most code, the private data
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* structure will be referenced using the 'priv' pointer (rather than the
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* global data) in order to simplify any future support for multiple devices.
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*/
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FAR struct stm32_usbdev_s *priv = &g_otgfsdev;
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int ret;
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usbtrace(TRACE_DEVREGISTER, 0);
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@ -4884,7 +4896,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
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return -EINVAL;
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}
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if (g_otgfsdev.driver)
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if (priv->driver)
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{
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usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DRIVER), 0);
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return -EBUSY;
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@ -4893,15 +4905,15 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
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/* First hook up the driver */
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g_otgfsdev.driver = driver;
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priv->driver = driver;
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/* Then bind the class driver */
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ret = CLASS_BIND(driver, &g_otgfsdev.usbdev);
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ret = CLASS_BIND(driver, &priv->usbdev);
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if (ret)
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{
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usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BINDFAILED), (uint16_t)-ret);
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g_otgfsdev.driver = NULL;
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priv->driver = NULL;
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}
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else
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{
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@ -4917,7 +4929,8 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
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* that logic to the class drivers but left this logic here.
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*/
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stm32_pullup(&g_otgfsdev.usbdev, true);
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stm32_pullup(&priv->usbdev, true);
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priv->usbdev.speed = USB_SPEED_FULL;
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}
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return ret;
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@ -4935,10 +4948,18 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
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int usbdev_unregister(struct usbdevclass_driver_s *driver)
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{
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/* At present, there is only a single OTG FS device support. Hence it is
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* pre-allocated as g_otgfsdev. However, in most code, the private data
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* structure will be referenced using the 'priv' pointer (rather than the
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* global data) in order to simplify any future support for multiple devices.
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*/
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FAR struct stm32_usbdev_s *priv = &g_otgfsdev;
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usbtrace(TRACE_DEVUNREGISTER, 0);
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#ifdef CONFIG_DEBUG
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if (driver != g_otgfsdev.driver)
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if (driver != priv->driver)
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{
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usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
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return -EINVAL;
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@ -4947,7 +4968,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
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/* Unbind the class driver */
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CLASS_UNBIND(driver, &g_otgfsdev.usbdev);
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CLASS_UNBIND(driver, &priv->usbdev);
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/* Disable USB controller interrupts */
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@ -4955,7 +4976,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
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/* Unhook the driver */
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g_otgfsdev.driver = NULL;
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priv->driver = NULL;
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return OK;
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}
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@ -872,7 +872,7 @@ CONFIG_PL2303_TXBUFSIZE=512
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# Default 64
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# CONFIG_CDCACM_EPBULKOUT
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# The logical 7-bit address of a hardware endpoint that supports
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# bulk OUT operation
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# bulk OUT operation. Default 4.
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# CONFIG_CDCACM_EPBULKOUT_FSSIZE
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# Max package size for the bulk OUT endpoint if full speed mode.
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# Default 64.
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@ -881,7 +881,7 @@ CONFIG_PL2303_TXBUFSIZE=512
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# Default 512.
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# CONFIG_CDCACM_EPBULKIN
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# The logical 7-bit address of a hardware endpoint that supports
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# bulk IN operation
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# bulk IN operation. Default 3.
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# CONFIG_CDCACM_EPBULKIN_FSSIZE
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# Max package size for the bulk IN endpoint if full speed mode.
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# Default 64.
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@ -906,13 +906,13 @@ CONFIG_PL2303_TXBUFSIZE=512
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CONFIG_CDCACM=n
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CONFIG_CDCACM_CONSOLE=n
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#CONFIG_CDCACM_EP0MAXPACKET
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#CONFIG_CDCACM_EPINTIN
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CONFIG_CDCACM_EPINTIN=1
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#CONFIG_CDCACM_EPINTIN_FSSIZE
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#CONFIG_CDCACM_EPINTIN_HSSIZE
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#CONFIG_CDCACM_EPBULKOUT
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CONFIG_CDCACM_EPBULKOUT=3
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#CONFIG_CDCACM_EPBULKOUT_FSSIZE
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#CONFIG_CDCACM_EPBULKOUT_HSSIZE
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#CONFIG_CDCACM_EPBULKIN
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CONFIG_CDCACM_EPBULKIN=2
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#CONFIG_CDCACM_EPBULKIN_FSSIZE
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#CONFIG_CDCACM_EPBULKIN_HSSIZE
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#CONFIG_CDCACM_NWRREQS
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