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fix typos in names of some LSE-related constants

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ziggurat29 2016-03-27 10:48:02 -05:00
parent 860a139ba0
commit cc53b25dbd
1 changed files with 5 additions and 5 deletions
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10
arch/arm/src/stm32l4/chip/stm32l4x6xx_rcc.h
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@ -714,11 +714,11 @@
#define RCC_BDCR_LSEBYP (1 << 2) /* Bit 2: External Low Speed oscillator Bypass */
#define RCC_BDCR_LSEDRV_SHIFT (3) /* Bits 3-4: LSE oscillator drive capability */
#define RCC_BDCR_LSEDRV_MASK (3 << DCC_BDCR_LSEDRV_SHIFT)
# define RCC_BDCR_LSEDRV_LOWER (0 << DCC_BDCR_LSEDRV_SHIFT) /* 00: Lower driving capability */
# define RCC_BDCR_LSEDRV_MIDLOW (1 << DCC_BDCR_LSEDRV_SHIFT) /* 01: Medium Low driving capability */
# define RCC_BDCR_LSEDRV_MIDHI (2 << DCC_BDCR_LSEDRV_SHIFT) /* 10: Medium High driving capability*/
# define RCC_BDCR_LSEDRV_HIGER (3 << DCC_BDCR_LSEDRV_SHIFT) /* 11: Higher driving capability */
#define RCC_BDCR_LSEDRV_MASK (3 << RCC_BDCR_LSEDRV_SHIFT)
# define RCC_BDCR_LSEDRV_LOWER (0 << RCC_BDCR_LSEDRV_SHIFT) /* 00: Lower driving capability */
# define RCC_BDCR_LSEDRV_MIDLOW (1 << RCC_BDCR_LSEDRV_SHIFT) /* 01: Medium Low driving capability */
# define RCC_BDCR_LSEDRV_MIDHI (2 << RCC_BDCR_LSEDRV_SHIFT) /* 10: Medium High driving capability*/
# define RCC_BDCR_LSEDRV_HIGER (3 << RCC_BDCR_LSEDRV_SHIFT) /* 11: Higher driving capability */
#define RCC_BDCR_LSECSSON (1 << 5) /* Bit 5: CSS on LSE enable */
#define RCC_BDCR_LSECSSD (1 << 6) /* Bit 6: CSS on LSE failure Detection */