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arch/arm/src/armv-7m/nvic.h: Add definitions needed by up_trigger_irq().

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This commit is contained in:
Gregory Nutt 2018-08-25 10:40:37 -06:00
parent 3eb34186b5
commit cc75e33816
1 changed files with 20 additions and 0 deletions
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20
arch/arm/src/armv7-m/nvic.h
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@ -46,6 +46,26 @@
* Pre-processor Definitions * Pre-processor Definitions
********************************************************************************************/ ********************************************************************************************/
/* Exception/interrupt vector numbers *******************************************************/
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset */
#define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define NVIC_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define NVIC_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
#define NVIC_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
#define NVIC_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
/* Vectors 7-10: Reserved */
#define NVIC_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define NVIC_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
#define NVIC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define NVIC_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
#define NVIC_IRQ_FIRST (16) /* Vector number of the first interrupt */
/* NVIC base address ************************************************************************/ /* NVIC base address ************************************************************************/
#define ARMV7M_NVIC_BASE 0xe000e000 #define ARMV7M_NVIC_BASE 0xe000e000