Optimized ARMv7-M memcpy() function from Mike Smith
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5239 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
e16d4463fa
commit
cc9af097d6
@ -3485,4 +3485,6 @@
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by Petteri Aimonen).
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* drivers/usbdev/pl2303.c, drivers/usbdev/usbmsc.h, and
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include/nuttx/usb/cdcacm.h: USB_CONFIG_ATTR_SELFPOWER vs.
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USB_CONFIG_ATT_SELFPOWER (contributed by Petteri Aimonen).
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USB_CONFIG_ATT_SELFPOWER (contributed by Petteri Aimonen).
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* arch/arm/src/armv7-m/up_memcpy.S: An optimized memcpy() function for
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the ARMv7-M family contributed by Mike Smith.
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0
arch/arm/src/armv7-m/up_fullcontextrestore.S
Executable file → Normal file
0
arch/arm/src/armv7-m/up_fullcontextrestore.S
Executable file → Normal file
416
arch/arm/src/armv7-m/up_memcpy.S
Normal file
416
arch/arm/src/armv7-m/up_memcpy.S
Normal file
@ -0,0 +1,416 @@
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/************************************************************************************
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* nuttx/arch/arm/src/armv7-m/up_memcpy.S
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*
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* armv7m-optimised memcpy, contributed by Mike Smith. Apparently in the public
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* domain and is re-released here under the modified BSD license:
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*
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* Obtained via a posting on the Stellaris forum:
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* http://e2e.ti.com/support/microcontrollers/\
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* stellaris_arm_cortex-m3_microcontroller/f/473/t/44360.aspx
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*
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* Posted by rocksoft on Jul 24, 2008 10:19 AM
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*
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* Hi,
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*
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* I recently finished a "memcpy" replacement and thought it might be useful for
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* others...
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*
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* I've put some instructions and the code here:
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*
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* http://www.rock-software.net/downloads/memcpy/
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*
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* Hope it works for you as well as it did for me.
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*
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* Liam.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Global Symbols
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************************************************************************************/
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.global memcpy
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.syntax unified
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.thumb
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.cpu cortex-m3
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.file "up_memcpy.S"
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/************************************************************************************
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* .text
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************************************************************************************/
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.text
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/************************************************************************************
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* Private Constant Data
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************************************************************************************/
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/* We have 16 possible alignment combinations of src and dst, this jump table
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* directs the copy operation
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*
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* Bits: Src=00, Dst=00 - Long to Long copy
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* Bits: Src=00, Dst=01 - Long to Byte before half word
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* Bits: Src=00, Dst=10 - Long to Half word
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* Bits: Src=00, Dst=11 - Long to Byte before long word
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* Bits: Src=01, Dst=00 - Byte before half word to long
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* Bits: Src=01, Dst=01 - Byte before half word to byte before half word -
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* Same alignment
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* Bits: Src=01, Dst=10 - Byte before half word to half word
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* Bits: Src=01, Dst=11 - Byte before half word to byte before long word
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* Bits: Src=10, Dst=00 - Half word to long word
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* Bits: Src=10, Dst=01 - Half word to byte before half word
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* Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
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* Bits: Src=10, Dst=11 - Half word to byte before long word
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* Bits: Src=11, Dst=00 - Byte before long word to long word
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* Bits: Src=11, Dst=01 - Byte before long word to byte before half word
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* Bits: Src=11, Dst=11 - Byte before long word to half word
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* Bits: Src=11, Dst=11 - Byte before long word to Byte before long word -
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* Same alignment
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*/
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MEM_DataCopyTable:
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.byte (MEM_DataCopy0 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy1 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy2 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy3 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy4 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy5 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy6 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy7 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy8 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy9 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy10 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy11 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy12 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy13 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy14 - MEM_DataCopyJump) >> 1
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.byte (MEM_DataCopy15 - MEM_DataCopyJump) >> 1
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.align 2
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MEM_LongCopyTable:
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.byte (MEM_LongCopyEnd - MEM_LongCopyJump) >> 1 /* 0 bytes left */
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.byte 0 /* 4 bytes left */
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.byte (1 * 10) >> 1 /* 8 bytes left */
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.byte (2 * 10) >> 1 /* 12 bytes left */
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.byte (3 * 10) >> 1 /* 16 bytes left */
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.byte (4 * 10) >> 1 /* 20 bytes left */
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.byte (5 * 10) >> 1 /* 24 bytes left */
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.byte (6 * 10) >> 1 /* 28 bytes left */
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.byte (7 * 10) >> 1 /* 32 bytes left */
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.byte (8 * 10) >> 1 /* 36 bytes left */
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.align 2
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: memcpy
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*
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* Description:
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* Optimised "general" copy routine
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*
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* Input Parameters:
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* r0 = destination, r1 = source, r2 = length
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*
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************************************************************************************/
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.thumb_func
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memcpy:
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push {r14}
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/* This allows the inner workings to "assume" a minimum amount of bytes */
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/* Quickly check for very short copies */
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cmp r2, #4
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blt MEM_DataCopyBytes
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and r14, r0, #3 /* Get destination alignment bits */
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bfi r14, r1, #2, #2 /* Get source alignment bits */
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ldr r3, =MEM_DataCopyTable /* Jump table base */
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tbb [r3, r14] /* Perform jump on src/dst alignment bits */
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MEM_DataCopyJump:
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.align 4
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/* Bits: Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
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* 3 bytes to read for long word aligning
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*/
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MEM_DataCopy5:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
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* 2 bytes to read for long word aligning
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*/
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MEM_DataCopy10:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - Same alignment
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* 1 bytes to read for long word aligning
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*/
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MEM_DataCopy15:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=00, Dst=00 - Long to Long copy */
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MEM_DataCopy0:
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/* Save regs that may be used by memcpy */
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push {r4-r12}
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/* Check for short word-aligned copy */
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cmp r2, #0x28
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blt MEM_DataCopy0_2
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/* Bulk copy loop */
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MEM_DataCopy0_1:
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ldmia r1!, {r3-r12}
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stmia r0!, {r3-r12}
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sub r2, r2, #0x28
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cmp r2, #0x28
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bge MEM_DataCopy0_1
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/* Copy remaining long words */
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MEM_DataCopy0_2:
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/* Copy remaining long words */
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ldr r14, =MEM_LongCopyTable
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lsr r11, r2, #0x02
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tbb [r14, r11]
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/* longword copy branch table anchor */
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MEM_LongCopyJump:
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ldr.w r3, [r1], #0x04 /* 4 bytes remain */
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str.w r3, [r0], #0x04
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r4} /* 8 bytes remain */
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stmia.w r0!, {r3-r4}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r5} /* 12 bytes remain */
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stmia.w r0!, {r3-r5}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r6} /* 16 bytes remain */
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stmia.w r0!, {r3-r6}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r7} /* 20 bytes remain */
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stmia.w r0!, {r3-r7}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r8} /* 24 bytes remain */
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stmia.w r0!, {r3-r8}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r9} /* 28 bytes remain */
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stmia.w r0!, {r3-r9}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r10} /* 32 bytes remain */
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stmia.w r0!, {r3-r10}
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b MEM_LongCopyEnd
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ldmia.w r1!, {r3-r11} /* 36 bytes remain */
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stmia.w r0!, {r3-r11}
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MEM_LongCopyEnd:
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pop {r4-r12}
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and r2, r2, #0x03 /* All the longs have been copied */
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/* Deal with up to 3 remaining bytes */
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MEM_DataCopyBytes:
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/* Deal with up to 3 remaining bytes */
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cmp r2, #0x00
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it eq
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popeq {pc}
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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subs r2, r2, #0x01
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it eq
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popeq {pc}
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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subs r2, r2, #0x01
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it eq
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popeq {pc}
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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pop {pc}
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.align 4
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/* Bits: Src=01, Dst=11 - Byte before half word to byte before long word
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* 3 bytes to read for long word aligning the source
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*/
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MEM_DataCopy7:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=10, Dst=00 - Half word to long word
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* 2 bytes to read for long word aligning the source
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*/
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MEM_DataCopy8:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=11, Dst=01 - Byte before long word to byte before half word
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* 1 byte to read for long word aligning the source
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*/
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MEM_DataCopy13:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=00, Dst=10 - Long to Half word */
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MEM_DataCopy2:
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cmp r2, #0x28
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blt MEM_DataCopy2_1
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/* Save regs */
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push {r4-r12}
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/* Bulk copy loop */
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MEM_DataCopy2_2:
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ldmia r1!, {r3-r12}
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strh r3, [r0], #0x02
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lsr r3, r3, #0x10
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bfi r3, r4, #0x10, #0x10
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lsr r4, r4, #0x10
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bfi r4, r5, #0x10, #0x10
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lsr r5, r5, #0x10
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bfi r5, r6, #0x10, #0x10
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lsr r6, r6, #0x10
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bfi r6, r7, #0x10, #0x10
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lsr r7, r7, #0x10
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bfi r7, r8, #0x10, #0x10
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lsr r8, r8, #0x10
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bfi r8, r9, #0x10, #0x10
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lsr r9, r9, #0x10
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bfi r9, r10, #0x10, #0x10
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lsr r10, r10, #0x10
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bfi r10, r11, #0x10, #0x10
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lsr r11, r11, #0x10
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bfi r11, r12, #0x10, #0x10
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stmia r0!, {r3-r11}
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lsr r12, r12, #0x10
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strh r12, [r0], #0x02
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sub r2, r2, #0x28
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cmp r2, #0x28
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bge MEM_DataCopy2_2
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pop {r4-r12}
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MEM_DataCopy2_1: /* Read longs and write 2 x half words */
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cmp r2, #4
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blt MEM_DataCopyBytes
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ldr r3, [r1], #0x04
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strh r3, [r0], #0x02
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lsr r3, r3, #0x10
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strh r3, [r0], #0x02
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sub r2, r2, #0x04
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b MEM_DataCopy2
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/* Bits: Src=01, Dst=00 - Byte before half word to long
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* Bits: Src=01, Dst=10 - Byte before half word to half word
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* 3 bytes to read for long word aligning the source
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*/
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MEM_DataCopy4:
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MEM_DataCopy6:
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/* Read B and write B */
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=10, Dst=01 - Half word to byte before half word
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* Bits: Src=10, Dst=11 - Half word to byte before long word
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* 2 bytes to read for long word aligning the source
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*/
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MEM_DataCopy9:
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MEM_DataCopy11:
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=11, Dst=00 -chm Byte before long word to long word
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* Bits: Src=11, Dst=11 - Byte before long word to half word
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* 1 byte to read for long word aligning the source
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*/
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MEM_DataCopy12:
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MEM_DataCopy14:
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/* Read B and write B */
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ldrb r3, [r1], #0x01
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strb r3, [r0], #0x01
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sub r2, r2, #0x01
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/* Bits: Src=00, Dst=01 - Long to Byte before half word
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* Bits: Src=00, Dst=11 - Long to Byte before long word
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*/
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MEM_DataCopy1: /* Read longs, write B->H->B */
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MEM_DataCopy3:
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cmp r2, #4
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blt MEM_DataCopyBytes
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ldr r3, [r1], #0x04
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strb r3, [r0], #0x01
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lsr r3, r3, #0x08
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strh r3, [r0], #0x02
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lsr r3, r3, #0x10
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strb r3, [r0], #0x01
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sub r2, r2, #0x04
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b MEM_DataCopy3
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.size memcpy, .-memcpy
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.end
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0
arch/arm/src/armv7-m/up_saveusercontext.S
Executable file → Normal file
0
arch/arm/src/armv7-m/up_saveusercontext.S
Executable file → Normal file
0
arch/arm/src/armv7-m/up_switchcontext.S
Executable file → Normal file
0
arch/arm/src/armv7-m/up_switchcontext.S
Executable file → Normal file
@ -41,12 +41,16 @@ HEAD_ASRC = kinetis_vectors.S
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_initialize.c \
|
||||
up_memfault.c up_initialstate.c up_interruptcontext.c \
|
||||
up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_releasepending.c up_sigdeliver.c up_unblocktask.c up_usestack.c \
|
||||
up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_initialize.c \
|
||||
up_memfault.c up_initialstate.c up_interruptcontext.c \
|
||||
up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_releasepending.c up_sigdeliver.c up_unblocktask.c up_usestack.c \
|
||||
up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
ifneq ($(CONFIG_KINETIS_ENET),y)
|
||||
@ -58,8 +62,8 @@ endif
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = kinetis_clockconfig.c kinetis_clrpend.c kinetis_idle.c \
|
||||
kinetis_irq.c kinetis_lowputc.c kinetis_pin.c kinetis_pingpio.c \
|
||||
kinetis_serial.c kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
|
||||
kinetis_irq.c kinetis_lowputc.c kinetis_pin.c kinetis_pingpio.c \
|
||||
kinetis_serial.c kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
|
||||
|
||||
# Configuration-dependent Kinetis files
|
||||
|
||||
|
||||
@ -37,17 +37,21 @@ HEAD_ASRC = lm3s_vectors.S
|
||||
|
||||
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
|
||||
up_idle.c up_initialize.c up_initialstate.c up_interruptcontext.c \
|
||||
up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
|
||||
up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
|
||||
up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
|
||||
up_idle.c up_initialize.c up_initialstate.c up_interruptcontext.c \
|
||||
up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
|
||||
up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
|
||||
up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = lm3s_start.c lm3s_syscontrol.c lm3s_irq.c \
|
||||
lm3s_gpio.c lm3s_gpioirq.c lm3s_timerisr.c lm3s_lowputc.c \
|
||||
lm3s_serial.c lm3s_ssi.c lm3s_dumpgpio.c
|
||||
lm3s_gpio.c lm3s_gpioirq.c lm3s_timerisr.c lm3s_lowputc.c \
|
||||
lm3s_serial.c lm3s_ssi.c lm3s_dumpgpio.c
|
||||
|
||||
ifdef CONFIG_NET
|
||||
CHIP_CSRCS += lm3s_ethernet.c
|
||||
|
||||
@ -41,12 +41,16 @@ HEAD_ASRC = lpc17_vectors.S
|
||||
|
||||
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
|
||||
up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c \
|
||||
up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
|
||||
up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
|
||||
up_hardfault.c up_svcall.c up_checkstack.c
|
||||
up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c \
|
||||
up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
|
||||
up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
|
||||
up_hardfault.c up_svcall.c up_checkstack.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
ifneq ($(CONFIG_LPC17_ETHERNET),y)
|
||||
@ -58,8 +62,8 @@ endif
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = lpc17_allocateheap.c lpc17_clockconfig.c lpc17_clrpend.c \
|
||||
lpc17_gpio.c lpc17_i2c.c lpc17_idle.c lpc17_irq.c lpc17_lowputc.c \
|
||||
lpc17_serial.c lpc17_spi.c lpc17_ssp.c lpc17_start.c lpc17_timerisr.c
|
||||
lpc17_gpio.c lpc17_i2c.c lpc17_idle.c lpc17_irq.c lpc17_lowputc.c \
|
||||
lpc17_serial.c lpc17_spi.c lpc17_ssp.c lpc17_start.c lpc17_timerisr.c
|
||||
|
||||
# Configuration-dependent LPC17xx files
|
||||
|
||||
|
||||
@ -49,6 +49,10 @@ CMN_ASRCS += up_exception.S
|
||||
CMN_CSRCS += up_vectors.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_STACK),y)
|
||||
CMN_CSRCS += up_checkstack.c
|
||||
endif
|
||||
|
||||
@ -41,15 +41,19 @@ HEAD_ASRC = sam3u_vectors.S
|
||||
|
||||
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
|
||||
up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c \
|
||||
up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c \
|
||||
up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
|
||||
up_hardfault.c up_svcall.c
|
||||
up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c \
|
||||
up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c \
|
||||
up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
|
||||
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
|
||||
up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
|
||||
up_hardfault.c up_svcall.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_NUTTX_KERNEL),y)
|
||||
CHIP_CSRCS += up_mpu.c
|
||||
endif
|
||||
@ -58,8 +62,8 @@ endif
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = sam3u_allocateheap.c sam3u_clockconfig.c sam3u_gpioirq.c \
|
||||
sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c \
|
||||
sam3u_start.c sam3u_timerisr.c
|
||||
sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c \
|
||||
sam3u_start.c sam3u_timerisr.c
|
||||
|
||||
# Configuration-dependent SAM3U files
|
||||
|
||||
|
||||
@ -41,18 +41,22 @@ endif
|
||||
|
||||
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c \
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
|
||||
up_initialize.c up_initialstate.c up_interruptcontext.c \
|
||||
up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
|
||||
up_schedulesigaction.c up_sigdeliver.c up_systemreset.c \
|
||||
up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
|
||||
up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
|
||||
up_initialize.c up_initialstate.c up_interruptcontext.c \
|
||||
up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
|
||||
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
|
||||
up_schedulesigaction.c up_sigdeliver.c up_systemreset.c \
|
||||
up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
|
||||
CMN_ASRCS += up_exception.S
|
||||
CMN_CSRCS += up_vectors.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
||||
CMN_ASRCS += up_memcpy.S
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_STACK),y)
|
||||
CMN_CSRCS += up_checkstack.c
|
||||
endif
|
||||
@ -63,9 +67,9 @@ endif
|
||||
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c \
|
||||
stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c \
|
||||
stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \
|
||||
stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c
|
||||
stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c \
|
||||
stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \
|
||||
stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c
|
||||
|
||||
ifeq ($(CONFIG_USBDEV),y)
|
||||
ifeq ($(CONFIG_STM32_USB),y)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user