TMS570: Add definitions to support GIO second level interrupts
This commit is contained in:
parent
f539d331c5
commit
ccc6913383
@ -76,11 +76,11 @@
|
||||
# error "Unrecognized Hercules chip"
|
||||
#endif
|
||||
|
||||
/* Total number of IRQ numbers. Excluds the phantom vector. Zero corresponds to
|
||||
* channel 0, vector 1.
|
||||
/* Total number of IRQ numbers. Includes all channels plus GIO second-level interrupts
|
||||
* (if enabled). Excluds the phantom vector. Zero corresponds to channel 0, vector 1.
|
||||
*/
|
||||
|
||||
#define NR_IRQS (TMS570_IRQ_NCHANNELS)
|
||||
#define NR_IRQS (TMS570_IRQ_NCHANNELS + TMS570_NGIO_IRQS)
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Types
|
||||
|
@ -97,6 +97,49 @@
|
||||
#define TMS570_REQ_PBIST 85 /* PBIST Done Interrupt */
|
||||
#define TMS570_REQ_HWAGL 88 /* HWA_INT_REQ_L */
|
||||
|
||||
#ifdef CONFIG_TMS570_GIO_IRQ
|
||||
# define TMS570_IRQ_GIOA0 (TMS570_IRQ_NCHANNELS+1)
|
||||
# define TMS570_IRQ_GIOA1 (TMS570_IRQ_NCHANNELS+2)
|
||||
# define TMS570_IRQ_GIOA2 (TMS570_IRQ_NCHANNELS+3)
|
||||
# define TMS570_IRQ_GIOA3 (TMS570_IRQ_NCHANNELS+4)
|
||||
# define TMS570_IRQ_GIOA4 (TMS570_IRQ_NCHANNELS+5)
|
||||
# define TMS570_IRQ_GIOA5 (TMS570_IRQ_NCHANNELS+6)
|
||||
# define TMS570_IRQ_GIOA6 (TMS570_IRQ_NCHANNELS+7)
|
||||
# define TMS570_IRQ_GIOA7 (TMS570_IRQ_NCHANNELS+8)
|
||||
|
||||
# define TMS570_IRQ_GIOB0 (TMS570_IRQ_NCHANNELS+9)
|
||||
# define TMS570_IRQ_GIOB1 (TMS570_IRQ_NCHANNELS+10)
|
||||
# define TMS570_IRQ_GIOB2 (TMS570_IRQ_NCHANNELS+11)
|
||||
# define TMS570_IRQ_GIOB3 (TMS570_IRQ_NCHANNELS+12)
|
||||
# define TMS570_IRQ_GIOB4 (TMS570_IRQ_NCHANNELS+13)
|
||||
# define TMS570_IRQ_GIOB5 (TMS570_IRQ_NCHANNELS+14)
|
||||
# define TMS570_IRQ_GIOB6 (TMS570_IRQ_NCHANNELS+15)
|
||||
# define TMS570_IRQ_GIOB7 (TMS570_IRQ_NCHANNELS+16)
|
||||
|
||||
# define TMS570_IRQ_GIOC0 (TMS570_IRQ_NCHANNELS+17)
|
||||
# define TMS570_IRQ_GIOC1 (TMS570_IRQ_NCHANNELS+18)
|
||||
# define TMS570_IRQ_GIOC2 (TMS570_IRQ_NCHANNELS+19)
|
||||
# define TMS570_IRQ_GIOC3 (TMS570_IRQ_NCHANNELS+20)
|
||||
# define TMS570_IRQ_GIOC4 (TMS570_IRQ_NCHANNELS+21)
|
||||
# define TMS570_IRQ_GIOC5 (TMS570_IRQ_NCHANNELS+22)
|
||||
# define TMS570_IRQ_GIOC6 (TMS570_IRQ_NCHANNELS+23)
|
||||
# define TMS570_IRQ_GIOC7 (TMS570_IRQ_NCHANNELS+24)
|
||||
|
||||
# define TMS570_IRQ_GIOD0 (TMS570_IRQ_NCHANNELS+25)
|
||||
# define TMS570_IRQ_GIOD1 (TMS570_IRQ_NCHANNELS+26)
|
||||
# define TMS570_IRQ_GIOD2 (TMS570_IRQ_NCHANNELS+27)
|
||||
# define TMS570_IRQ_GIOD3 (TMS570_IRQ_NCHANNELS+28)
|
||||
# define TMS570_IRQ_GIOD4 (TMS570_IRQ_NCHANNELS+29)
|
||||
# define TMS570_IRQ_GIOD5 (TMS570_IRQ_NCHANNELS+30)
|
||||
# define TMS570_IRQ_GIOD6 (TMS570_IRQ_NCHANNELS+31)
|
||||
# define TMS570_IRQ_GIOD7 (TMS570_IRQ_NCHANNELS+32)
|
||||
|
||||
# define TMS570_NGIO_IRQS 32
|
||||
#else
|
||||
# define TMS570_NGIO_IRQS 0
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************************/
|
||||
|
@ -100,6 +100,11 @@ config TMS570_SCI2
|
||||
|
||||
endmenu # TMS570 Peripheral Support
|
||||
|
||||
config TMS570_GIO_IRQ
|
||||
bool "GIO pin interrupts"
|
||||
---help---
|
||||
Build in support for interrupting GIO pins
|
||||
|
||||
config TMS570_SELFTEST
|
||||
bool "Power-on Selftest"
|
||||
default n
|
||||
|
Loading…
Reference in New Issue
Block a user