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Fix a PIC32 software interrupt bug (pipeline hazard)

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4224 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-25 15:56:08 +00:00
parent ed08795a17
commit ccfc3b3d81
5 changed files with 33 additions and 7 deletions
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2
arch/mips/include/mips32/irq.h
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@ -2,7 +2,7 @@
* arch/mips/include/mips32/irq.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

2
arch/mips/src/common/up_initialize.c
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@ -2,7 +2,7 @@
* arch/mips/src/common/up_initialize.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

10
arch/mips/src/common/up_internal.h
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@ -2,7 +2,7 @@
* arch/mips/common/up_internal.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -169,6 +169,14 @@ extern void up_copystate(uint32_t *dest, uint32_t *src);
extern void up_puts(const char *str);
extern void up_lowputs(const char *str);
/* Defined in drivers/lowconsole.c */
#ifdef CONFIG_DEV_LOWCONSOLE
extern void lowconsole_init(void);
#else
# define lowconsole_init()
#endif
/* Debug */
#ifdef CONFIG_ARCH_STACKDUMP

2
arch/mips/src/mips32/up_swint0.c
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@ -2,7 +2,7 @@
* arch/mips/src/mips32/up_swint0.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

24
arch/mips/src/mips32/up_syscall0.S
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@ -2,7 +2,7 @@
* arch/mips/src/mips32/up_syscall0.S
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -73,6 +73,9 @@
* up_syscall2 - System call SYS_ argument and two additional parameters.
* up_syscall3 - System call SYS_ argument and three additional parameters.
*
* Assumption:
* All interrupts are disabled except for the software interrupts.
*
****************************************************************************/
.text
@ -85,10 +88,25 @@ sys_call3: /* r4 holds the syscall number, arguments in r5, r6, and r7 */
.set push
.set noat
/* Set Bit 8 to request the software interrupt */
mfc0 t3, MIPS32_CP0_CAUSE /* t3 = CP0 cause register */
ori t3, (1 << 8) /* Bit 8: Request software interrupt 0 */
.set noreorder
mtc0 t3, MIPS32_CP0_CAUSE /* Trigger the software interrupt */
nop /* Delay slot */
j ra /* Return with result in v0 */
/* The actual interrupt will not a occur for a few more cycles. Let's
* put a few nop's here in hope that the SW interrupt occurs during
* the sequence of nops.
*/
nop
nop
nop
nop
/* Then return with the result of the software interrupt in v0 */
j ra
.end sys_call0