Fix a PIC32 software interrupt bug (pipeline hazard)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4224 42af7a65-404d-4744-a932-0658087f49c3
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@ -2,7 +2,7 @@
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* arch/mips/include/mips32/irq.h
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* arch/mips/include/mips32/irq.h
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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@ -2,7 +2,7 @@
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* arch/mips/src/common/up_initialize.c
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* arch/mips/src/common/up_initialize.c
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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@ -2,7 +2,7 @@
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* arch/mips/common/up_internal.h
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* arch/mips/common/up_internal.h
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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@ -169,6 +169,14 @@ extern void up_copystate(uint32_t *dest, uint32_t *src);
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extern void up_puts(const char *str);
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extern void up_puts(const char *str);
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extern void up_lowputs(const char *str);
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extern void up_lowputs(const char *str);
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/* Defined in drivers/lowconsole.c */
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#ifdef CONFIG_DEV_LOWCONSOLE
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extern void lowconsole_init(void);
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#else
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# define lowconsole_init()
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#endif
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/* Debug */
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/* Debug */
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#ifdef CONFIG_ARCH_STACKDUMP
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#ifdef CONFIG_ARCH_STACKDUMP
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@ -2,7 +2,7 @@
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* arch/mips/src/mips32/up_swint0.c
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* arch/mips/src/mips32/up_swint0.c
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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@ -2,7 +2,7 @@
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* arch/mips/src/mips32/up_syscall0.S
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* arch/mips/src/mips32/up_syscall0.S
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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@ -73,6 +73,9 @@
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* up_syscall2 - System call SYS_ argument and two additional parameters.
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* up_syscall2 - System call SYS_ argument and two additional parameters.
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* up_syscall3 - System call SYS_ argument and three additional parameters.
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* up_syscall3 - System call SYS_ argument and three additional parameters.
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*
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*
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* Assumption:
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* All interrupts are disabled except for the software interrupts.
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*
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****************************************************************************/
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****************************************************************************/
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.text
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.text
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@ -85,10 +88,25 @@ sys_call3: /* r4 holds the syscall number, arguments in r5, r6, and r7 */
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.set push
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.set push
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.set noat
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.set noat
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/* Set Bit 8 to request the software interrupt */
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mfc0 t3, MIPS32_CP0_CAUSE /* t3 = CP0 cause register */
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mfc0 t3, MIPS32_CP0_CAUSE /* t3 = CP0 cause register */
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ori t3, (1 << 8) /* Bit 8: Request software interrupt 0 */
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ori t3, (1 << 8) /* Bit 8: Request software interrupt 0 */
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.set noreorder
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.set noreorder
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mtc0 t3, MIPS32_CP0_CAUSE /* Trigger the software interrupt */
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mtc0 t3, MIPS32_CP0_CAUSE /* Trigger the software interrupt */
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nop /* Delay slot */
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j ra /* Return with result in v0 */
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/* The actual interrupt will not a occur for a few more cycles. Let's
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* put a few nop's here in hope that the SW interrupt occurs during
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* the sequence of nops.
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*/
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nop
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nop
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nop
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nop
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/* Then return with the result of the software interrupt in v0 */
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j ra
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.end sys_call0
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.end sys_call0
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