From ccff772099f3e014a44064100217f0e16f7f88de Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 15 Aug 2011 18:07:54 +0000 Subject: [PATCH] More Kinetis updates git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3883 42af7a65-404d-4744-a932-0658087f49c3 --- configs/kwikstik-k40/README.txt | 120 +++++- configs/kwikstik-k40/ostest/defconfig | 144 +++++-- configs/twr-k60n512/README.txt | 562 ++++++++++++++++++++++++++ 3 files changed, 774 insertions(+), 52 deletions(-) create mode 100644 configs/twr-k60n512/README.txt diff --git a/configs/kwikstik-k40/README.txt b/configs/kwikstik-k40/README.txt index 55703570b8..a520074605 100644 --- a/configs/kwikstik-k40/README.txt +++ b/configs/kwikstik-k40/README.txt @@ -6,17 +6,25 @@ KwiStick K40. Refer to the Freescale web site for further information about this part: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KWIKSTIK-K40 +The Kwikstik is used with the FreeScale Tower System (mostly just to +provide a simple UART connection) + Contents ======== - o Kinetis KwikStik Features + o Kinetis KwikStik-K40 Features + o Kinetis KwikStik-K60 Pin Configuration + - On-Board Connections + - Connections via the General Purpose Tower Plug-in (TWRPI) Socket + - Connections via the Tower Primary Connector Side A + - Connections via the Tower Primary Connector Side B o Development Environment o GNU Toolchain Options o IDEs o NuttX buildroot Toolchain -Kinetis KwikStik Features: -========================= +Kinetis KwikStik-K40 Features: +============================== o Kinetis K40 MCU in 144 LQFP - 100 MHz ARM Cortex-M4 core @@ -34,6 +42,86 @@ Kinetis KwikStik Features: o Freescale Tower System connectivity for UART, timers, CAN, SPI, I2C, and DAC o Freescale Tower plug-in (TWRPI) socket connectivity for ADC, SPI, I2C, and GPIO +Kinetis KwikStik-K40 Pin Configuration +====================================== + +On-Board Connections +------------------- -------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +------------------- -------------------------- -------- ------------------- +Audio Jack Output Audio Amp On PTE28 PTE28 + Audio Output DAC1_OUT DAC1_OUT + Volume Up PTD10 PTD10 + Volume Down PTD11 PTD11 +Buzzer Audio Out PTA8 FTM1_CH0 +Microphone Microphone input PTA7 ADC0_SE10 +SD Card Slot SD Clock PTE2 SDHC0_DCLK + SD Command PTE3 SDHC0_CMD + SD Data0 PTD12 SDHC0_D4 + SD Data1 PTD13 SDHC0_D5 + SD Data2 PTD14 SDHC0_D6 + SD Data3 PTD15 SDHC0_D7 + SD Card Detect PTE27 PTE27 + SD Card On PTE6 PTE6 +Infrared Port IR Transmit PTE4 IR_TX + IR Receive PTA13 CMP2_IN0 +Touch Pads E1 / Touch PTB0 TSI0_CH0 + E2 / Touch PTA4 TSI0_CH5 + E3 / Touch PTA24 PTA24 + E4 / Touch PTA25 PTA25 + E5 / Touch PTA26 PTA26 + E6 / Touch PTA27 PTA27 + +Connections via the General Purpose Tower Plug-in (TWRPI) Socket +------------------- -------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +------------------- -------------------------- -------- ------------------- +General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3 +TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3 + TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3 + TWRPI ID0 (J8 Pin 17) ? ADC0_DP1 + TWRPI ID1 (J8 Pin 18) ? ADC0_DM1 + TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL + TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA + TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN + TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT + TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0 + TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK + TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12 + TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9 + TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10 + TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5 + TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5 + +The KwikStik features an expansion card-edge connector that interfaces to the Primary Elevator board in a Tower system (Primary side). + +Connections via the Tower Primary Connector Side A +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- + +A9 GPIO9 / CTS1 PTE10/UART_CTS +A43 RXD1 PTE9/UART_RX +A44 TXD1 PTE8/UART_TX +A63 RSTOUT_b PTA9/FTM1_CH1 + +Connections via the Tower Primary Connector Side B +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +B21 GPIO1 / RTS1 PTE7/UART_RTS +B37 PWM7 PTA8/FTM1_CH0 +B38 PWM6 PTA9/FTM1_CH1 +B41 CANRX0 PTE25/CAN1_RX +B42 CANTX0 PTE24/CAN1_TX +B44 SPI0_MISO PTA17/SPI0_SIN +B45 SPI0_MOSI PTA16/SPI0_SOUT +B46 SPI0_CS0_b PTA14/SPI0_PCS0 +B48 SPI0_CLK PTA15/SPI0_SCK +B50 SCL1 PTE1/I2C1_SCL +B51 SDA1 PTE0/I2C1_SDA +B52 GPIO5 / SD_CARD_DET PTA16 + Development Environment ======================= @@ -298,7 +386,7 @@ KwikStik-K40-specific Configuration Options CONFIG_KINETIS_PIT -- Support Programmable Interval Timers CONFIG_ARMV7M_MPU -- Support the MPU - Kinetis interrupt prioritys (Default is the mid priority) + Kinetis interrupt priorities (Default is the mid priority) CONFIG_KINETIS_UART0PRIO CONFIG_KINETIS_UART1PRIO @@ -307,6 +395,16 @@ KwikStik-K40-specific Configuration Options CONFIG_KINETIS_UART4PRIO CONFIG_KINETIS_UART5PRIO + PIN Interrupt Support + + CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs + one or more of the following: + CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts + CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts + CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts + CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts + CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts + Kinetis K40 specific device driver settings CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the @@ -319,20 +417,6 @@ KwikStik-K40-specific Configuration Options CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8. CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity - CONFIG_KINETIS_SPI_INTERRUPTS - Select to enable interrupt driven SPI - support. Non-interrupt-driven, poll-waiting is recommended if the - interrupt rate would be to high in the interrupt driven case. - CONFIG_KINETIS_SPI_DMA - Use DMA to improve SPI transfer performance. - Cannot be used with CONFIG_KINETIS_SPI_INTERRUPT. - - CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_KINETIS_SDIO - and CONFIG_KINETIS_DMA2. - CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 - CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. - Default: Medium - CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: - 4-bit transfer mode. - KwikStik-K40 LCD Hardware Configuration CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig index 651404aa89..e901f0ae94 100755 --- a/configs/kwikstik-k40/ostest/defconfig +++ b/configs/kwikstik-k40/ostest/defconfig @@ -102,41 +102,112 @@ CONFIG_KINETIS_DFU=y # Individual subsystems can be enabled: # # Individual subsystems can be enabled: -# AHB: -CONFIG_KINETIS_DMA1=n -CONFIG_KINETIS_DMA2=n -CONFIG_KINETIS_CRC=n -CONFIG_KINETIS_FSMC=y -CONFIG_KINETIS_SDIO=n -# APB1: -CONFIG_KINETIS_TIM2=n -CONFIG_KINETIS_TIM3=n -CONFIG_KINETIS_TIM4=n -CONFIG_KINETIS_TIM5=n -CONFIG_KINETIS_TIM6=n -CONFIG_KINETIS_TIM7=n -CONFIG_KINETIS_WWDG=n -CONFIG_KINETIS_SPI2=n -CONFIG_KINETIS_SPI4=n -CONFIG_KINETIS_UART2=y +# +# CONFIG_KINETIS_TRACE - Enable trace clocking on power up. +# CONFIG_KINETIS_FLEXBUS - Enable flexbus clocking on power up. +# CONFIG_KINETIS_UART0 - Support UART0 +# CONFIG_KINETIS_UART1 - Support UART1 +# CONFIG_KINETIS_UART2 - Support UART2 +# CONFIG_KINETIS_UART3 - Support UART3 +# CONFIG_KINETIS_UART4 - Support UART4 +# CONFIG_KINETIS_UART5 - Support UART5 +# CONFIG_KINETIS_ETHERNET - Support Ethernet (K60 only) +# CONFIG_KINETIS_RNGB - Support the random number generator(K60 only) +# CONFIG_KINETIS_FLEXCAN0 - Support FlexCAN0 +# CONFIG_KINETIS_FLEXCAN1 - Support FlexCAN1 +# CONFIG_KINETIS_SPI0 - Support SPI0 +# CONFIG_KINETIS_SPI1 - Support SPI1 +# CONFIG_KINETIS_SPI2 - Support SPI2 +# CONFIG_KINETIS_I2C0 - Support I2C0 +# CONFIG_KINETIS_I2C1 - Support I2C1 +# CONFIG_KINETIS_I2S - Support I2S +# CONFIG_KINETIS_DAC0 - Support DAC0 +# CONFIG_KINETIS_DAC1 - Support DAC1 +# CONFIG_KINETIS_ADC0 - Support ADC0 +# CONFIG_KINETIS_ADC1 - Support ADC1 +# CONFIG_KINETIS_CMP - Support CMP +# CONFIG_KINETIS_VREF - Support VREF +# CONFIG_KINETIS_SDHC - Support SD host controller +# CONFIG_KINETIS_FTM0 - Support FlexTimer 0 +# CONFIG_KINETIS_FTM1 - Support FlexTimer 1 +# CONFIG_KINETIS_FTM2 - Support FlexTimer 2 +# CONFIG_KINETIS_LPTIMER - Support the low power timer +# CONFIG_KINETIS_RTC - Support RTC +# CONFIG_KINETIS_SLCD - Support the segment LCD (K40 only) +# CONFIG_KINETIS_EWM - Support the external watchdog +# CONFIG_KINETIS_CMT - Support Carrier Modulator Transmitter +# CONFIG_KINETIS_USBOTG - Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV) +# CONFIG_KINETIS_USBDCD - Support the USB Device Charger Detection module +# CONFIG_KINETIS_LLWU - Support the Low Leakage Wake-Up Unit +# CONFIG_KINETIS_TSI - Support the touch screeen interface +# CONFIG_KINETIS_FTFL - Support FLASH +# CONFIG_KINETIS_DMA - Support DMA +# CONFIG_KINETIS_CRC - Support CRC +# CONFIG_KINETIS_PDB - Support the Programmable Delay Block +# CONFIG_KINETIS_PIT - Support Programmable Interval Timers +# CONFIG_ARMV7M_MPU - Support the MPU + +CONFIG_KINETIS_TRACE=n +CONFIG_KINETIS_FLEXBUS=n +CONFIG_KINETIS_UART0=y +CONFIG_KINETIS_UART1=y +CONFIG_KINETIS_UART2=n CONFIG_KINETIS_UART3=n CONFIG_KINETIS_UART4=n CONFIG_KINETIS_UART5=n -CONFIG_KINETIS_I2C1=n -CONFIG_KINETIS_I2C2=n -CONFIG_KINETIS_USB=y -CONFIG_KINETIS_CAN=n -CONFIG_KINETIS_BKP=n -CONFIG_KINETIS_PWR=n -CONFIG_KINETIS_DAC=n -# APB2: -CONFIG_KINETIS_ADC1=n -CONFIG_KINETIS_ADC2=n -CONFIG_KINETIS_TIM1=n +CONFIG_KINETIS_ETHERNET=n +CONFIG_KINETIS_RNGB=n +CONFIG_KINETIS_FLEXCAN0=n +CONFIG_KINETIS_FLEXCAN1=n +CONFIG_KINETIS_SPI0=n CONFIG_KINETIS_SPI1=n -CONFIG_KINETIS_TIM8=n -CONFIG_KINETIS_UART1=y -CONFIG_KINETIS_ADC3=n +CONFIG_KINETIS_SPI2=n +CONFIG_KINETIS_I2C0=n +CONFIG_KINETIS_I2C1=n +CONFIG_KINETIS_I2S=n +CONFIG_KINETIS_DAC0=n +CONFIG_KINETIS_DAC1=n +CONFIG_KINETIS_ADC0=n +CONFIG_KINETIS_ADC1=n +CONFIG_KINETIS_CMP=n +CONFIG_KINETIS_VREF=n +CONFIG_KINETIS_SDHC=n +CONFIG_KINETIS_FTM0=n +CONFIG_KINETIS_FTM1=n +CONFIG_KINETIS_FTM2=n +CONFIG_KINETIS_LPTIMER=n +CONFIG_KINETIS_RTC=n +CONFIG_KINETIS_SLCD=n +CONFIG_KINETIS_EWM=n +CONFIG_KINETIS_CMT=n +CONFIG_KINETIS_USBOTG=n +CONFIG_KINETIS_USBDCD=n +CONFIG_KINETIS_LLWU=n +CONFIG_KINETIS_TSI=n +CONFIG_KINETIS_FTFL=n +CONFIG_KINETIS_DMA=n +CONFIG_KINETIS_CRC=n +CONFIG_KINETIS_PDB=n +CONFIG_KINETIS_PIT=n +CONFIG_ARMV7M_MPU=n + +# +# PIN Interrupt Support +# +# CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs one or +# more of the following: +# CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts +# CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts +# CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts +# CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts +# CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts +# +CONFIG_GPIO_IRQ=n +CONFIG_KINETIS_PORTAINTS=n +CONFIG_KINETIS_PORTBINTS=n +CONFIG_KINETIS_PORTCINTS=n +CONFIG_KINETIS_PORTDINTS=n +CONFIG_KINETIS_PORTEINTS=n # # K40X256VLQ100 specific serial device driver settings @@ -151,37 +222,42 @@ CONFIG_KINETIS_ADC3=n # CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 9. # CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # +CONFIG_UART1_SERIAL_CONSOLE=n CONFIG_UART1_SERIAL_CONSOLE=y CONFIG_UART2_SERIAL_CONSOLE=n CONFIG_UART3_SERIAL_CONSOLE=n CONFIG_UART4_SERIAL_CONSOLE=n CONFIG_UART5_SERIAL_CONSOLE=n +CONFIG_UART0_TXBUFSIZE=256 CONFIG_UART1_TXBUFSIZE=256 CONFIG_UART2_TXBUFSIZE=256 CONFIG_UART3_TXBUFSIZE=256 CONFIG_UART4_TXBUFSIZE=256 CONFIG_UART5_TXBUFSIZE=256 +CONFIG_UART0_RXBUFSIZE=256 CONFIG_UART1_RXBUFSIZE=256 CONFIG_UART2_RXBUFSIZE=256 CONFIG_UART3_RXBUFSIZE=256 CONFIG_UART4_RXBUFSIZE=256 CONFIG_UART5_RXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 CONFIG_UART1_BAUD=115200 CONFIG_UART2_BAUD=115200 CONFIG_UART3_BAUD=115200 CONFIG_UART4_BAUD=115200 CONFIG_UART5_BAUD=115200 +CONFIG_UART0_BITS=8 CONFIG_UART1_BITS=8 CONFIG_UART2_BITS=8 CONFIG_UART3_BITS=8 CONFIG_UART4_BITS=8 CONFIG_UART5_BITS=8 -CONFIG_UART1_PARITY=0 +CONFIG_UART0_PARITY=0 CONFIG_UART2_PARITY=0 CONFIG_UART3_PARITY=0 CONFIG_UART4_PARITY=0 @@ -304,7 +380,7 @@ CONFIG_HAVE_LIBM=n # handle delayed processing from interrupt handlers. This feature # is required for some drivers but, if there are not complaints, # can be safely disabled. The worker thread also performs -# garbage collection -- completing any delayed memory deallocations +# garbage collection--completing any delayed memory deallocations # from interrupt handlers. If the worker thread is disabled, # then that clean will be performed by the IDLE thread instead # (which runs at the lowest of priority and may not be appropriate @@ -734,7 +810,7 @@ CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 # specific initialization (nsh_archinitialize()). # # If CONFIG_NSH_TELNET is selected: -# CONFIG_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size +# CONFIG_NSH_IOBUFFER_SIZE - Telnetd I/O buffer size # CONFIG_NSH_DHCPC - Obtain address using DHCP # CONFIG_NSH_IPADDR - Provides static IP address # CONFIG_NSH_DRIPADDR - Provides static router IP address diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt new file mode 100644 index 0000000000..5bedec8afb --- /dev/null +++ b/configs/twr-k60n512/README.txt @@ -0,0 +1,562 @@ +README.txt +========== + +This is the README file for the port of NuttX to the Freescale Kinetis +TWR-K60N512. Refer to the Freescale web site for further information +about this part: +http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=TWR-K60N512-KIT + +The TWR-K60N51 includes with the FreeScale Tower System which provides (among +other things) a simple UART connection. + +Contents +======== + + o Kinetis TWR-K60N512 Features + o Kinetis TWR-K60N512 Pin Configuration + - On-Board Connections + - Connections via the General Purpose Tower Plug-in (TWRPI) Socket + - Connections via the Tower Primary Connector Side A + - Connections via the Tower Primary Connector Side B + o Development Environment + o GNU Toolchain Options + o IDEs + o NuttX buildroot Toolchain + +Kinetis TWR-K60N512 Features: +============================= + + o K60N512 in 144 MAPBGA, K60N512VMD100 + o Capacitive Touch Pads + o Integrated, Open-Source JTAG + o SD Card Slot + o MMA7660 3-axis accelerometer + o Tower Plug-In (TWRPI) Socket for expansion (sensors, etc.) + o Touch TWRPI Socket adds support for various capacitive touch boards + (e.g. keypads, rotary dials, sliders, etc.) + o Tower connectivity for access to USB, Ethernet, RS232/RS485, CAN, SPI, + I²C, Flexbus, etc. + o Plus: Potentiometer, 4 LEDs, 2 pushbuttons, infrared port + +Kinetis TWR-K60N512 Pin Configuration +===================================== + +On-Board Connections +-------------------- ------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +-------------------- ------------------------- -------- ------------------- +OSJTAG USB-to-serial OSJTAG Bridge RX Data PTE9 UART5_RX +Bridge OSJTAG Bridge TX Data PTE8 UART5_TX +SD Card Slot SD Clock PTE2 SDHC0_DCLK + SD Command PTE3 SDHC0_CMD + SD Data0 PTE1 SDHC0_D0 + SD Data1 PTE0 SDHC0_D1 + SD Data2 PTE5 SDHC0_D2 + SD Data3 PTE4 SDHC0_D3 + SD Card Detect PTE28 PTE28 + SD Write Protect PTE27 PTE27 +Infrared Port IR Transmit PTD7 CMT_IRO + IR Receive PTC6 CMP0_IN0 +Pushbuttons SW1 (IRQ0) PTA19 PTA19 + SW2 (IRQ1) PTE26 PTE26 + SW3 (RESET) RESET_b RESET_b +Touch Pads E1 / Touch PTA4 TSI0_CH5 + E2 / Touch PTB3 TSI0_CH8 + E3 / Touch PTB2 TSI0_CH7 + E4 / Touch PTB16 TSI0_CH9 +LEDs E1 / Orange LED PTA11 PTA11 + E2 / Yellow LED PTA28 PTA28 + E3 / Green LED PTA29 PTA29 + E4 / Blue LED PTA10 PTA10 +Potentiometer Potentiometer (R71) ? ADC1_DM1 +Accelerometer I2C SDA PTD9 I2C0_SDA + I2C SCL PTD8 I2C0_SCL + IRQ PTD10 PTD10 +Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0 +LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6 + Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7 + Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8 + Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13 + Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14 + Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15 + Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5 + Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9 + Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10 + Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11 + Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12 + TWRPI ID0 (J3 Pin 17) ? ADC1_DP1 + TWRPI ID1 (J3 Pin 18) ? ADC1_SE16 + +Connections via the General Purpose Tower Plug-in (TWRPI) Socket +-------------------- ------------------------- -------- ------------------- +FEATURE CONNECTION PORT/PIN PIN FUNCTION +-------------------- ------------------------- -------- ------------------- +General Purpose TWRPI AN0 (J4 Pin 8) ? ADC0_DP0/ADC1_DP3 +TWRPI Socket TWRPI AN1 (J4 Pin 9) ? ADC0_DM0/ADC1_DM3 + TWRPI AN2 (J4 Pin 12) ? ADC1_DP0/ADC0_DP3 + TWRPI ID0 (J4 Pin 17) ? ADC0_DP1 + TWRPI ID1 (J4 Pin 18) ? ADC0_DM1 + TWRPI I2C SCL (J5 Pin 3) PTD8 I2C0_SCL + TWRPI I2C SDA (J5 Pin 4) PTD9 I2C0_SDA + TWRPI SPI MISO (J5 Pin 9) PTD14 SPI2_SIN + TWRPI SPI MOSI (J5 Pin 10) PTD13 SPI2_SOUT + TWRPI SPI SS (J5 Pin 11) PTD15 SPI2_PCS0 + TWRPI SPI CLK (J5 Pin 12) PTD12 SPI2_SCK + TWRPI GPIO0 (J5 Pin 15) PTD10 PTD10 + TWRPI GPIO1 (J5 Pin 16) PTB8 PTB8 + TWRPI GPIO2 (J5 Pin 17) PTB9 PTB9 + TWRPI GPIO3 (J5 Pin 18) PTA19 PTA19 + TWRPI GPIO4 (J5 Pin 19) PTE26 PTE26 + +The TWR-K60N512 features two expansion card-edge connectors that interface +to the Primary and Secondary Elevator boards in a Tower system. The Primary +Connector (comprised of sides A and B) is utilized by the TWR-K60N512 while +the Secondary Connector (comprised of sides C and D) only makes connections +to the GND pins. + +Connections via the Tower Primary Connector Side A +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +A7 SCL0 PTD8 +A8 SDA0 PTD9 +A9 GPIO9 / CTS1 PTC19 +A10 GPIO8 / SDHC_D2 PTE5 +A11 GPIO7 / SD_WP_DET PTE27 +A13 ETH_MDC PTB1 +A14 ETH_MDIO PTB0 +A16 ETH_RXDV PTA14 +A19 ETH_RXD1 PTA12 +A20 ETH_RXD0 PTA13 +A21 SSI_MCLK PTE6 +A22 SSI_BCLK PTE12 +A23 SSI_FS PTE11 +A24 SSI_RXD PTE7 +A25 SSI_TXD PTE10 +A27 AN3 PGA0_DP/ADC0_DP0/ADC1_DP3 +A28 AN2 PGA0_DM/ADC0_DM0/ADC1_DM3 +A29 AN1 PGA1_DP/ADC1_DP0/ADC0_DP3 +A30 AN0 PGA1_DM/ADC1_DM0/ADC0_DM3 +A33 TMR1 PTA9 +A34 TMR0 PTA8 +A35 GPIO6 PTB9 +A37 PWM3 PTA6 +A38 PWM2 PTC3 +A39 PWM1 PTC2 +A40 PWM0 PTC1 +A41 RXD0 PTE25 +A42 TXD0 PTE24 +A43 RXD1 PTC16 +A44 TXD1 PTC17 +A64 CLKOUT0 PTC3 +A66 EBI_AD14 PTC0 +A67 EBI_AD13 PTC1 +A68 EBI_AD12 PTC2 +A69 EBI_AD11 PTC4 +A70 EBI_AD10 PTC5 +A71 EBI_AD9 PTC6 +A71 EBI_R/W_b PTC11 +A72 EBI_AD8 PTC7 +A73 EBI_AD7 PTC8 +A74 EBI_AD6 PTC9 +A75 EBI_AD5 PTC10 +A76 EBI_AD4 PTD2 +A77 EBI_AD3 PTD3 +A78 EBI_AD2 PTD4 +A79 EBI_AD1 PTD5 +A80 EBI_AD0 PTD6 + +Connections via the Tower Primary Connector Side B +--- -------------------- -------------------------------- +PIN NAME USAGE +--- -------------------- -------------------------------- +B7 SDHC_CLK / SPI1_CLK PTE2 +B9 SDHC_D3 / SPI1_CS0_b PTE4 +B10 SDHC_CMD / SPI1_MOSI PTE1 +B11 SDHC_D0 / SPI1_MISO PTE3 +B13 ETH_RXER PTA5 +B15 ETH_TXEN PTA15 +B19 ETH_TXD1 PTA17 +B20 ETH_TXD0 PTA16 +B21 GPIO1 / RTS1 PTC18 +B22 GPIO2 / SDHC_D1 PTE0 +B23 GPIO3 PTE28 +B24 CLKIN0 PTA18 +B25 CLKOUT1 PTE26 +B27 AN7 PTB7 +B28 AN6 PTB6 +B29 AN5 PTB5 +B30 AN4 PTB4 +B34 TMR2 PTD6 +B35 GPIO4 PTB8 +B37 PWM7 PTA2 +B38 PWM6 PTA1 +B39 PWM5 PTD5 +B40 PWM4 PTA7 +B41 CANRX0 PTE25 +B42 CANTX0 PTE24 +B44 SPI0_MISO PTD14 +B45 SPI0_MOSI PTD13 +B46 SPI0_CS0_b PTD11 +B47 SPI0_CS1_b PTD15 +B48 SPI0_CLK PTD12 +B50 SCL1 PTD8 +B51 SDA1 PTD9 +B52 GPIO5 / SD_CARD_DET PTE28 +B55 IRQ_H PTA24 +B56 IRQ_G PTA24 +B57 IRQ_F PTA25 +B58 IRQ_E PTA25 +B59 IRQ_D PTA26 +B60 IRQ_C PTA26 +B61 IRQ_B PTA27 +B62 IRQ_A PTA27 +B63 EBI_ALE / EBI_CS1_b PTD0 +B64 EBI_CS0_b PTD1 +B66 EBI_AD15 PTB18 +B67 EBI_AD16 PTB17 +B68 EBI_AD17 PTB16 +B69 EBI_AD18 PTB11 +B70 EBI_AD19 PTB10 +B72 EBI_OE_b PTB19 +B73 EBI_D7 PTB20 +B74 EBI_D6 PTB21 +B75 EBI_D5 PTB22 +B76 EBI_D4 PTB23 +B77 EBI_D3 PTC12 +B78 EBI_D2 PTC13 +B79 EBI_D1 PTC14 +B80 EBI_D0 PTC15 + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The CodeSourcery GNU toolchain, + 2. The devkitARM GNU toolchain, + 3. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the CodeSourcery Windows toolchain. To + use the devkitARM or the NuttX GNU toolchain, you simply need to change the + the following configuration options to your .config (or defconfig) file: + + CONFIG_KINETIS_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_KINETIS_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_KINETIS_DEVKITARM=y : devkitARM under Windows + CONFIG_KINETIS_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_KINETIS_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the CodeSourcery (for Windows) and devkitARM toolchains are + Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had not effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + 3. Dependencies are not made when using Windows versions of the GCC. This is + because the dependencies are generated using Windows pathes which do not + work with the Cygwin make. + + Support has been added for making dependencies with the windows-native toolchains. + That support can be enabled by modifying your Make.defs file as follows: + + - MKDEP = $(TOPDIR)/tools/mknulldeps.sh + + MKDEP = $(TOPDIR)/tools/mkdeps.sh --winpaths "$(TOPDIR)" + + If you have problems with the dependency build (for example, if you are not + building on C:), then you may need to modify tools/mkdeps.sh + + NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/k40, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/kinetis/k40_vectors.S. + +NuttX buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M4 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M4 toolchain, one can be downloaded from the NuttX + SourceForge download site (https://sourceforge.net/project/showfiles.php?group_id=189573). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + NOTE: The NuttX toolchain is an OABI toolchain (vs. the more common EABI) + and does not include optimizations for Cortex-M4 (ARMv7E-M). + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh twr-k60n512/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-4.3.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you are + building a Cortex-M4 toolchain for Cygwin under Windows. + +TWR-K60N512-specific Configuration Options +========================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This sould + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=k40 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_MK60X256VLQ100 + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=twr-k60n512 (for the TWR-K60N512 development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_TWR_K60N512=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): + + CONFIG_DRAM_SIZE=0x00010000 (64Kb) + + CONFIG_DRAM_START - The start address of installed DRAM + + CONFIG_DRAM_START=0x20000000 + + CONFIG_DRAM_END - Last address+1 of installed RAM + + CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) + + CONFIG_ARCH_IRQPRIO - The Kinetis K60 supports interrupt prioritization + + CONFIG_ARCH_IRQPRIO=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_KINETIS_TRACE -- Enable trace clocking on power up. + CONFIG_KINETIS_FLEXBUS -- Enable flexbus clocking on power up. + CONFIG_KINETIS_UART0 -- Support UART0 + CONFIG_KINETIS_UART1 -- Support UART1 + CONFIG_KINETIS_UART2 -- Support UART2 + CONFIG_KINETIS_UART3 -- Support UART3 + CONFIG_KINETIS_UART4 -- Support UART4 + CONFIG_KINETIS_UART5 -- Support UART5 + CONFIG_KINETIS_ETHERNET -- Support Ethernet (K60 only) + CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only) + CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0 + CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1 + CONFIG_KINETIS_SPI0 -- Support SPI0 + CONFIG_KINETIS_SPI1 -- Support SPI1 + CONFIG_KINETIS_SPI2 -- Support SPI2 + CONFIG_KINETIS_I2C0 -- Support I2C0 + CONFIG_KINETIS_I2C1 -- Support I2C1 + CONFIG_KINETIS_I2S -- Support I2S + CONFIG_KINETIS_DAC0 -- Support DAC0 + CONFIG_KINETIS_DAC1 -- Support DAC1 + CONFIG_KINETIS_ADC0 -- Support ADC0 + CONFIG_KINETIS_ADC1 -- Support ADC1 + CONFIG_KINETIS_CMP -- Support CMP + CONFIG_KINETIS_VREF -- Support VREF + CONFIG_KINETIS_SDHC -- Support SD host controller + CONFIG_KINETIS_FTM0 -- Support FlexTimer 0 + CONFIG_KINETIS_FTM1 -- Support FlexTimer 1 + CONFIG_KINETIS_FTM2 -- Support FlexTimer 2 + CONFIG_KINETIS_LPTIMER -- Support the low power timer + CONFIG_KINETIS_RTC -- Support RTC + CONFIG_KINETIS_SLCD -- Support the segment LCD (K60 only) + CONFIG_KINETIS_EWM -- Support the external watchdog + CONFIG_KINETIS_CMT -- Support Carrier Modulator Transmitter + CONFIG_KINETIS_USBOTG -- Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV) + CONFIG_KINETIS_USBDCD -- Support the USB Device Charger Detection module + CONFIG_KINETIS_LLWU -- Support the Low Leakage Wake-Up Unit + CONFIG_KINETIS_TSI -- Support the touch screeen interface + CONFIG_KINETIS_FTFL -- Support FLASH + CONFIG_KINETIS_DMA -- Support DMA + CONFIG_KINETIS_CRC -- Support CRC + CONFIG_KINETIS_PDB -- Support the Programmable Delay Block + CONFIG_KINETIS_PIT -- Support Programmable Interval Timers + CONFIG_ARMV7M_MPU -- Support the MPU + + Kinetis interrupt priorities (Default is the mid priority) + + CONFIG_KINETIS_UART0PRIO + CONFIG_KINETIS_UART1PRIO + CONFIG_KINETIS_UART2PRIO + CONFIG_KINETIS_UART3PRIO + CONFIG_KINETIS_UART4PRIO + CONFIG_KINETIS_UART5PRIO + + PIN Interrupt Support + + CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs + one or more of the following: + CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts + CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts + CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts + CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts + CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts + + Kinetis K60 specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. + CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + + TWR-K60N512 LCD Hardware Configuration + + CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape" + support. Default is this 320x240 "landscape" orientation + (this setting is informative only... not used). + CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait" + orientation support. In this orientation, the TWR-K60N512's + LCD ribbon cable is at the bottom of the display. Default is + 320x240 "landscape" orientation. + CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse + portrait" orientation support. In this orientation, the + TWR-K60N512's LCD ribbon cable is at the top of the display. + Default is 320x240 "landscape" orientation. + CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight + using timer 1. The granularity of the settings is determined + by CONFIG_LCD_MAXPOWER. Requires CONFIG_KINETIS_TIM1. + +Configurations +============== + +Each TWR-K60N512 configuration is maintained in a sudirectory and +can be selected as follow: + + cd tools + ./configure.sh twr-k60n512/ + cd - + . ./setenv.sh + +Where is one of the following: + + ostest: + ------ + This configuration directory, performs a simple OS test using + examples/ostest. By default, this project assumes that you are + using the DFU bootloader. + + CONFIG_KINETIS_BUILDROOT=y : NuttX buildroot under Linux or Cygwin