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Progress of LPC43xx build environment

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4904 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-07-04 17:59:16 +00:00
parent 80754392c4
commit cd39e0b2b2
23 changed files with 1350 additions and 605 deletions
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392
arch/arm/include/lpc43xx/irq.h
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@ -1,4 +1,4 @@
/****************************************************************************
/********************************************************************************************
* arch/arm/include/lpc43xxx/irq.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
@ -31,7 +31,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
********************************************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
@ -40,138 +40,98 @@
#ifndef __ARCH_ARM_INCLUDE_LPC43XX_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC43XX_IRQ_H
/****************************************************************************
/********************************************************************************************
* Included Files
****************************************************************************/
********************************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/****************************************************************************
/********************************************************************************************
* Pre-processor Definitions
****************************************************************************/
********************************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to handle mapping
* tables.
*/
/* Processor Exceptions (vectors 0-15) */
#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LPC43_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define LPC43_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define LPC43_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
#define LPC43_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
#define LPC43_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
#define LPC43_IRQ_SIGNVALUE (7) /* Vector 7: Sign value */
#define LPC43_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define LPC43_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
#define LPC43_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define LPC43_IRQ_SYSTICK (15) /* Vector 15: System tick */
#define LPC43_IRQ_EXTINT (16) /* Vector 16: Vector number of the first external interrupt */
#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LPC43_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define LPC43_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define LPC43_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
#define LPC43_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
#define LPC43_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
#define LPC43_IRQ_SIGNVALUE (7) /* Vector 7: Sign value */
#define LPC43_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define LPC43_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
#define LPC43_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define LPC43_IRQ_SYSTICK (15) /* Vector 15: System tick */
#define LPC43_IRQ_EXTINT (16) /* Vector 16: Vector number of the first external interrupt */
/* Cortex-M4 External interrupts (vectors >= 16) */
#define LPC43M4_IRQ_DAC (LPC43_IRQ_EXTINT+0) /* D/A */
#define LPC43M4_IRQ_M0CORE (LPC43_IRQ_EXTINT+1) /* M0 Core */
#define LPC43M4_IRQ_DMA (LPC43_IRQ_EXTINT+2) /* DMA */
#define LPC43M4_IRQ_FLASHEEPROM (LPC43_IRQ_EXTINT+4) /* EEPROM interrupts (BankA or BankB) */
#define LPC43M4_IRQ_ETHERNET (LPC43_IRQ_EXTINT+5) /* Ethernet interrupt */
#define LPC43M4_IRQ_SDIO (LPC43_IRQ_EXTINT+6) /* SD/MMC interrupt */
#define LPC43M4_IRQ_LCD (LPC43_IRQ_EXTINT+7) /* LCD */
#define LPC43M4_IRQ_USB0 (LPC43_IRQ_EXTINT+8) /* USB0 OTG interrupt */
#define LPC43M4_IRQ_USB1 (LPC43_IRQ_EXTINT+9) /* USB1 interrupt */
#define LPC43M4_IRQ_SCT (LPC43_IRQ_EXTINT+10) /* SCT combined interrupt */
#define LPC43M4_IRQ_RITIMER (LPC43_IRQ_EXTINT+11) /* RITIMER interrupt */
#define LPC43M4_IRQ_TIMER0 (LPC43_IRQ_EXTINT+12) /* TIMER0 interrupt */
#define LPC43M4_IRQ_TIMER1 (LPC43_IRQ_EXTINT+13) /* TIMER1 interrupt */
#define LPC43M4_IRQ_TIMER2 (LPC43_IRQ_EXTINT+14) /* TIMER2 interrupt */
#define LPC43M4_IRQ_TIMER3 (LPC43_IRQ_EXTINT+15) /* TIMER3 interrupt */
#define LPC43M4_IRQ_MCPWM (LPC43_IRQ_EXTINT+16) /* Motor control PWM interrupt */
#define LPC43M4_IRQ_ADC0 (LPC43_IRQ_EXTINT+17) /* ADC0 interrupt */
#define LPC43M4_IRQ_I2C0 (LPC43_IRQ_EXTINT+18) /* I2C0 interrupt */
#define LPC43M4_IRQ_I2C1 (LPC43_IRQ_EXTINT+19) /* I2C1 interrupt */
#define LPC43M4_IRQ_SPI (LPC43_IRQ_EXTINT+20) /* SPI interrupt */
#define LPC43M4_IRQ_ADC1 (LPC43_IRQ_EXTINT+21) /* ADC1 interrupt */
#define LPC43M4_IRQ_SSP0 (LPC43_IRQ_EXTINT+22) /* SSP0 interrupt */
#define LPC43M4_IRQ_SSP1 (LPC43_IRQ_EXTINT+23) /* SSP1 interrupt */
#define LPC43M4_IRQ_USART0 (LPC43_IRQ_EXTINT+24) /* USART0 interrupt */
#define LPC43M4_IRQ_UART1 (LPC43_IRQ_EXTINT+25) /* UART1/Modem interrupt */
#define LPC43M4_IRQ_USART2 (LPC43_IRQ_EXTINT+26) /* USART2 interrupt */
#define LPC43M4_IRQ_USART3 (LPC43_IRQ_EXTINT+27) /* USART3/IrDA interrupt */
#define LPC43M4_IRQ_I2S0 (LPC43_IRQ_EXTINT+28) /* I2S0 interrupt */
#define LPC43M4_IRQ_I2S1 (LPC43_IRQ_EXTINT+29) /* I2S1 interrupt */
#define LPC43M4_IRQ_SPIFI (LPC43_IRQ_EXTINT+30) /* SPIFI interrupt */
#define LPC43M4_IRQ_SGPIO (LPC43_IRQ_EXTINT+31) /* SGPIO interrupt */
#define LPC43M4_IRQ_PININT0 (LPC43_IRQ_EXTINT+32) /* GPIO pin interrupt 0 */
#define LPC43M4_IRQ_PININT1 (LPC43_IRQ_EXTINT+33) /* GPIO pin interrupt 1 */
#define LPC43M4_IRQ_PININT2 (LPC43_IRQ_EXTINT+34) /* GPIO pin interrupt 2 */
#define LPC43M4_IRQ_PININT3 (LPC43_IRQ_EXTINT+35) /* GPIO pin interrupt 3 */
#define LPC43M4_IRQ_PININT4 (LPC43_IRQ_EXTINT+36) /* GPIO pin interrupt 4 */
#define LPC43M4_IRQ_PININT5 (LPC43_IRQ_EXTINT+37) /* GPIO pin interrupt 5 */
#define LPC43M4_IRQ_PININT6 (LPC43_IRQ_EXTINT+38) /* GPIO pin interrupt 6 */
#define LPC43M4_IRQ_PININT7 (LPC43_IRQ_EXTINT+39) /* GPIO pin interrupt 7 */
#define LPC43M4_IRQ_GINT0 (LPC43_IRQ_EXTINT+40) /* GPIO global interrupt 0 */
#define LPC43M4_IRQ_GINT1 (LPC43_IRQ_EXTINT+41) /* GPIO global interrupt 1 */
#define LPC43M4_IRQ_EVENTROUTER (LPC43_IRQ_EXTINT+42) /* Event router interrupt */
#define LPC43M4_IRQ_CAN1 (LPC43_IRQ_EXTINT+43) /* C_CAN1 interrupt */
#define LPC43M4_IRQ_ATIMER (LPC43_IRQ_EXTINT+46) /* ATIMER Alarm timer interrupt */
#define LPC43M4_IRQ_RTC (LPC43_IRQ_EXTINT+47) /* RTC interrupt */
#define LPC43M4_IRQ_WWDT (LPC43_IRQ_EXTINT+49) /* WWDT interrupt */
#define LPC43M4_IRQ_CAN0 (LPC43_IRQ_EXTINT+51) /* C_CAN0 interrupt */
#define LPC43M4_IRQ_QEI (LPC43_IRQ_EXTINT+52) /* QEI interrupt */
#define LPC43M4_IRQ_DAC (LPC43_IRQ_EXTINT+0) /* D/A */
#define LPC43M4_IRQ_M0CORE (LPC43_IRQ_EXTINT+1) /* M0 Core */
#define LPC43M4_IRQ_DMA (LPC43_IRQ_EXTINT+2) /* DMA */
#define LPC43M4_IRQ_FLASHEEPROM (LPC43_IRQ_EXTINT+4) /* EEPROM interrupts (BankA or BankB) */
#define LPC43M4_IRQ_ETHERNET (LPC43_IRQ_EXTINT+5) /* Ethernet interrupt */
#define LPC43M4_IRQ_SDIO (LPC43_IRQ_EXTINT+6) /* SD/MMC interrupt */
#define LPC43M4_IRQ_LCD (LPC43_IRQ_EXTINT+7) /* LCD */
#define LPC43M4_IRQ_USB0 (LPC43_IRQ_EXTINT+8) /* USB0 OTG interrupt */
#define LPC43M4_IRQ_USB1 (LPC43_IRQ_EXTINT+9) /* USB1 interrupt */
#define LPC43M4_IRQ_SCT (LPC43_IRQ_EXTINT+10) /* SCT combined interrupt */
#define LPC43M4_IRQ_RITIMER (LPC43_IRQ_EXTINT+11) /* RITIMER interrupt */
#define LPC43M4_IRQ_TIMER0 (LPC43_IRQ_EXTINT+12) /* TIMER0 interrupt */
#define LPC43M4_IRQ_TIMER1 (LPC43_IRQ_EXTINT+13) /* TIMER1 interrupt */
#define LPC43M4_IRQ_TIMER2 (LPC43_IRQ_EXTINT+14) /* TIMER2 interrupt */
#define LPC43M4_IRQ_TIMER3 (LPC43_IRQ_EXTINT+15) /* TIMER3 interrupt */
#define LPC43M4_IRQ_MCPWM (LPC43_IRQ_EXTINT+16) /* Motor control PWM interrupt */
#define LPC43M4_IRQ_ADC0 (LPC43_IRQ_EXTINT+17) /* ADC0 interrupt */
#define LPC43M4_IRQ_I2C0 (LPC43_IRQ_EXTINT+18) /* I2C0 interrupt */
#define LPC43M4_IRQ_I2C1 (LPC43_IRQ_EXTINT+19) /* I2C1 interrupt */
#define LPC43M4_IRQ_SPI (LPC43_IRQ_EXTINT+20) /* SPI interrupt */
#define LPC43M4_IRQ_ADC1 (LPC43_IRQ_EXTINT+21) /* ADC1 interrupt */
#define LPC43M4_IRQ_SSP0 (LPC43_IRQ_EXTINT+22) /* SSP0 interrupt */
#define LPC43M4_IRQ_SSP1 (LPC43_IRQ_EXTINT+23) /* SSP1 interrupt */
#define LPC43M4_IRQ_USART0 (LPC43_IRQ_EXTINT+24) /* USART0 interrupt */
#define LPC43M4_IRQ_UART1 (LPC43_IRQ_EXTINT+25) /* UART1/Modem interrupt */
#define LPC43M4_IRQ_USART2 (LPC43_IRQ_EXTINT+26) /* USART2 interrupt */
#define LPC43M4_IRQ_USART3 (LPC43_IRQ_EXTINT+27) /* USART3/IrDA interrupt */
#define LPC43M4_IRQ_I2S0 (LPC43_IRQ_EXTINT+28) /* I2S0 interrupt */
#define LPC43M4_IRQ_I2S1 (LPC43_IRQ_EXTINT+29) /* I2S1 interrupt */
#define LPC43M4_IRQ_SPIFI (LPC43_IRQ_EXTINT+30) /* SPIFI interrupt */
#define LPC43M4_IRQ_SGPIO (LPC43_IRQ_EXTINT+31) /* SGPIO interrupt */
#define LPC43M4_IRQ_PININT0 (LPC43_IRQ_EXTINT+32) /* GPIO pin interrupt 0 */
#define LPC43M4_IRQ_PININT1 (LPC43_IRQ_EXTINT+33) /* GPIO pin interrupt 1 */
#define LPC43M4_IRQ_PININT2 (LPC43_IRQ_EXTINT+34) /* GPIO pin interrupt 2 */
#define LPC43M4_IRQ_PININT3 (LPC43_IRQ_EXTINT+35) /* GPIO pin interrupt 3 */
#define LPC43M4_IRQ_PININT4 (LPC43_IRQ_EXTINT+36) /* GPIO pin interrupt 4 */
#define LPC43M4_IRQ_PININT5 (LPC43_IRQ_EXTINT+37) /* GPIO pin interrupt 5 */
#define LPC43M4_IRQ_PININT6 (LPC43_IRQ_EXTINT+38) /* GPIO pin interrupt 6 */
#define LPC43M4_IRQ_PININT7 (LPC43_IRQ_EXTINT+39) /* GPIO pin interrupt 7 */
#define LPC43M4_IRQ_GINT0 (LPC43_IRQ_EXTINT+40) /* GPIO global interrupt 0 */
#define LPC43M4_IRQ_GINT1 (LPC43_IRQ_EXTINT+41) /* GPIO global interrupt 1 */
#define LPC43M4_IRQ_EVENTROUTER (LPC43_IRQ_EXTINT+42) /* Event router interrupt */
#define LPC43M4_IRQ_CAN1 (LPC43_IRQ_EXTINT+43) /* C_CAN1 interrupt */
#define LPC43M4_IRQ_ATIMER (LPC43_IRQ_EXTINT+46) /* ATIMER Alarm timer interrupt */
#define LPC43M4_IRQ_RTC (LPC43_IRQ_EXTINT+47) /* RTC interrupt */
#define LPC43M4_IRQ_WWDT (LPC43_IRQ_EXTINT+49) /* WWDT interrupt */
#define LPC43M4_IRQ_CAN0 (LPC43_IRQ_EXTINT+51) /* C_CAN0 interrupt */
#define LPC43M4_IRQ_QEI (LPC43_IRQ_EXTINT+52) /* QEI interrupt */
/* Cortex-M0 External interrupts (vectors >= 16) */
#define LPC43M4_IRQ_NEXTINT (53)
#define LPC43M4_IRQ_NIRQS (LPC43_IRQ_EXTINT+LPC43M4_IRQ_NEXTINT)
#define LPC43M0_IRQ_RTC (LPC43_IRQ_EXTINT+0) /* RT interrupt */
#define LPC43M0_IRQ_M4CORE (LPC43_IRQ_EXTINT+1) /* Interrupt from the M4 core */
#define LPC43M0_IRQ_DMA (LPC43_IRQ_EXTINT+2) /* DMA interrupt */
#define LPC43M0_IRQ_FLASHEEPROM (LPC43_IRQ_EXTINT+4) /* EEPROM (Bank A or B) | A Timer */
#define LPC43M0_IRQ_ATIMER (LPC43_IRQ_EXTINT+4) /* EEPROM (Bank A or B) | A Timer */
#define LPC43M0_IRQ_ETHERNET (LPC43_IRQ_EXTINT+5) /* Ethernet interrupt */
#define LPC43M0_IRQ_SDIO (LPC43_IRQ_EXTINT+6) /* SDIO interrupt */
#define LPC43M0_IRQ_LCD (LPC43_IRQ_EXTINT+7) /* LCD interrupt */
#define LPC43M0_IRQ_USB0 (LPC43_IRQ_EXTINT+8) /* USB0 OTG interrupt */
#define LPC43M0_IRQ_USB1 (LPC43_IRQ_EXTINT+9) /* USB1 interrupt */
#define LPC43M0_IRQ_SCT (LPC43_IRQ_EXTINT+10) /* SCT combined interrupt */
#define LPC43M0_IRQ_RITIMER (LPC43_IRQ_EXTINT+11) /* RI Timer | WWDT interrupt */
#define LPC43M0_IRQ_WWDT (LPC43_IRQ_EXTINT+11) /* RI Timer | WWDT interrupt */
#define LPC43M0_IRQ_TIMER0 (LPC43_IRQ_EXTINT+12) /* TIMER0 interrupt */
#define LPC43M0_IRQ_GINT1 (LPC43_IRQ_EXTINT+13) /* GINT1 GPIO global interrupt 1 */
#define LPC43M0_IRQ_PININT4 (LPC43_IRQ_EXTINT+14) /* GPIO pin interrupt 4 */
#define LPC43M0_IRQ_TIMER3 (LPC43_IRQ_EXTINT+15) /* TIMER interrupt */
#define LPC43M0_IRQ_MCPWM (LPC43_IRQ_EXTINT+16) /* Motor control PWM interrupt */
#define LPC43M0_IRQ_ADC0 (LPC43_IRQ_EXTINT+17) /* ADC0 interrupt */
#define LPC43M0_IRQ_I2C0 (LPC43_IRQ_EXTINT+18) /* I2C0 | I2C1 interrupt */
#define LPC43M0_IRQ_I2C1 (LPC43_IRQ_EXTINT+18) /* I2C0 | I2C1 interrupt */
#define LPC43M0_IRQ_SGPIO (LPC43_IRQ_EXTINT+19) /* SGPIO interrupt */
#define LPC43M0_IRQ_SPI (LPC43_IRQ_EXTINT+20) /* SPI | DAC interrupt */
#define LPC43M0_IRQ_DAC (LPC43_IRQ_EXTINT+20) /* SPI | DAC interrupt */
#define LPC43M0_IRQ_ADC1 (LPC43_IRQ_EXTINT+21) /* ADC1 interrupt */
#define LPC43M0_IRQ_SSP0 (LPC43_IRQ_EXTINT+22) /* SSP0 | SSP1 interrupt */
#define LPC43M0_IRQ_SSP1 (LPC43_IRQ_EXTINT+22) /* SSP0 | SSP1 interrupt */
#define LPC43M0_IRQ_EVENTROUTER (LPC43_IRQ_EXTINT+23) /* Event router interrupt */
#define LPC43M0_IRQ_USART0 (LPC43_IRQ_EXTINT+24) /* USART0 interrupt */
#define LPC43M0_IRQ_UART1 (LPC43_IRQ_EXTINT+25) /* UART1 Modem/UART1 interrupt */
#define LPC43M0_IRQ_USART2 (LPC43_IRQ_EXTINT+26) /* USART2 | C_CAN1 interrupt */
#define LPC43M0_IRQ_CAN1 (LPC43_IRQ_EXTINT+26) /* USART2 | C_CAN1 interrupt */
#define LPC43M0_IRQ_USART3 (LPC43_IRQ_EXTINT+27) /* USART3 interrupt */
#define LPC43M0_IRQ_I2S0 (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_I2S1 (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_QEI (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_CAN0 (LPC43_IRQ_EXTINT+29) /* C_CAN0 interrupt */
#define LPC43_IRQ_NEXTINT (LPC43_IRQ_EXTINT+53)
#define LPC43_IRQ_NIRQS (LPC43_IRQ_EXTINT+LPC43_IRQ_NEXTINT)
/* GPIO interrupts. The LPC43xx supports several interrupts on ports 0 and
* 2 (only). We go through some special efforts to keep the number of IRQs
* to a minimum in this sparse interrupt case.
/* Cortex-M4 GPIO interrupts. The LPC43xx supports several interrupts on ports 0 and 2
* (only). We go through some special efforts to keep the number of IRQs to a minimum in
* this sparse interrupt case.
*
* 28 interrupts on Port 0: p0.0 - p0.11, p0.15-p0.30
* 14 interrupts on Port 2: p2.0 - p2.13
@ -181,102 +141,164 @@
#ifdef CONFIG_GPIO_IRQ
# warning "REVISIT"
# define LPC43_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrrupt set */
# define LPC43_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */
# define LPC43M4_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrrupt set */
# define LPC43M4_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */
/* Set 1: 12 interrupts p0.0-p0.11 */
# define LPC43_VALID_GPIOINT0L (0x00000ffful)
# define LPC43_VALID_SHIFT0L (0)
# define LPC43_VALID_FIRST0L (LPC43_IRQ_EXTINT+LPC43_IRQ_NEXTINT)
# define LPC43M4_VALID_GPIOINT0L (0x00000ffful)
# define LPC43M4_VALID_SHIFT0L (0)
# define LPC43M4_VALID_FIRST0L (LPC43_IRQ_EXTINT+LPC43M4_IRQ_NEXTINT)
# define LPC43_IRQ_P0p0 (LPC43_VALID_FIRST0L+0)
# define LPC43_IRQ_P0p1 (LPC43_VALID_FIRST0L+1)
# define LPC43_IRQ_P0p2 (LPC43_VALID_FIRST0L+2)
# define LPC43_IRQ_P0p3 (LPC43_VALID_FIRST0L+3)
# define LPC43_IRQ_P0p4 (LPC43_VALID_FIRST0L+4)
# define LPC43_IRQ_P0p5 (LPC43_VALID_FIRST0L+5)
# define LPC43_IRQ_P0p6 (LPC43_VALID_FIRST0L+6)
# define LPC43_IRQ_P0p7 (LPC43_VALID_FIRST0L+7)
# define LPC43_IRQ_P0p8 (LPC43_VALID_FIRST0L+8)
# define LPC43_IRQ_P0p9 (LPC43_VALID_FIRST0L+9)
# define LPC43_IRQ_P0p10 (LPC43_VALID_FIRST0L+10)
# define LPC43_IRQ_P0p11 (LPC43_VALID_FIRST0L+11)
# define LPC43_VALID_NIRQS0L (12)
# define LPC43M4_IRQ_P0p0 (LPC43M4_VALID_FIRST0L+0)
# define LPC43M4_IRQ_P0p1 (LPC43M4_VALID_FIRST0L+1)
# define LPC43M4_IRQ_P0p2 (LPC43M4_VALID_FIRST0L+2)
# define LPC43M4_IRQ_P0p3 (LPC43M4_VALID_FIRST0L+3)
# define LPC43M4_IRQ_P0p4 (LPC43M4_VALID_FIRST0L+4)
# define LPC43M4_IRQ_P0p5 (LPC43M4_VALID_FIRST0L+5)
# define LPC43M4_IRQ_P0p6 (LPC43M4_VALID_FIRST0L+6)
# define LPC43M4_IRQ_P0p7 (LPC43M4_VALID_FIRST0L+7)
# define LPC43M4_IRQ_P0p8 (LPC43M4_VALID_FIRST0L+8)
# define LPC43M4_IRQ_P0p9 (LPC43M4_VALID_FIRST0L+9)
# define LPC43M4_IRQ_P0p10 (LPC43M4_VALID_FIRST0L+10)
# define LPC43M4_IRQ_P0p11 (LPC43M4_VALID_FIRST0L+11)
# define LPC43M4_VALID_NIRQS0L (12)
/* Set 2: 16 interrupts p0.15-p0.30 */
# define LPC43_VALID_GPIOINT0H (0x7fff8000ull)
# define LPC43_VALID_SHIFT0H (15)
# define LPC43_VALID_FIRST0H (LPC43_VALID_FIRST0L+LPC43_VALID_NIRQS0L)
# define LPC43M4_VALID_GPIOINT0H (0x7fff8000ull)
# define LPC43M4_VALID_SHIFT0H (15)
# define LPC43M4_VALID_FIRST0H (LPC43M4_VALID_FIRST0L+LPC43M4_VALID_NIRQS0L)
# define LPC43_IRQ_P0p15 (LPC43_VALID_FIRST0H+0)
# define LPC43_IRQ_P0p16 (LPC43_VALID_FIRST0H+1)
# define LPC43_IRQ_P0p17 (LPC43_VALID_FIRST0H+2)
# define LPC43_IRQ_P0p18 (LPC43_VALID_FIRST0H+3)
# define LPC43_IRQ_P0p19 (LPC43_VALID_FIRST0H+4)
# define LPC43_IRQ_P0p20 (LPC43_VALID_FIRST0H+5)
# define LPC43_IRQ_P0p21 (LPC43_VALID_FIRST0H+6)
# define LPC43_IRQ_P0p22 (LPC43_VALID_FIRST0H+7)
# define LPC43_IRQ_P0p23 (LPC43_VALID_FIRST0H+8)
# define LPC43_IRQ_P0p24 (LPC43_VALID_FIRST0H+9)
# define LPC43_IRQ_P0p25 (LPC43_VALID_FIRST0H+10)
# define LPC43_IRQ_P0p26 (LPC43_VALID_FIRST0H+11)
# define LPC43_IRQ_P0p27 (LPC43_VALID_FIRST0H+12)
# define LPC43_IRQ_P0p28 (LPC43_VALID_FIRST0H+13)
# define LPC43_IRQ_P0p29 (LPC43_VALID_FIRST0H+14)
# define LPC43_IRQ_P0p30 (LPC43_VALID_FIRST0H+15)
# define LPC43_VALID_NIRQS0H (16)
# define LPC43M4_IRQ_P0p15 (LPC43M4_VALID_FIRST0H+0)
# define LPC43M4_IRQ_P0p16 (LPC43M4_VALID_FIRST0H+1)
# define LPC43M4_IRQ_P0p17 (LPC43M4_VALID_FIRST0H+2)
# define LPC43M4_IRQ_P0p18 (LPC43M4_VALID_FIRST0H+3)
# define LPC43M4_IRQ_P0p19 (LPC43M4_VALID_FIRST0H+4)
# define LPC43M4_IRQ_P0p20 (LPC43M4_VALID_FIRST0H+5)
# define LPC43M4_IRQ_P0p21 (LPC43M4_VALID_FIRST0H+6)
# define LPC43M4_IRQ_P0p22 (LPC43M4_VALID_FIRST0H+7)
# define LPC43M4_IRQ_P0p23 (LPC43M4_VALID_FIRST0H+8)
# define LPC43M4_IRQ_P0p24 (LPC43M4_VALID_FIRST0H+9)
# define LPC43M4_IRQ_P0p25 (LPC43M4_VALID_FIRST0H+10)
# define LPC43M4_IRQ_P0p26 (LPC43M4_VALID_FIRST0H+11)
# define LPC43M4_IRQ_P0p27 (LPC43M4_VALID_FIRST0H+12)
# define LPC43M4_IRQ_P0p28 (LPC43M4_VALID_FIRST0H+13)
# define LPC43M4_IRQ_P0p29 (LPC43M4_VALID_FIRST0H+14)
# define LPC43M4_IRQ_P0p30 (LPC43M4_VALID_FIRST0H+15)
# define LPC43M4_VALID_NIRQS0H (16)
/* Set 3: 14 interrupts p2.0-p2.13 */
# define LPC43_VALID_GPIOINT2 (0x00003ffful)
# define LPC43_VALID_SHIFT2 (0)
# define LPC43_VALID_FIRST2 (LPC43_VALID_FIRST0H+LPC43_VALID_NIRQS0H)
# define LPC43M4_VALID_GPIOINT2 (0x00003ffful)
# define LPC43M4_VALID_SHIFT2 (0)
# define LPC43M4_VALID_FIRST2 (LPC43M4_VALID_FIRST0H+LPC43M4_VALID_NIRQS0H)
# define LPC43_IRQ_P2p0 (LPC43_VALID_FIRST2+0)
# define LPC43_IRQ_P2p1 (LPC43_VALID_FIRST2+1)
# define LPC43_IRQ_P2p2 (LPC43_VALID_FIRST2+2)
# define LPC43_IRQ_P2p3 (LPC43_VALID_FIRST2+3)
# define LPC43_IRQ_P2p4 (LPC43_VALID_FIRST2+4)
# define LPC43_IRQ_P2p5 (LPC43_VALID_FIRST2+5)
# define LPC43_IRQ_P2p6 (LPC43_VALID_FIRST2+6)
# define LPC43_IRQ_P2p7 (LPC43_VALID_FIRST2+7)
# define LPC43_IRQ_P2p8 (LPC43_VALID_FIRST2+8)
# define LPC43_IRQ_P2p9 (LPC43_VALID_FIRST2+9)
# define LPC43_IRQ_P2p10 (LPC43_VALID_FIRST2+10)
# define LPC43_IRQ_P2p11 (LPC43_VALID_FIRST2+11)
# define LPC43_IRQ_P2p12 (LPC43_VALID_FIRST2+12)
# define LPC43_IRQ_P2p13 (LPC43_VALID_FIRST2+13)
# define LPC43_VALID_NIRQS2 (14)
# define LPC43_NGPIOAIRQS (LPC43_VALID_NIRQS0L+LPC43_VALID_NIRQS0H+LPC43_VALID_NIRQS2)
# define LPC43M4_IRQ_P2p0 (LPC43M4_VALID_FIRST2+0)
# define LPC43M4_IRQ_P2p1 (LPC43M4_VALID_FIRST2+1)
# define LPC43M4_IRQ_P2p2 (LPC43M4_VALID_FIRST2+2)
# define LPC43M4_IRQ_P2p3 (LPC43M4_VALID_FIRST2+3)
# define LPC43M4_IRQ_P2p4 (LPC43M4_VALID_FIRST2+4)
# define LPC43M4_IRQ_P2p5 (LPC43M4_VALID_FIRST2+5)
# define LPC43M4_IRQ_P2p6 (LPC43M4_VALID_FIRST2+6)
# define LPC43M4_IRQ_P2p7 (LPC43M4_VALID_FIRST2+7)
# define LPC43M4_IRQ_P2p8 (LPC43M4_VALID_FIRST2+8)
# define LPC43M4_IRQ_P2p9 (LPC43M4_VALID_FIRST2+9)
# define LPC43M4_IRQ_P2p10 (LPC43M4_VALID_FIRST2+10)
# define LPC43M4_IRQ_P2p11 (LPC43M4_VALID_FIRST2+11)
# define LPC43M4_IRQ_P2p12 (LPC43M4_VALID_FIRST2+12)
# define LPC43M4_IRQ_P2p13 (LPC43M4_VALID_FIRST2+13)
# define LPC43M4_VALID_NIRQS2 (14)
# define LPC43M4_NGPIOAIRQS (LPC43M4_VALID_NIRQS0L+LPC43M4_VALID_NIRQS0H+LPC43M4_VALID_NIRQS2)
#else
# define LPC43_NGPIOAIRQS (0)
# define LPC43M4_NGPIOAIRQS (0)
#endif
/* Total number of IRQ numbers */
/* Total number of IRQ numbers (This will need to be revisited if/when the Cortex-M0 is
* supported
*/
#define NR_IRQS (LPC43_IRQ_EXTINT+LPC43_IRQ_NEXTINT+LPC43_NGPIOAIRQS)
#define NR_IRQS (LPC43_IRQ_EXTINT+LPC43M4_IRQ_NEXTINT+LPC43M4_NGPIOAIRQS)
/****************************************************************************
/* Cortex-M0 External interrupts (vectors >= 16) */
#define LPC43M0_IRQ_RTC (LPC43_IRQ_EXTINT+0) /* RT interrupt */
#define LPC43M0_IRQ_M4CORE (LPC43_IRQ_EXTINT+1) /* Interrupt from the M4 core */
#define LPC43M0_IRQ_DMA (LPC43_IRQ_EXTINT+2) /* DMA interrupt */
#define LPC43M0_IRQ_FLASHEEPROM (LPC43_IRQ_EXTINT+4) /* EEPROM (Bank A or B) | A Timer */
#define LPC43M0_IRQ_ATIMER (LPC43_IRQ_EXTINT+4) /* EEPROM (Bank A or B) | A Timer */
#define LPC43M0_IRQ_ETHERNET (LPC43_IRQ_EXTINT+5) /* Ethernet interrupt */
#define LPC43M0_IRQ_SDIO (LPC43_IRQ_EXTINT+6) /* SDIO interrupt */
#define LPC43M0_IRQ_LCD (LPC43_IRQ_EXTINT+7) /* LCD interrupt */
#define LPC43M0_IRQ_USB0 (LPC43_IRQ_EXTINT+8) /* USB0 OTG interrupt */
#define LPC43M0_IRQ_USB1 (LPC43_IRQ_EXTINT+9) /* USB1 interrupt */
#define LPC43M0_IRQ_SCT (LPC43_IRQ_EXTINT+10) /* SCT combined interrupt */
#define LPC43M0_IRQ_RITIMER (LPC43_IRQ_EXTINT+11) /* RI Timer | WWDT interrupt */
#define LPC43M0_IRQ_WWDT (LPC43_IRQ_EXTINT+11) /* RI Timer | WWDT interrupt */
#define LPC43M0_IRQ_TIMER0 (LPC43_IRQ_EXTINT+12) /* TIMER0 interrupt */
#define LPC43M0_IRQ_GINT1 (LPC43_IRQ_EXTINT+13) /* GINT1 GPIO global interrupt 1 */
#define LPC43M0_IRQ_PININT4 (LPC43_IRQ_EXTINT+14) /* GPIO pin interrupt 4 */
#define LPC43M0_IRQ_TIMER3 (LPC43_IRQ_EXTINT+15) /* TIMER interrupt */
#define LPC43M0_IRQ_MCPWM (LPC43_IRQ_EXTINT+16) /* Motor control PWM interrupt */
#define LPC43M0_IRQ_ADC0 (LPC43_IRQ_EXTINT+17) /* ADC0 interrupt */
#define LPC43M0_IRQ_I2C0 (LPC43_IRQ_EXTINT+18) /* I2C0 | I2C1 interrupt */
#define LPC43M0_IRQ_I2C1 (LPC43_IRQ_EXTINT+18) /* I2C0 | I2C1 interrupt */
#define LPC43M0_IRQ_SGPIO (LPC43_IRQ_EXTINT+19) /* SGPIO interrupt */
#define LPC43M0_IRQ_SPI (LPC43_IRQ_EXTINT+20) /* SPI | DAC interrupt */
#define LPC43M0_IRQ_DAC (LPC43_IRQ_EXTINT+20) /* SPI | DAC interrupt */
#define LPC43M0_IRQ_ADC1 (LPC43_IRQ_EXTINT+21) /* ADC1 interrupt */
#define LPC43M0_IRQ_SSP0 (LPC43_IRQ_EXTINT+22) /* SSP0 | SSP1 interrupt */
#define LPC43M0_IRQ_SSP1 (LPC43_IRQ_EXTINT+22) /* SSP0 | SSP1 interrupt */
#define LPC43M0_IRQ_EVENTROUTER (LPC43_IRQ_EXTINT+23) /* Event router interrupt */
#define LPC43M0_IRQ_USART0 (LPC43_IRQ_EXTINT+24) /* USART0 interrupt */
#define LPC43M0_IRQ_UART1 (LPC43_IRQ_EXTINT+25) /* UART1 Modem/UART1 interrupt */
#define LPC43M0_IRQ_USART2 (LPC43_IRQ_EXTINT+26) /* USART2 | C_CAN1 interrupt */
#define LPC43M0_IRQ_CAN1 (LPC43_IRQ_EXTINT+26) /* USART2 | C_CAN1 interrupt */
#define LPC43M0_IRQ_USART3 (LPC43_IRQ_EXTINT+27) /* USART3 interrupt */
#define LPC43M0_IRQ_I2S0 (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_I2S1 (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_QEI (LPC43_IRQ_EXTINT+28) /* I2S0 | I2S1 | QEI interrupt */
#define LPC43M0_IRQ_CAN0 (LPC43_IRQ_EXTINT+29) /* C_CAN0 interrupt */
#define LPC43M0_IRQ_NEXTINT (30)
#define LPC43M0_IRQ_NIRQS (LPC43_IRQ_EXTINT+LPC43M0_IRQ_NEXTINT)
/* Cortex-M0 GPIO interrupts */
#ifdef CONFIG_GPIO_IRQ
# warning "REVISIT"
# define LPC43M0_NGPIOAIRQS (0)
#else
# define LPC43M0_NGPIOAIRQS (0)
#endif
/* Total number of IRQ numbers (This will need to be revisited if/when the Cortex-M0 is
* supported)
*/
#if 0
#define NR_IRQS (LPC43_IRQ_EXTINT+LPC43M0_IRQ_NEXTINT+LPC43M0_NGPIOAIRQS)
#endif
/********************************************************************************************
* Public Types
****************************************************************************/
********************************************************************************************/
#ifndef __ASSEMBLY__
typedef void (*vic_vector_t)(uint32_t *regs);
#endif
/****************************************************************************
/********************************************************************************************
* Inline functions
****************************************************************************/
********************************************************************************************/
/****************************************************************************
/********************************************************************************************
* Public Variables
****************************************************************************/
********************************************************************************************/
/****************************************************************************
/********************************************************************************************
* Public Function Prototypes
****************************************************************************/
********************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

61
arch/arm/src/lpc43xx/Make.defs Normal file
View File

@ -0,0 +1,61 @@
############################################################################
# arch/arm/src/lpc43xx/Make.defs
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
HEAD_ASRC =
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c \
up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
up_initialize.c up_initialstate.c up_interruptcontext.c \
up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
up_releasepending.c up_releasestack.c up_reprioritizertr.c \
up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
ifeq ($(CONFIG_DEBUG_STACK),y)
CMN_CSRCS += up_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
endif
CHIP_ASRCS =
CHIP_CSRCS =

52
arch/arm/src/lpc43xx/chip.h
View File

@ -46,79 +46,93 @@
#include <arch/lpc43xx/chip.h>
/* Include the chip memory map, pin configuration, and vector definition. These
* header files may or may not be shared between different chips. That decisions
/* For each chip supported in chip.h, the following are provided to customize the
* environment for the specific LPC43XX chip:
*
* Define ARMV7M_PERIPHERAL_INTERRUPTS - This is needed by common/up_vectors.c. This
* definition provides the number of "external" interrupt vectors supported by
* the specific LPC43 chip.
*
* For the Cortex-M3 core, this should always be equal to the value
* LPC43M4_IRQ_NEXTINT defined in include/lpc43xx/irq.h. For the Cortex-M0
* core, this should always be equal to the value LPC43M0_IRQ_NEXTINT defined
* in include/lpc43xx/irq.h (At present, only the Cortex-M4 core is supported)
*
* Include the chip-specific memory map header file, and
* Include the chip-specific pin configuration.
*
* These header files may or may not be shared between different chips. That decisions
* depends on the similarity of the chip peripheral.
*/
#if defined(CONFIG_ARCH_CHIP_LPC4310FBD144)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4310fbd144_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4310FET100)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4310fet100_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4320FBD144)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4320fbd144_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4320FET100)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4320fet100_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4330fbd144_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET100)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4330fet100_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET180)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4330fet180_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET256)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4330fet256_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4350fbd208_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET180)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4350fet180_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET256)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
# include "chip/lpc4350fet256_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4353fbd208_pinconfig.h"
# include "chip/lpc4353fbd208_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4353fet180_pinconfig.h"
# include "chip/lpc4353fet180_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4353fet256_pinconfig.h"
# include "chip/lpc4353fet256_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4357fet180_pinconfig.h"
# include "chip/lpc4357fet180_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4357fbd208_pinconfig.h"
# include "chip/lpc4357fbd208_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4357fet256_pinconfig.h"
# include "chip/lpc4357fet256_vectors.h"
#else
# error "Unsupported LPC43xx chip"
#endif

45
arch/arm/src/lpc43xx/chip/lpc43_gpio.h
View File

@ -45,51 +45,8 @@
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/* Indices */
#deine LPC43_GPIO_PORT0 0
#deine LPC43_GPIO_PORT1 1
#deine LPC43_GPIO_PORT2 2
#deine LPC43_GPIO_PORT3 3
#deine LPC43_GPIO_PORT4 4
#deine LPC43_GPIO_PORT5 5
#deine LPC43_GPIO_PORT6 6
#deine LPC43_GPIO_PORT7 7
#deine LPC43_GPIO_PIN0 0
#deine LPC43_GPIO_PIN1 1
#deine LPC43_GPIO_PIN2 2
#deine LPC43_GPIO_PIN3 3
#deine LPC43_GPIO_PIN4 4
#deine LPC43_GPIO_PIN5 5
#deine LPC43_GPIO_PIN6 6
#deine LPC43_GPIO_PIN7 7
#deine LPC43_GPIO_PIN8 8
#deine LPC43_GPIO_PIN9 9
#deine LPC43_GPIO_PIN10 10
#deine LPC43_GPIO_PIN11 11
#deine LPC43_GPIO_PIN12 12
#deine LPC43_GPIO_PIN13 13
#deine LPC43_GPIO_PIN14 14
#deine LPC43_GPIO_PIN15 15
#deine LPC43_GPIO_PIN16 16
#deine LPC43_GPIO_PIN17 17
#deine LPC43_GPIO_PIN18 18
#deine LPC43_GPIO_PIN19 19
#deine LPC43_GPIO_PIN20 20
#deine LPC43_GPIO_PIN21 21
#deine LPC43_GPIO_PIN22 22
#deine LPC43_GPIO_PIN23 23
#deine LPC43_GPIO_PIN24 24
#deine LPC43_GPIO_PIN25 25
#deine LPC43_GPIO_PIN26 26
#deine LPC43_GPIO_PIN27 27
#deine LPC43_GPIO_PIN28 28
#deine LPC43_GPIO_PIN29 29
#deine LPC43_GPIO_PIN30 30
#deine LPC43_GPIO_PIN31 31
/* Register Offsets *********************************************************************************/
/* Register Offsets *********************************************************************************/
/* Pin interrupt registers (relative to LPC43_GPIOINT_BASE) */

6
arch/arm/src/lpc43xx/chip/lpc43_scu.h
View File

@ -218,7 +218,7 @@
* PF_0 to PF_11
*/
/* Bits 0-4: Same as common bit definitions */
#define SCU_NDPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate.
#define SCU_NDPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate */
/* Bits 6-31: Same as common bit definitions */
/* Pin configuration registers for high-speed pins
*
@ -240,7 +240,7 @@
* P3_3 and pins CLK0 to CLK3
*/
/* Bits 0-4: Same as common bit definitions */
#define SCU_HSPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate.
#define SCU_HSPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate */
/* Bits 6-31: Same as common bit definitions */
/* Pin configuration register for USB1 pins USB1_DP/USB1_DM */
@ -324,7 +324,7 @@
#define SCU_EMCDELAYCLK_SHIFT (0) /* Bits 0-15: EMC_CLKn SDRAM clock output delay */
#define SCU_EMCDELAYCLK_MASK (0xffff << SCU_EMCDELAYCLK_SHIFT)
# define SCU_EMCDELAYCLK(n( ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */
# define SCU_EMCDELAYCLK(n) ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */
/* Bits 16-31: Reserved */
/* Pin interrupt select register 0 */

13
arch/arm/src/lpc43xx/lpc43_config.h
View File

@ -45,6 +45,19 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Required configuration settings */
/* There are two version of the FPU support built into the most NuttX Cortex-M4 ports.
* The current LPC43xx port support only one of these options, the "Non-Lazy Floating
* Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR must be defined
* in *all* LPC43xx configuration files.
*/
#ifndef CONFIG_ARMV7M_CMNVECTOR
# error "CONFIG_ARMV7M_CMNVECTOR must be defined for the LPC43xx"
#endif
/* Are any UARTs enabled? */
#undef HAVE_UART

25
arch/arm/src/lpc43xx/lpc43_gpio.h
View File

@ -41,6 +41,7 @@
********************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
/* Include the chip capabilities and GPIO definitions file */
@ -61,7 +62,7 @@
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* Normal: .MM. .... PPPB BBBB
* Normal: .MMV .... PPPB BBBB
* Interrupt: .MMG GPII PPPB BBBB
*/
@ -83,6 +84,17 @@
#define GPIO_IS_INPUT(p) ((p) & GPIO_MODE_MASK) == GPIO_MODE_OUTPUT)
#define GPIO_IS_INTERRUPT(p) ((p) & GPIO_MODE_MASK) == GPIO_MODE_INTERRUPT)
/* Initial value (for GPIO outputs only)
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* ...V .... .... ....
*/
#define GPIO_VALUE_ONE (1 << 12) /* Bit 12: 1=High */
#define GPIO_VALUE_ZERO (0) /* Bit 12: 0=Low */
/* Group Interrupt Selection (valid only for interrupt GPIO pins):
*
* 1111 1100 0000 0000
@ -212,9 +224,17 @@
* Public Data
********************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/* Base addresses for each GPIO block */
extern const uint32_t g_gpiobase[NUM_GPIO_PORTS];
EXTERN const uint32_t g_gpiobase[NUM_GPIO_PORTS];
/********************************************************************************************
* Public Functions
@ -298,5 +318,6 @@ EXTERN int lpc43_dumpgpio(uint16_t gpiocfg, const char *msg);
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LPC43XX_GPIO_H */

39
arch/arm/src/lpc43xx/lpc43_pinconfig.h
View File

@ -84,16 +84,16 @@
*/
#define PINCONF_FUNC_SHIFT (16) /* Bits 16-18: Alternate function number */
#define PINCONF_FUNC_MASK (7 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC(n) (0 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC0 (1 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC1 (2 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC2 (3 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC3 (4 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC4 (5 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC5 (6 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC6 (7 << PINCONF_MODE_SHIFT)
# define PINCONF_FUNC7 (8 << PINCONF_MODE_SHIFT)
#define PINCONF_FUNC_MASK (7 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC(n) (0 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC0 (1 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC1 (2 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC2 (3 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC3 (4 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC4 (5 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC5 (6 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC6 (7 << PINCONF_FUNC_SHIFT)
# define PINCONF_FUNC7 (8 << PINCONF_FUNC_SHIFT)
/* Pull-up/down resisters. These selections are available for all pins but may not
* make sense for all pins. NOTE: that both pull up and down is not precluded.
@ -121,11 +121,11 @@
*/
#define PINCONF_DRIVE_SHIFT (12) /* Bits 12-13 = Pin drive strength */
#define PINCONF_DRIVE_MASK (3 << PINCONF_MODE_SHIFT)
# define PINCONF_DRIVE_NORMAL (0 << PINCONF_MODE_SHIFT)
# define PINCONF_DRIVE_MEDIUM (1 << PINCONF_MODE_SHIFT)
# define PINCONF_DRIVE_HIGH (2 << PINCONF_MODE_SHIFT)
# define PINCONF_DRIVE_ULTRA (3 << PINCONF_MODE_SHIFT)
#define PINCONF_DRIVE_MASK (3 << PINCONF_DRIVE_SHIFT)
# define PINCONF_DRIVE_NORMAL (0 << PINCONF_DRIVE_SHIFT)
# define PINCONF_DRIVE_MEDIUM (1 << PINCONF_DRIVE_SHIFT)
# define PINCONF_DRIVE_HIGH (2 << PINCONF_DRIVE_SHIFT)
# define PINCONF_DRIVE_ULTRA (3 << PINCONF_DRIVE_SHIFT)
/* Input buffer enable
*
@ -241,6 +241,14 @@
* Public Data
********************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/********************************************************************************************
* Public Functions
********************************************************************************************/
@ -279,5 +287,6 @@ EXTERN int lpc43_dumppinconfig(uint32_t pinconf, const char *msg);
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LPC43XX_PINCONFIG_H */

507
configs/lpc4330-xplorer/README.txt
View File

@ -1,24 +1,25 @@
README
^^^^^^
======
README for NuttX port to the LPC4330-Xplorer board from NGX Technologies
featuring the NXP LPC4330FET100 MCU
Contents
^^^^^^^^
========
LPC4330-Xplorer development board
Development Environment
GNU Toolchain Options
IDEs
NuttX buildroot Toolchain
USB Device Controller Functions
LPC4330-Xplorer Configuration Options
USB Host Configuration
Configurations
- LPC4330-Xplorer development board
- Development Environment
- GNU Toolchain Options
- IDEs
- NuttX buildroot Toolchain
- USB Device Controller Functions
- FPU
- LPC4330-Xplorer Configuration Options
- USB Host Configuration
- Configurations
LPC4330-Xplorer board
^^^^^^^^^^^^^^^^^^^^^
=====================
Memory Map
----------
@ -48,7 +49,7 @@ LPC4330-Xplorer board
The LPC4330-Xplorer default console is the USB1 virtual COM port (VCOM).
Development Environment
^^^^^^^^^^^^^^^^^^^^^^^
=======================
Either Linux or Cygwin on Windows can be used for the development environment.
The source has been built only using the GNU toolchain (see below). Other
@ -56,32 +57,35 @@ Development Environment
environment.
GNU Toolchain Options
^^^^^^^^^^^^^^^^^^^^^
=====================
The NuttX make system has been modified to support the following different
toolchain options.
1. The CodeSourcery GNU toolchain,
2. The devkitARM GNU toolchain,
3. The NuttX buildroot Toolchain (see below).
2. The Atollic Toolchain,
3. The devkitARM GNU toolchain,
4. The NuttX buildroot Toolchain (see below).
All testing has been conducted using the NuttX buildroot toolchain. However,
the make system is setup to default to use the devkitARM toolchain. To use
the CodeSourcery or devkitARM toolchain, you simply need add one of the
following configuration options to your .config (or defconfig) file:
CONFIG_LPC43_CODESOURCERYW=y : CodeSourcery under Windows
CONFIG_LPC43_CODESOURCERYL=y : CodeSourcery under Linux
CONFIG_LPC43_DEVKITARM=y : devkitARM under Windows
CONFIG_LPC43_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
CONFIG_LPC43_CODESOURCERYW=y : CodeSourcery under Windows
CONFIG_LPC43_CODESOURCERYL=y : CodeSourcery under Linux
CONFIG_LPC43_ATOLLIC_LITE=y : The free, "Lite" version of Atollic toolchain under Windows
CONFIG_LPC43_ATOLLIC_PRO=y : The paid, "Pro" version of Atollic toolchain under Windows
CONFIG_LPC43_DEVKITARM=y : devkitARM under Windows
CONFIG_LPC43_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
If you are not using CONFIG_LPC43_BUILDROOT, then you may also have to modify
the PATH in the setenv.h file if your make cannot find the tools.
NOTE: the CodeSourcery (for Windows)and devkitARM are Windows native toolchains.
The CodeSourcey (for Linux) and NuttX buildroot toolchains are Cygwin and/or
Linux native toolchains. There are several limitations to using a Windows based
toolchain in a Cygwin environment. The three biggest are:
NOTE: the CodeSourcery (for Windows), Atollic and devkitARM toolchains are
Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot
toolchains are Cygwin and/or Linux native toolchains. There are several limitations
to using a Windows based toolchain in a Cygwin environment. The three biggest are:
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath' utility
@ -113,16 +117,55 @@ GNU Toolchain Options
If you have problems with the dependency build (for example, if you are not
building on C:), then you may need to modify tools/mkdeps.sh
NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization
The CodeSourcery Toolchain (2009q1)
-----------------------------------
The CodeSourcery toolchain (2009q1) does not work with default optimization
level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with
-Os.
NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that
The Atollic "Pro" and "Lite" Toolchain
--------------------------------------
One problem that I had with the Atollic toolchains is that the provide a gcc.exe
and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path
appears in your PATH variable before /usr/bin, then you will get the wrong gcc
when you try to build host executables. This will cause to strange, uninterpretable
errors build some host binaries in tools/ when you first make.
Also, the Atollic toolchains are the only toolchains that have built-in support for
the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will
need to use the Atollic toolchain for now. See the FPU section below for more
information.
The Atollic "Lite" Toolchain
----------------------------
The free, "Lite" version of the Atollic toolchain does not support C++ nor
does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite"
toolchain, you will have to set:
CONFIG_HAVE_CXX=n
In order to compile successfully. Otherwise, you will get errors like:
"C++ Compiler only available in TrueSTUDIO Professional"
The make may then fail in some of the post link processing because of some of
the other missing tools. The Make.defs file replaces the ar and nm with
the default system x86 tool versions and these seem to work okay. Disable all
of the following to avoid using objcopy:
CONFIG_RRLOAD_BINARY=n
CONFIG_INTELHEX_BINARY=n
CONFIG_MOTOROLA_SREC=n
CONFIG_RAW_BINARY=n
devkitARM
---------
The devkitARM toolchain includes a version of MSYS make. Make sure that the
the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
path or will get the wrong version of make.
IDEs
^^^^
====
NuttX is built using command-line make. It can be used with an IDE, but some
effort will be required to create the project (There is a simple RIDE project
@ -153,7 +196,7 @@ IDEs
is arch/arm/src/lpc17x/lpc17_vectors.S.
NuttX buildroot Toolchain
^^^^^^^^^^^^^^^^^^^^^^^^^
=========================
A GNU GCC-based toolchain is assumed. The files */setenv.sh should
be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
@ -191,183 +234,282 @@ NuttX buildroot Toolchain
NOTE: This is an OABI toolchain.
FPU
===
FPU Configuration Options
-------------------------
There are two version of the FPU support built into the most NuttX Cortex-M4
ports. The current LPC43xx port support only one of these options, the "Non-
Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR
must be defined in *all* LPC43xx configuration files.
1. Lazy Floating Point Register Save.
This is an untested implementation that saves and restores FPU registers
only on context switches. This means: (1) floating point registers are
not stored on each context switch and, hence, possibly better interrupt
performance. But, (2) since floating point registers are not saved,
you cannot use floating point operations within interrupt handlers.
This logic can be enabled by simply adding the following to your .config
file:
CONFIG_ARCH_FPU=y
2. Non-Lazy Floating Point Register Save
Mike Smith has contributed an extensive re-write of the ARMv7-M exception
handling logic. This includes verified support for the FPU. These changes
have not yet been incorporated into the mainline and are still considered
experimental. These FPU logic can be enabled with:
CONFIG_ARCH_FPU=y
CONFIG_ARMV7M_CMNVECTOR=y
You will probably also changes to the ld.script in if this option is selected.
This should work:
-ENTRY(_stext)
+ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
+EXTERN(_vectors) /* Force the vectors to be included in the output */
CFLAGS
------
Only the Atollic toolchain has built-in support for the Cortex-M4 FPU. You will see
the following lines in each Make.defs file:
ifeq ($(CONFIG_LPC43_ATOLLIC_LITE),y)
# Atollic toolchain under Windows
...
ifeq ($(CONFIG_ARCH_FPU),y)
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
else
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
endif
If you are using a toolchain other than the Atollic toolchain, then to use the FPU
you will also have to modify the CFLAGS to enable compiler support for the ARMv7-M
FPU. As of this writing, there are not many GCC toolchains that will support the
ARMv7-M FPU.
As a minimum you will need to add CFLAG options to (1) enable hardware floating point
code generation, and to (2) select the FPU implementation. You might try the same
options as used with the Atollic toolchain in the Make.defs file:
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
Configuration Changes
---------------------
Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2
in order to successfully build NuttX using the Atollic toolchain WITH FPU support:
-CONFIG_ARCH_FPU=n : Enable FPU support
+CONFIG_ARCH_FPU=y
-CONFIG_LPC43_CODESOURCERYW=y : Disable the CodeSourcery toolchain
+CONFIG_LPC43_CODESOURCERYW=n
-CONFIG_LPC43_ATOLLIC_LITE=n : Enable *one* the Atollic toolchains
CONFIG_LPC43_ATOLLIC_PRO=n
-CONFIG_LPC43_ATOLLIC_LITE=y : The "Lite" version, OR
CONFIG_LPC43_ATOLLIC_PRO=y : The "Pro" version (not both)
-CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats
+CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version)
-CONFIG_HAVE_CXX=y : Suppress generation of C++ code
+CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version)
See the section above on Toolchains, NOTE 2, for explanations for some of
the configuration settings. Some of the usual settings are just not supported
by the "Lite" version of the Atollic toolchain.
LPC4330-Xplorer Configuration Options
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
=====================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=lpc43xx
CONFIG_ARCH_CHIP=lpc43xx
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_LPC4330=y
CONFIG_ARCH_CHIP_LPC4330=y
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=lpc4330-xplorer (for the LPC4330-Xplorer board)
CONFIG_ARCH_BOARD=lpc4330-xplorer (for the LPC4330-Xplorer board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_LPC4330_XPLORER=y
CONFIG_ARCH_BOARD_LPC4330_XPLORER=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_DRAM_SIZE - Describes the installed DRAM (CPU SRAM in this case):
CONFIG_DRAM_SIZE - Describes the installed DRAM (CPU SRAM in this case):
CONFIG_DRAM_SIZE=(32*1024) (32Kb)
CONFIG_DRAM_SIZE=(32*1024) (32Kb)
There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1.
There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1.
CONFIG_DRAM_START - The start address of installed DRAM
CONFIG_DRAM_START - The start address of installed DRAM
CONFIG_DRAM_START=0x10000000
CONFIG_DRAM_START=0x10000000
CONFIG_DRAM_END - Last address+1 of installed RAM
CONFIG_DRAM_END - Last address+1 of installed RAM
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO - The LPC43xx supports interrupt prioritization
CONFIG_ARCH_IRQPRIO - The LPC43xx supports interrupt prioritization
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU)
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_FPU=y
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
cause a 100 second delay during boot-up. This 100 second delay
serves no purpose other than it allows you to calibratre
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
Individual subsystems can be enabled:
CONFIG_LPC43_MAINOSC=y
CONFIG_LPC43_PLL0=y
CONFIG_LPC43_PLL1=n
CONFIG_LPC43_ETHERNET=n
CONFIG_LPC43_USBHOST=n
CONFIG_LPC43_USBOTG=n
CONFIG_LPC43_USBDEV=n
CONFIG_LPC43_USART0=y
CONFIG_LPC43_UART1=n
CONFIG_LPC43_USART2=n
CONFIG_LPC43_USART3=n
CONFIG_LPC43_CAN1=n
CONFIG_LPC43_CAN2=n
CONFIG_LPC43_SPI=n
CONFIG_LPC43_SSP0=n
CONFIG_LPC43_SSP1=n
CONFIG_LPC43_I2C0=n
CONFIG_LPC43_I2C1=n
CONFIG_LPC43_I2S=n
CONFIG_LPC43_TMR0=n
CONFIG_LPC43_TMR1=n
CONFIG_LPC43_TMR2=n
CONFIG_LPC43_TMR3=n
CONFIG_LPC43_RIT=n
CONFIG_LPC43_PWM=n
CONFIG_LPC43_MCPWM=n
CONFIG_LPC43_QEI=n
CONFIG_LPC43_RTC=n
CONFIG_LPC43_WDT=n
CONFIG_LPC43_ADC=n
CONFIG_LPC43_DAC=n
CONFIG_LPC43_GPDMA=n
CONFIG_LPC43_FLASH=n
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
cause a 100 second delay during boot-up. This 100 second delay
serves no purpose other than it allows you to calibratre
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
Individual subsystems can be enabled:
CONFIG_LPC43_MAINOSC=y
CONFIG_LPC43_PLL0=y
CONFIG_LPC43_PLL1=n
CONFIG_LPC43_ETHERNET=n
CONFIG_LPC43_USBHOST=n
CONFIG_LPC43_USBOTG=n
CONFIG_LPC43_USBDEV=n
CONFIG_LPC43_USART0=y
CONFIG_LPC43_UART1=n
CONFIG_LPC43_USART2=n
CONFIG_LPC43_USART3=n
CONFIG_LPC43_CAN1=n
CONFIG_LPC43_CAN2=n
CONFIG_LPC43_SPI=n
CONFIG_LPC43_SSP0=n
CONFIG_LPC43_SSP1=n
CONFIG_LPC43_I2C0=n
CONFIG_LPC43_I2C1=n
CONFIG_LPC43_I2S=n
CONFIG_LPC43_TMR0=n
CONFIG_LPC43_TMR1=n
CONFIG_LPC43_TMR2=n
CONFIG_LPC43_TMR3=n
CONFIG_LPC43_RIT=n
CONFIG_LPC43_PWM=n
CONFIG_LPC43_MCPWM=n
CONFIG_LPC43_QEI=n
CONFIG_LPC43_RTC=n
CONFIG_LPC43_WDT=n
CONFIG_LPC43_ADC=n
CONFIG_LPC43_DAC=n
CONFIG_LPC43_GPDMA=n
CONFIG_LPC43_FLASH=n
LPC43xx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the
console and ttys0 (default is the USART0).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the
console and ttys0 (default is the USART0).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
LPC43xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
LPC43xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC43_ETHERNET.
CONFIG_PHY_KS8721 - Selects Micrel KS8721 PHY
CONFIG_PHY_AUTONEG - Enable auto-negotion
CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex
CONFIG_PHY_KS8721 - Selects Micrel KS8721 PHY
CONFIG_PHY_AUTONEG - Enable auto-negotion
CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed.
CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex
CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb
CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_PRIORITY - Ethernet interrupt priority. The is default is
the higest priority.
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
CONFIG_DEBUG.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
Also needs CONFIG_DEBUG.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
CONFIG_NET_MULTICAST - Enable receipt of multicast (and unicast) frames.
CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_PRIORITY - Ethernet interrupt priority. The is default is
the higest priority.
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
CONFIG_DEBUG.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
Also needs CONFIG_DEBUG.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
CONFIG_NET_MULTICAST - Enable receipt of multicast (and unicast) frames.
Automatically set if CONFIG_NET_IGMP is selected.
LPC43xx USB Device Configuration
CONFIG_LPC43_USBDEV_FRAME_INTERRUPT
Handle USB Start-Of-Frame events.
Enable reading SOF from interrupt handler vs. simply reading on demand.
Probably a bad idea... Unless there is some issue with sampling the SOF
from hardware asynchronously.
CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT
Enable high priority interrupts. I have no idea why you might want to
do that
CONFIG_LPC43_USBDEV_NDMADESCRIPTORS
Number of DMA descriptors to allocate in SRAM.
CONFIG_LPC43_USBDEV_DMA
Enable lpc17xx-specific DMA support
CONFIG_LPC43_USBDEV_FRAME_INTERRUPT
Handle USB Start-Of-Frame events.
Enable reading SOF from interrupt handler vs. simply reading on demand.
Probably a bad idea... Unless there is some issue with sampling the SOF
from hardware asynchronously.
CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT
Enable high priority interrupts. I have no idea why you might want to
do that
CONFIG_LPC43_USBDEV_NDMADESCRIPTORS
Number of DMA descriptors to allocate in SRAM.
CONFIG_LPC43_USBDEV_DMA
Enable lpc17xx-specific DMA support
CONFIG_LPC43_USBDEV_NOVBUS
Define if the hardware implementation does not support the VBUS signal
CONFIG_LPC43_USBDEV_NOLED
@ -391,7 +533,7 @@ LPC4330-Xplorer Configuration Options
reside in AHB SRAM.
USB Host Configuration
^^^^^^^^^^^^^^^^^^^^^^
======================
The LPC4330-Xplorer board supports a USB host interface. The hidkbd
example can be used to test this interface.
@ -426,23 +568,54 @@ Files on the connect USB flash device should then be accessible under
the mountpoint /mnt/flash.
Configurations
^^^^^^^^^^^^^^
==============
Each LPC4330-Xplorer configuration is maintained in a sudirectory and can be selected
as follow:
cd tools
./configure.sh lpc4330-xplorer/<subdir>
cd -
. ./setenv.sh
cd tools
./configure.sh lpc4330-xplorer/<subdir>
cd -
. ./setenv.sh
Where <subdir> is one of the following:
hidkbd:
ostest:
------
This configuration directory, performs a simple OS test using
examples/ostest. By default, this project assumes that you are
using the DFU bootloader.
CONFIG_LPC43_CODESOURCERYW=y : CodeSourcery under Windows
This configuration directory, performs a simple test of the USB host
HID keyboard class driver using the test logic in examples/hidkbd.
nsh:
Configures the NuttShell (nsh) located at examples/nsh. The
Configuration enables only the serial NSH interfaces. See notes
above for enabling USB host support in this configuration.
If you use the Atollic toolchain, then the FPU test can be enabled in the
examples/ostest by adding the following your NuttX configuration file:
-CONFIG_ARCH_FPU=n : Enable FPU support
+CONFIG_ARCH_FPU=y
-CONFIG_LPC43_CODESOURCERYW=y : Disable the CodeSourcery toolchain
+CONFIG_LPC43_CODESOURCERYW=n
-CONFIG_LPC43_ATOLLIC_LITE=n : Enable *one* the Atollic toolchains
CONFIG_LPC43_ATOLLIC_PRO=n
-CONFIG_LPC43_ATOLLIC_LITE=y : The "Lite" version, OR
CONFIG_LPC43_ATOLLIC_PRO=n : The "Pro" version (only one)
-CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats
+CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version)
-CONFIG_HAVE_CXX=y : Suppress generation of C++ code
+CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version)
-CONFIG_SCHED_WAITPID=y : Enable the waitpid() API needed by the FPU test
+CONFIG_SCHED_WAITPID=n
The FPU test also needs to know the size of the FPU registers save area in
bytes (see arch/arm/include/armv7-m/irq_lazyfpu.h):
+CONFIG_EXAMPLES_OSTEST_FPUSIZE=(4*33)

68
configs/lpc4330-xplorer/include/board.h
View File

@ -129,27 +129,51 @@
#define BOARD_FLASHCFG_VALUE 0x0000303a
/* LED definitions *********************************************************/
/* The Lincoln 80 has 2 LEDs along the bottom of the board. Green or off.
* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows
* for NuttX debug functionality (where NC means "No Change").
/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
* schematic and on but referred to has LED1 and LED2 here, respectively.
*
* During the boot phases. LED1 and LED2 will show boot status.
* LED1 D2 GPIO1[12]
* LED2 D3 GPIO1[11]
*
* LEDs are pulled high to a low output illuminates the LED.
*
* LED index values for use with lpc43_setled()
*/
/* LED1 LED2 */
#define LED_STARTED 0 /* OFF OFF */
#define LED_HEAPALLOCATE 1 /* GREEN OFF */
#define LED_IRQSENABLED 2 /* OFF GREEN */
#define LED_STACKCREATED 3 /* OFF OFF */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_NLEDS 2
/* LED bits for use with lpc43_setleds() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows
* for NuttX debug functionality (where NC means "No Change"). If
* CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under
* control of the application. The following interfaces are then available
* for application control of the LEDs:
*
* void lpc43_ledinit(void);
* void lpc43_setled(int led, bool ledon);
* void lpc43_setleds(uint8_t ledset);
*/
/* ON OFF */
/* LED1 LED2 LED1 LED2 */
#define LED_STARTED 0 /* OFF OFF - - */
#define LED_HEAPALLOCATE 1 /* ON OFF - - */
#define LED_IRQSENABLED 1 /* ON OFF - - */
#define LED_STACKCREATED 1 /* ON OFF - - */
#define LED_INIRQ 2 /* NC ON NC OFF */
#define LED_SIGNAL 2 /* NC ON NC OFF */
#define LED_ASSERTION 2 /* NC ON NC OFF */
#define LED_PANIC 2 /* NC ON NC OFF */
/* After the system is booted, this logic will no longer use LEDs 1 & 2.
* They are available for use the application software using lpc43_led
* (prototyped below)
*/
/* LED1 LED2 LED3 LED4 */
#define LED_INIRQ 4 /* NC NC NC ON (momentary) */
#define LED_SIGNAL 5 /* NC NC NC ON (momentary) */
#define LED_ASSERTION 6 /* NC NC NC ON (momentary) */
#define LED_PANIC 7 /* NC NC NC ON (1Hz flashing) */
#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1
@ -201,16 +225,20 @@ extern "C" {
EXTERN void lpc43_boardinitialize(void);
/****************************************************************************
* Name: lpc43_led
/*****************************************************************************
* Name: lpc43_ledinit, lpc43_setled, and lpc43_setleds
*
* Description:
* Once the system has booted, these functions can be used to control LEDs 1 & 2
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the following interfaces
* are available to control the LEDs from user applications.
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_ARCH_LEDS
EXTERN void lpc43_led(int lednum, int state);
#ifndef CONFIG_ARCH_LEDS
EXTERN void lpc43_ledinit(void);
EXTERN void lpc43_setled(int led, bool ledon);
EXTERN void lpc43_setleds(uint8_t ledset);
#endif
#undef EXTERN

35
configs/lpc4330-xplorer/ostest/Make.defs
View File

@ -40,15 +40,39 @@ include ${TOPDIR}/.config
ifeq ($(CONFIG_LPC43_CODESOURCERYW),y)
# CodeSourcery under Windows
CROSSDEV = arm-none-eabi-
ARCROSSDEV = arm-none-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
endif
ifeq ($(CONFIG_LPC43_CODESOURCERYL),y)
# CodeSourcery under Linux
CROSSDEV = arm-none-eabi-
ARCROSSDEV = arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
MAXOPTIMIZATION = -O2
endif
ifeq ($(CONFIG_LPC43_ATOLLIC_LITE),y)
# Atollic toolchain under Windows
CROSSDEV = arm-atollic-eabi-
ARCROSSDEV =
WINTOOL = y
ifeq ($(CONFIG_ARCH_FPU),y)
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
else
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
endif
ifeq ($(CONFIG_LPC43_ATOLLIC_PRO),y)
# Atollic toolchain under Windows
CROSSDEV = arm-atollic-eabi-
ARCROSSDEV = arm-atollic-eabi-
WINTOOL = y
ifeq ($(CONFIG_ARCH_FPU),y)
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
else
ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
endif
endif
ifeq ($(CONFIG_LPC43_DEVKITARM),y)
# devkitARM under Windows
CROSSDEV = arm-eabi-
@ -58,6 +82,7 @@ endif
ifeq ($(CONFIG_LPC43_BUILDROOT),y)
# NuttX buildroot under Linux or Cygwin
CROSSDEV = arm-elf-
ARCROSSDEV = arm-elf-
ARCHCPUFLAGS = -mtune=cortex-m4 -march=armv7-m -mfloat-abi=soft
MAXOPTIMIZATION = -Os
endif
@ -69,22 +94,22 @@ ifeq ($(WINTOOL),y)
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ramconfig.ld}"
MAXOPTIMIZATION = -O2
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps.sh
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ramconfig.ld
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
@ -98,7 +123,7 @@ else
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
ARCHWARNINGSXX = -Wall -Wshadow
ARCHDEFINES =

14
configs/lpc4330-xplorer/ostest/defconfig
View File

@ -52,7 +52,9 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_IRQPRIO - The ST32F103Z supports interrupt prioritization
# CONFIG_ARCH_IRQPRIO - The Cortex-M4 supports interrupt prioritization
# CONFIG_ARCH_FPU - The Cortex-M4 supports a floating point unit (FPU)
# (But, unfortunately, most versions of GCC do not support it).
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
# stack in bytes. If not defined, the user task stacks will be
@ -68,6 +70,9 @@
# the 100 second delay then adjust CONFIG_BOARD_LOOPSPERMSEC until
# the delay actually is 100 seconds.
# CONFIG_ARCH_DMA - Support DMA initialization
# CONFIG_ARMV7M_CMNVECTOR - This must be defined to indicate that the
# LPC43xx port using the ARMv7 common vector logic. There are two
# variants
#
CONFIG_ARCH=arm
CONFIG_ARCH_ARM=y
@ -81,6 +86,7 @@ CONFIG_DRAM_SIZE=(128*1024)
CONFIG_DRAM_START=0x10000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_FPU=n
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_BOOTLOADER=n
@ -92,8 +98,10 @@ CONFIG_ARCH_DMA=n
#
# Identify toolchain and linker options
#
CONFIG_LPC43_CODESOURCERYW=n
CONFIG_LPC43_CODESOURCERYL=y
CONFIG_LPC43_CODESOURCERYW=y
CONFIG_LPC43_CODESOURCERYL=n
CONFIG_LPC43_ATOLLIC_LITE=n
CONFIG_LPC43_ATOLLIC_PRO=n
CONFIG_LPC43_DEVKITARM=n
CONFIG_LPC43_BUILDROOT=n

20
configs/lpc4330-xplorer/ostest/setenv.sh
View File

@ -47,12 +47,24 @@ if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# TOOLCHAIN_BIN must be defined to the full path to the location where you
# have installed the toolchain of your choice. Modify the following:
# This the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# These are the Cygwin paths to the locations where I installed the Atollic
# toolchain under windows. You will also have to edit this if you install
# the Atollic toolchain in any other location. /usr/bin is added before
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
# at those locations as well.
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
# Andd add the toolchain path to the PATH variable
# This the Cygwin path to the location where I build the buildroot
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
# Andd add the selected toolchain path to the PATH variable
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

122
configs/lpc4330-xplorer/scripts/ramconfig.ld Normal file
View File

@ -0,0 +1,122 @@
/****************************************************************************
* configs/lpc4330-xplorer/scripts/ramconfig.ld
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The LPC4330 on the LPC4330-Xplorer has the following memory resources:
*
* 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000
* 2. 264KB of total SRAM:
* a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000
* b. 72KB beginning at address 0x1008:0000 and
* c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000,
* 0x2000:8000 and 0x2000:C000.
*
* Here we assume that:
*
* 1. We will be running out of SRAM at 0x1000:0000, and
* 2. All .data and .bss will all fit into the 72KB SRAM block.
*
* NOTE: That initialized data is kept in the program memory SRAM and copied
* to .data SRAM. This is wasteful and unnecessary but provides a good test
* for future, FLASH-resident code.
*/
MEMORY
{
progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K
datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* Force the vectors to be included in the output */
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
_eronly = ABSOLUTE(.); /* See below */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > datamem AT > progmem
.ARM.extab : {
*(.ARM.extab*)
} >datamem
.ARM.exidx : {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} >datamem
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > datamem
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

38
configs/lpc4330-xplorer/scripts/ld.script → configs/lpc4330-xplorer/scripts/spificonfig.ld
View File

@ -1,5 +1,5 @@
/****************************************************************************
* configs/lpc4330-xplorer/scripts/ld.script
* configs/lpc4330-xplorer/scripts/spiconfig.ld
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,22 +33,30 @@
*
****************************************************************************/
/* The LPC4330 on the LPC4330-Xplorer has 4096Kb of SPIFI FLASH beginning at
* address 0x1400:0000 and 264K of total SRAM: 128Kb of SRAM in the CPU block
* beginning at address 0x1000:0000, 72Kb beginning at address 0x1008:0000 and
* 64Kb of AHB SRAM in three banks beginning at addresses 0x2000:0000,
* 0x2000:8000 and 0x2000:C000. Here we assume that .data and .bss will all
* fit into the 128Kb CPU SRAM address range.
/* The LPC4330 on the LPC4330-Xplorer has the following memory resources:
*
* 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000
* 2. 264KB of total SRAM:
* a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000
* b. 72KB beginning at address 0x1008:0000 and
* c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000,
* 0x2000:8000 and 0x2000:C000.
*
* Here we assume that:
*
* 1. We will be running out of SPIFI flash at 0x1400:0000, and
* 2. All .data and .bss will all fit into the 128KB CPU SRAM block.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x1c000000, LENGTH = 1024K
sram (rwx) : ORIGIN = 0x10000000, LENGTH = 96K
progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K
datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* Force the vectors to be included in the output */
SECTIONS
{
.text : {
@ -65,7 +73,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
} > progmem
_eronly = ABSOLUTE(.); /* See below */
@ -75,17 +83,17 @@ SECTIONS
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
} > datamem AT > progmem
.ARM.extab : {
*(.ARM.extab*)
} >sram
} >datamem
.ARM.exidx : {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} >sram
} >datamem
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
@ -93,7 +101,7 @@ SECTIONS
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
} > datamem
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }

18
configs/lpc4330-xplorer/src/Makefile
View File

@ -38,18 +38,28 @@
CFLAGS += -I$(TOPDIR)/sched
ASRCS =
CSRCS = up_boot.c up_leds.c
CSRCS = up_boot.c
ifeq ($(CONFIG_NSH_ARCHINIT),y)
CSRCS += up_nsh.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += up_usbmsc.c
ifeq ($(CONFIG_ARCH_FPU),y)
CSRCS += up_ostest.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += up_autoleds.c
else
CSRCS += up_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += up_buttons.c
CSRCS += up_buttons.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += up_usbmsc.c
endif
AOBJS = $(ASRCS:.S=$(OBJEXT))

186
configs/lpc4330-xplorer/src/up_leds.c → configs/lpc4330-xplorer/src/up_autoleds.c
View File

@ -1,6 +1,6 @@
/****************************************************************************
* configs/lpc4330-xplorer/src/up_leds.c
* arch/arm/src/board/up_leds.c
* configs/lpc4330-xplorer/src/up_autoleds.c
* arch/arm/src/board/up_autoleds.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -50,28 +50,57 @@
#include "up_arch.h"
#include "up_internal.h"
#include "lpc43_internal.h"
#include "lpc4330_xplorer_internal.h"
#include "xplorer_internal.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Definitions
****************************************************************************/
/* LED definitions **********************************************************/
/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
* schematic and on but referred to has LED1 and LED2 here, respectively.
*
* LED1 D2 GPIO1[12]
* LED2 D3 GPIO1[11]
*
* LEDs are pulled high to a low output illuminates the LED.
*
* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows
* for NuttX debug functionality (where NC means "No Change").
*
* ON OFF
* LED1 LED2 LED1 LED2
* LED_STARTED 0 OFF OFF - -
* LED_HEAPALLOCATE 1 ON OFF - -
* LED_IRQSENABLED 1 ON OFF - -
* LED_STACKCREATED 1 ON OFF - -
* LED_INIRQ 2 NC ON NC OFF
* LED_SIGNAL 2 NC ON NC OFF
* LED_ASSERTION 2 NC ON NC OFF
* LED_PANIC 2 NC ON NC OFF
*
* If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under
* control of the application. The following interfaces are then available
* for application control of the LEDs:
*
* void lpc43_ledinit(void);
* void lpc43_setled(int led, bool ledon);
* void lpc43_setleds(uint8_t ledset);
*/
/* Debug definitions ********************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG with
* CONFIG_DEBUG_VERBOSE too)
*/
#undef LED_DEBUG /* Define to enable debug */
#undef LED_VERBOSE /* Define to enable verbose debug */
#ifdef LED_DEBUG
#ifdef CONFIG_DEBUG_LED
# define leddbg lldbg
# ifdef LED_VERBOSE
# ifdef CONFIG_DEBUG_VERBOSE
# define LED_VERBOSE 1
# define ledvdbg lldbg
# else
# undef LED_VERBOSE
# define ledvdbg(x...)
# endif
#else
@ -80,43 +109,28 @@
# define ledvdbg(x...)
#endif
/* Dump GPIO registers */
#ifdef LED_VERBOSE
# define led_dumpgpio(m) lpc43_dumpgpio(LPC4330_XPLORER_LED2, m)
#else
# define led_dumpgpio(m)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* LED definitions ******************************************************************
The LPC4330-Xplorer has 2 LEDs along the bottom of the board. Green or off.
If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows for NuttX
debug functionality (where NC means "No Change").
During the boot phases. LED1 and LED2 will show boot status.
LED1 LED2
STARTED OFF OFF
HEAPALLOCATE BLUE OFF
IRQSENABLED OFF BLUE
STACKCREATED OFF OFF
After the system is booted, this logic will no longer use LEDs 1 & 2. They
are available for use by applications using lpc43_led (prototyped below)
*/
static bool g_initialized;
static int g_nestcount;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_dumppins
****************************************************************************/
#ifdef LED_VERBOSE
static void led_dumppins(FAR const char *msg)
{
lpc43_dumppinconfig(PINCONFIG_LED1, msg);
lpc43_dumpgpio(GPIO_LED2, msg);
}
#else
# define led_dumppins(m)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@ -127,14 +141,19 @@ static int g_nestcount;
void up_ledinit(void)
{
/* Configure all LED GPIO lines */
/* Configure all LED pins as GPIO outputs */
led_dumpgpio("up_ledinit() Entry)");
led_dumppins("up_ledinit() Entry)");
lpc43_configgpio(LPC4330_XPLORER_LED1);
lpc43_configgpio(LPC4330_XPLORER_LED2);
/* Configure LED pins as GPIOs, then configure GPIOs as outputs */
led_dumpgpio("up_ledinit() Exit");
lpc43_pinconfig(PINCONFIG_LED1);
lpc43_gpioconfig(GPIO_LED1);
lpc43_pinconfig(PINCONFIG_LED2);
lpc43_gpioconfig(GPIO_LED2);
led_dumppins("up_ledinit() Exit");
}
/****************************************************************************
@ -143,44 +162,22 @@ void up_ledinit(void)
void up_ledon(int led)
{
/* We will control LED1 and LED2 not yet completed the boot sequence. */
if (!g_initialized)
{
int led1 = 0;
int led2 = 0;
switch (led)
{
case LED_STACKCREATED:
g_initialized = true;
case LED_STARTED:
default:
break;
case LED_HEAPALLOCATE:
led1 = 1;
break;
case LED_IRQSENABLED:
led2 = 1;
}
lpc43_led(LPC4330_XPLORER_LED1,led1);
lpc43_led(LPC4330_XPLORER_LED2,led2);
}
/* We will always control the HB LED */
switch (led)
{
case LED_INIRQ:
case LED_SIGNAL:
case LED_ASSERTION:
case LED_PANIC:
lpc43_gpiowrite(LPC4330_XPLORER_HEARTBEAT, false);
g_nestcount++;
default:
case 0:
lpc43_gpiowrite(GPIO_LED1, true); /* LED1 OFF */
lpc43_gpiowrite(GPIO_LED2, true); /* LED2 OFF */
break;
default:
break;
case 1:
lpc43_gpiowrite(GPIO_LED1, false); /* LED1 ON */
lpc43_gpiowrite(GPIO_LED2, true); /* LED2 OFF */
break;
case 2:
lpc43_gpiowrite(GPIO_LED2, false); /* LED2 ON */
break;
}
}
@ -190,30 +187,17 @@ void up_ledon(int led)
void up_ledoff(int led)
{
/* In all states, OFF can only mean turning off the HB LED */
switch (led)
{
default:
case 0:
case 1:
break;
if (g_nestcount <= 1)
{
lpc43_led(LPC4330_XPLORER_HEARTBEAT, true);
g_nestcount = 0;
}
else
{
g_nestcount--;
case 2:
lpc43_gpiowrite(GPIO_LED2, true); /* LED2 OFF */
break;
}
}
/************************************************************************************
* Name: lpc43_led
*
* Description:
* Once the system has booted, these functions can be used to control the LEDs
*
************************************************************************************/
void lpc43_led(int lednum, int state)
{
lpc43_gpiowrite(lednum, state);
}
#endif /* CONFIG_ARCH_LEDS */

3
configs/lpc4330-xplorer/src/up_boot.c
View File

@ -47,8 +47,7 @@
#include "up_arch.h"
#include "up_internal.h"
#include "lpc43_internal.h"
#include "lpc4330_xplorer_internal.h"
#include "xplorer_internal.h"
/************************************************************************************
* Definitions

3
configs/lpc4330-xplorer/src/up_buttons.c
View File

@ -47,8 +47,7 @@
#include <arch/board/board.h>
#include "lpc43_internal.h"
#include "lpc4330_xplorer_internal.h"
#include "xplorer_internal.h"
#ifdef CONFIG_ARCH_BUTTONS

114
configs/lpc4330-xplorer/src/up_ostest.c Normal file
View File

@ -0,0 +1,114 @@
/************************************************************************************
* configs/lpc4330-xplorer/src/up_ostest.c
* arch/arm/src/board/up_ostest.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <debug.h>
#include <arch/irq.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "xplorer-internal.h"
/************************************************************************************
* Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#undef HAVE_FPU
#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \
defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \
!defined(CONFIG_ARMV7M_CMNVECTOR)
# define HAVE_FPU 1
#endif
#ifdef HAVE_FPU
#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
static uint32_t g_saveregs[XCPTCONTEXT_REGS];
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return
* the current FPU registers.
*/
void arch_getfpu(FAR uint32_t *fpusave)
{
irqstate_t flags;
/* Take a snapshot of the thread context right now */
flags = irqsave();
up_saveusercontext(g_saveregs);
/* Return only the floating register values */
memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
irqrestore(flags);
}
/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function
* will compare them and return true if they are identical.
*/
bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
{
return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
}
#endif /* HAVE_FPU */

157
configs/lpc4330-xplorer/src/up_userleds.c Normal file
View File

@ -0,0 +1,157 @@
/****************************************************************************
* configs/lpc4330-xplorer/src/up_userleds.c
* arch/arm/src/board/up_userleds.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "xplorer_internal.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Definitions
****************************************************************************/
/* LED definitions **********************************************************/
/* The LPC4330-Xplorer has 2 user-controllable LEDs labeled D2 an D3 in the
* schematic and on but referred to has LED1 and LED2 here, respectively.
*
* LED1 D2 GPIO1[12]
* LED2 D3 GPIO1[11]
*
* LEDs are pulled high to a low output illuminates the LED.
*/
/* Debug definitions ********************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG with
* CONFIG_DEBUG_VERBOSE too)
*/
#ifdef CONFIG_DEBUG_LED
# define leddbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define LED_VERBOSE 1
# define ledvdbg lldbg
# else
# undef LED_VERBOSE
# define ledvdbg(x...)
# endif
#else
# undef LED_VERBOSE
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_dumppins
****************************************************************************/
#ifdef LED_VERBOSE
static void led_dumppins(FAR const char *msg)
{
lpc43_dumppinconfig(PINCONFIG_LED1, msg);
lpc43_dumpgpio(GPIO_LED2, msg);
}
#else
# define led_dumppins(m)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lpc43_ledinit
****************************************************************************/
void lpc43_ledinit(void)
{
/* Configure all LED GPIO lines */
led_dumppins("lpc43_ledinit() Entry)");
/* Configure LED pins as GPIOs, then configure GPIOs as outputs */
lpc43_pinconfig(PINCONFIG_LED1);
lpc43_gpioconfig(GPIO_LED1);
lpc43_pinconfig(PINCONFIG_LED2);
lpc43_gpioconfig(GPIO_LED2);
led_dumppins("lpc43_ledinit() Exit");
}
/****************************************************************************
* Name: lpc43_setled
****************************************************************************/
void lpc43_setled(int led, bool ledon)
{
uint16_t gpiocfg = (led == BOARD_LED1 ? BOARD_LED1 : BOARD_LED2);
lpc43_gpiowrite(GPIO_LED1, !ledon);
}
/****************************************************************************
* Name: lpc43_setleds
****************************************************************************/
void lpc43_setleds(uint8_t ledset)
{
lpc43_gpiowrite(BOARD_LED1, (ledset & BOARD_LED1_BIT) == 0);
lpc43_gpiowrite(BOARD_LED2, (ledset & BOARD_LED2_BIT) == 0);
}
#endif /* !CONFIG_ARCH_LEDS */

35
configs/lpc4330-xplorer/src/lpc4330_xplorer_internal.h → configs/lpc4330-xplorer/src/xplorer_internal.h
View File

@ -1,6 +1,6 @@
/****************************************************************************
* configs/lpc4330-xplorer/src/lpc4330_xplorer_internal.h
* arch/arm/src/board/lpc4330-xplorer_internal.n
* configs/lpc4330-xplorer/src/xplorer_internal.h
* arch/arm/src/board/xplorer_internal.n
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -34,8 +34,8 @@
*
****************************************************************************/
#ifndef _CONFIGS_LPC4330_XPLORER_SRC_LPC4330_XPLORER_INTERNAL_H
#define _CONFIGS_LPC4330_XPLORER_SRC_LPC4330_XPLORER_INTERNAL_H
#ifndef _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_INTERNAL_H
#define _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_INTERNAL_H
/****************************************************************************
* Included Files
@ -44,6 +44,9 @@
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include "lpc43_pinconfig.h"
#include "lpc43_gpio.h"
/****************************************************************************
* Definitions
****************************************************************************/
@ -55,14 +58,20 @@
* gpio1[11] - LED D3 J10-17 LED2
****************************************************************************/
#define LPC4330_XPLORER_LED1 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN12)
#define LPC4330_XPLORER_LED1_OFF LPC4330_XPLORER_LED1
#define LPC4330_XPLORER_LED1_ON (LPC4330_XPLORER_LED1 | GPIO_VALUE_ONE)
#define LPC4330_XPLORER_LED2 (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN11)
#define LPC4330_XPLORER_LED2_OFF LPC4330_XPLORER_LED2
#define LPC4330_XPLORER_LED2_ON (LPC4330_XPLORER_LED2 | GPIO_VALUE_ONE)
/* Definitions to configure LED pins as GPIOs:
*
* - Floating
* - Normal drive
* - No buffering, glitch filtering, slew=slow
*/
#define LPC4330_XPLORER_HEARTBEAT LPC4330_XPLORER_LED2
#define PINCONFIG_LED1 PINCONF_GPIO1p12
#define PINCONFIG_LED2 PINCONF_GPIO1p11
/* Definitions to configure LED GPIOs as outputs */
#define GPIO_LED1 (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN12)
#define GPIO_LED2 (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN11)
/****************************************************************************
* Buttons GPIO PIN SIGNAL NAME
@ -70,7 +79,7 @@
* gpio0[7] - User Button SW2 J8-25 BTN1
****************************************************************************/
#define LPC4330_XPLORER_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN7)
#define LPC4330_XPLORER_BUT1 (GPIO_INTBOTH | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN7)
/* Button IRQ numbers */
@ -101,4 +110,4 @@
extern void weak_function lpc43_sspinitialize(void);
#endif /* __ASSEMBLY__ */
#endif /* _CONFIGS_LPC4330_XPLORER_SRC_LPC4330_XPLORER_INTERNAL_H */
#endif /* _CONFIGS_LPC4330_XPLORER_SRC_XPLORER_INTERNAL_H */

2
configs/stm3240g-eval/README.txt
View File

@ -64,7 +64,7 @@ GNU Toolchain Options
the setenv.h file if your make cannot find the tools.
NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are
Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot
Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot
toolchains are Cygwin and/or Linux native toolchains. There are several limitations
to using a Windows based toolchain in a Cygwin environment. The three biggest are: