STM32F0: type of regval should be uint32_t in clockconfig(). Fix a warning from __start().
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cd62425433
@ -69,16 +69,16 @@
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void stm32f0_clockconfig(void)
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void stm32f0_clockconfig(void)
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{
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{
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int regval;
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uint32_t regval;
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/* Verify if PLL is already setup, if so define to use HSI mode */
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/* Verify if PLL is already setup. If so configure to use HSI mode */
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if ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) == RCC_CFGR_SWS_PLL)
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if ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) == RCC_CFGR_SWS_PLL)
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{
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{
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/* Select HSI mode */
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/* Select HSI mode */
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regval = getreg32(STM32F0_RCC_CFGR);
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regval = getreg32(STM32F0_RCC_CFGR);
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regval &= (uint32_t) (~RCC_CFGR_SW_MASK);
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regval &= ~RCC_CFGR_SW_MASK;
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putreg32(regval, STM32F0_RCC_CFGR);
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putreg32(regval, STM32F0_RCC_CFGR);
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while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_HSI);
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while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_HSI);
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@ -87,7 +87,7 @@ void stm32f0_clockconfig(void)
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/* Disable the PLL */
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/* Disable the PLL */
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regval = getreg32(STM32F0_RCC_CR);
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regval = getreg32(STM32F0_RCC_CR);
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regval &= (uint32_t)(~RCC_CR_PLLON);
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regval &= ~RCC_CR_PLLON;
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putreg32(regval, STM32F0_RCC_CR);
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putreg32(regval, STM32F0_RCC_CR);
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while ((getreg32(STM32F0_RCC_CR) & RCC_CR_PLLRDY) != 0);
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while ((getreg32(STM32F0_RCC_CR) & RCC_CR_PLLRDY) != 0);
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@ -108,7 +108,7 @@ void stm32f0_clockconfig(void)
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/* Configure to use the PLL */
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/* Configure to use the PLL */
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regval = getreg32(STM32F0_RCC_CFGR);
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regval = getreg32(STM32F0_RCC_CFGR);
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regval |= (uint32_t)(RCC_CFGR_SW_PLL);
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regval |= RCC_CFGR_SW_PLL;
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putreg32(regval, STM32F0_RCC_CFGR);
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putreg32(regval, STM32F0_RCC_CFGR);
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while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SW_MASK) != RCC_CFGR_SW_PLL);
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while ((getreg32(STM32F0_RCC_CFGR) & RCC_CFGR_SW_MASK) != RCC_CFGR_SW_PLL);
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}
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}
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@ -52,10 +52,7 @@
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#include "stm32f0_clockconfig.h"
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#include "stm32f0_clockconfig.h"
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#include "stm32f0_lowputc.h"
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#include "stm32f0_lowputc.h"
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#include "stm32f0_start.h"
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#ifdef CONFIG_ARCH_FPU
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# include "nvic.h"
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#endif
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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76
arch/arm/src/stm32f0/stm32f0_start.h
Normal file
76
arch/arm/src/stm32f0/stm32f0_start.h
Normal file
@ -0,0 +1,76 @@
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/************************************************************************************
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* arch/arm/src/stm32f0/stm32f0_start.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F0_STM32F0_START_H
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#define __ARCH_ARM_SRC_STM32F0_STM32F0_START_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32f0_boardinitialize
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*
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* Description:
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* All STM32 architectures must provide the following entry point. This entry
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* point is called early in the intitialization -- after all memory has been
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* configured and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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void stm32f0_boardinitialize(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32F0_STM32F0_START_H */
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@ -48,15 +48,20 @@ if [ -z "${PATH_ORIG}" ]; then
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export PATH_ORIG="${PATH}"
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export PATH_ORIG="${PATH}"
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fi
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fi
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# This is the Cygwin path to the location where I installed the RIDE
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# toolchain under windows. You will also have to edit this if you install
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# the RIDE toolchain in any other location
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#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
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# This is the Cygwin path to the location where I installed the CodeSourcery
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# This is the Cygwin path to the location where I installed the CodeSourcery
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# toolchain under windows. You will also have to edit this if you install
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# toolchain under windows. You will also have to edit this if you install
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# the CodeSourcery toolchain in any other location
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# the CodeSourcery toolchain in any other location
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export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
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#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
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#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
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# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
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# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
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# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
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export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
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# This is the path to the location where I installed the devkitARM toolchain
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# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
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#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
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# These are the Cygwin paths to the locations where I installed the Atollic
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# These are the Cygwin paths to the locations where I installed the Atollic
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# toolchain under windows. You will also have to edit this if you install
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# toolchain under windows. You will also have to edit this if you install
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@ -68,7 +73,7 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++
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# This is the Cygwin path to the location where I build the buildroot
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# This is the Cygwin path to the location where I build the buildroot
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# toolchain.
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# toolchain.
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#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
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# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
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# Add the path to the toolchain to the PATH varialble
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# Add the path to the toolchain to the PATH varialble
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export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
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export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
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