SAMV71: Fix SPI compilation errors when SPI DMA is enabled
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@ -59,6 +59,7 @@
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#include "up_internal.h"
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#include "up_arch.h"
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#include "cache.h"
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#include "sam_gpio.h"
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#include "sam_xdmac.h"
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@ -207,8 +208,7 @@ struct sam_spidev_s
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select_t select; /* SPI select call-out */
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bool initialized; /* TRUE: Controller has been initialized */
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#ifdef CONFIG_SAMV7_SPI_DMA
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uint8_t rxintf; /* RX hardware interface number */
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uint8_t txintf; /* TX hardware interface number */
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uint8_t pid; /* SPI peripheral ID */
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#endif
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/* Debug stuff */
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@ -342,8 +342,7 @@ static struct sam_spidev_s g_spi0dev =
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.base = SAM_SPI0_BASE,
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.select = sam_spi0select,
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#ifdef CONFIG_SAMV7_SPI_DMA
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.rxintf = DMACHAN_INTF_SPI0RX,
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.txintf = DMACHAN_INTF_SPI0TX,
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.pid = SAM_PID_SPI0,
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#endif
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};
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#endif
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@ -381,8 +380,7 @@ static struct sam_spidev_s g_spi1dev =
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.base = SAM_SPI1_BASE,
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.select = sam_spi1select,
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#ifdef CONFIG_SAMV7_SPI_DMA
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.rxintf = DMACHAN_INTF_SPI1RX,
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.txintf = DMACHAN_INTF_SPI1TX,
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.pid = SAM_PID_SPI1,
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#endif
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};
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#endif
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@ -1466,11 +1464,9 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
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/* Configure the RX DMA channel */
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rxflags = DMACH_FLAG_FIFOCFG_LARGEST |
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((uint32_t)spi->rxintf << DMACH_FLAG_PERIPHPID_SHIFT) |
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rxflags = DMACH_FLAG_FIFOCFG_LARGEST | DMACH_FLAG_PERIPHPID(spi->pid) |
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DMACH_FLAG_PERIPHH2SEL | DMACH_FLAG_PERIPHISPERIPH |
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DMACH_FLAG_PERIPHCHUNKSIZE_1 |
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((uint32_t)(15) << DMACH_FLAG_MEMPID_SHIFT) |
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DMACH_FLAG_PERIPHCHUNKSIZE_1 | DMACH_FLAG_MEMPID_MAX |
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DMACH_FLAG_MEMCHUNKSIZE_1;
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/* Set the source and destination width bits */
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@ -1495,7 +1491,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
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* the DMA completes
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*/
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sam_cmcc_invalidate((uintptr_t)rxbuffer, (uintptr_t)rxbuffer + nbytes);
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arch_invalidate_dcache((uintptr_t)rxbuffer, (uintptr_t)rxbuffer + nbytes);
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/* Use normal RX memory incrementing. */
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@ -1504,11 +1500,9 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
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/* Configure the TX DMA channel */
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txflags = DMACH_FLAG_FIFOCFG_LARGEST |
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((uint32_t)spi->txintf << DMACH_FLAG_PERIPHPID_SHIFT) |
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txflags = DMACH_FLAG_FIFOCFG_LARGEST | DMACH_FLAG_PERIPHPID(spi->pid) |
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DMACH_FLAG_PERIPHH2SEL | DMACH_FLAG_PERIPHISPERIPH |
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DMACH_FLAG_PERIPHCHUNKSIZE_1 |
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((uint32_t)(15) << DMACH_FLAG_MEMPID_SHIFT) |
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DMACH_FLAG_PERIPHCHUNKSIZE_1 | DMACH_FLAG_MEMPID_MAX |
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DMACH_FLAG_MEMCHUNKSIZE_1;
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/* Set the source and destination width bits */
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@ -1782,14 +1776,11 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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spics->candma = spino ? SAMV7_SPI1_DMA : SAMV7_SPI0_DMA;
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/* Pre-allocate DMA channels. These allocations exploit that fact that
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* SPI0 is managed by DMAC0 and SPI1 is managed by DMAC1. Hence,
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* the SPI number (spino) is the same as the DMAC number.
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*/
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/* Pre-allocate DMA channels. */
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if (spics->candma)
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{
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spics->rxdma = sam_dmachannel(0);
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spics->rxdma = sam_dmachannel(0, 0);
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if (!spics->rxdma)
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{
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spidbg("ERROR: Failed to allocate the RX DMA channel\n");
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@ -1799,7 +1790,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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if (spics->candma)
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{
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spics->txdma = sam_dmachannel(0);
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spics->txdma = sam_dmachannel(0, 0);
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if (!spics->txdma)
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{
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spidbg("ERROR: Failed to allocate the TX DMA channel\n");
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