SAMA5 SSC: Mostly cosmetic name changes
This commit is contained in:
Gregory Nutt
parent
4214dc9ce9
commit
cdc9bafd54
@ -46,6 +46,9 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#define SAM_SSC_MAXPERCLK 66000000 /* Maximum peripheral clock frequency */
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/* SSC Register Offsets *************************************************************/
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#define SAM_SSC_CR_OFFSET 0x0000 /* Control Register */
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@ -105,10 +105,25 @@
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/* Clocking *****************************************************************/
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/* Select MCU-specific settings
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*
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* SSC is driven by the main clock.
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* SSC is driven by the main clock, divided down so that the maximum
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* peripheral clocking is not exceeded.
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*/
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#define SAM_SSC_CLOCK BOARD_MCK_FREQUENCY
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#if BOARD_MCK_FREQUENCY <= SAM_SSC_MAXPERCLK
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# define SSC_FREQUENCY BOARD_MCK_FREQUENCY
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# define SSC_PCR_DIV PMC_PCR_DIV1
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#elif (BOARD_MCK_FREQUENCY >> 1) <= SAM_SSC_MAXPERCLK
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# define SSC_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
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# define SSC_PCR_DIV PMC_PCR_DIV2
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#elif (BOARD_MCK_FREQUENCY >> 2) <= SAM_SSC_MAXPERCLK
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# define SSC_FREQUENCY (BOARD_MCK_FREQUENCY >> 2)
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# define SSC_PCR_DIV PMC_PCR_DIV4
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#elif (BOARD_MCK_FREQUENCY >> 3) <= SAM_SSC_MAXPERCLK
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# define SSC_FREQUENCY (BOARD_MCK_FREQUENCY >> 3)
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# define SSC_PCR_DIV PMC_PCR_DIV8
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#else
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# error Cannot realize SSC input frequency
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#endif
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/* DMA timeout. The value is not critical; we just don't want the system to
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* hang in the event that a DMA does not finish. This is set to
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@ -159,13 +174,13 @@
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/* The state of the one SSC peripheral */
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struct sam_i2s_s
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struct sam_ssc_s
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{
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struct i2s_dev_s dev; /* Externally visible I2S interface */
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uint32_t base; /* SSC controller register base address */
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sem_t exclsem; /* Assures mutually exclusive acess to SSC */
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#if defined(CONFIG_SAMA5_SSC0) || defined(CONFIG_SAMA5_SSC1)
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uint8_t i2sno; /* SSC controller number (0 or 1) */
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uint8_t sscno; /* SSC controller number (0 or 1) */
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#endif
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#ifdef CONFIG_SAMA5_SSC_DMA
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@ -200,67 +215,67 @@ struct sam_i2s_s
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/* Helpers */
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#ifdef CONFIG_SAMA5_SSC_REGDEBUG
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static bool i2s_checkreg(struct sam_i2s_s *i2s, bool wr, uint32_t value,
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static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t value,
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uint32_t address);
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#else
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# define i2s_checkreg(i2s,wr,value,address) (false)
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# define ssc_checkreg(priv,wr,value,address) (false)
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#endif
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static inline uint32_t i2s_getreg(struct sam_i2s_s *i2s, unsigned int offset);
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static inline void i2s_putreg(struct sam_i2s_s *i2s, uint32_t value,
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static inline uint32_t ssc_getreg(struct sam_ssc_s *priv, unsigned int offset);
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static inline void ssc_putreg(struct sam_ssc_s *priv, uint32_t value,
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unsigned int offset);
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#ifdef CONFIG_SAMA5_SSC_DMA
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static inline uintptr_t i2s_physregaddr(struct sam_i2s_s *i2s,
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static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
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unsigned int offset);
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#endif
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#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
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static void i2s_dumpregs(struct sam_i2s_s *i2s, const char *msg);
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static void ssc_dumpregs(struct sam_ssc_s *priv, const char *msg);
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#else
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# define i2s_dumpregs(i2s,msg)
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# define ssc_dumpregs(priv,msg)
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#endif
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/* DMA support */
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#if defined(CONFIG_SAMA5_SSC_DMADEBUG)
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# define i2s_rxdma_sample(s,i) sam_dmasample((s)->rxdma, &(s)->rxdmaregs[i])
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# define i2s_txdma_sample(s,i) sam_dmasample((s)->txdma, &(s)->txdmaregs[i])
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static void i2s_dma_sampleinit(struct sam_i2s_s *i2s);
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static void i2s_dma_sampledone(struct sam_i2s_s *i2s);
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# define ssc_rxdma_sample(s,i) sam_dmasample((s)->rxdma, &(s)->rxdmaregs[i])
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# define ssc_txdma_sample(s,i) sam_dmasample((s)->txdma, &(s)->txdmaregs[i])
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static void ssc_dma_sampleinit(struct sam_ssc_s *priv);
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static void ssc_dma_sampledone(struct sam_ssc_s *priv);
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#else
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# define i2s_rxdma_sample(s,i)
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# define i2s_txdma_sample(s,i)
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# define i2s_dma_sampleinit(s)
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# define i2s_dma_sampledone(s)
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# define ssc_rxdma_sample(s,i)
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# define ssc_txdma_sample(s,i)
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# define ssc_dma_sampleinit(s)
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# define ssc_dma_sampledone(s)
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#endif
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#ifdef CONFIG_SAMA5_SSC_DMA
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static void i2s_rxcallback(DMA_HANDLE handle, void *arg, int result);
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static void i2s_txcallback(DMA_HANDLE handle, void *arg, int result);
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static void ssc_rxcallback(DMA_HANDLE handle, void *arg, int result);
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static void ssc_txcallback(DMA_HANDLE handle, void *arg, int result);
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#endif
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/* I2S methods */
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static uint32_t i2s_frequency(FAR struct i2s_dev_s *dev, uint32_t frequency);
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static uint32_t ssc_frequency(FAR struct i2s_dev_s *dev, uint32_t frequency);
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#ifdef CONFIG_SAMA5_SSC_DMA
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static void i2s_send_nodma(FAR struct i2s_dev_s *dev,
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static void ssc_send_nodma(FAR struct i2s_dev_s *dev,
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FAR const void *buffer, size_t nbytes);
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static void i2s_receive_nodma(FAR struct i2s_dev_s *dev, FAR void *buffer,
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static void ssc_receive_nodma(FAR struct i2s_dev_s *dev, FAR void *buffer,
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size_t nbytes);
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#endif
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static void i2s_send(struct i2s_dev_s *dev,
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static void ssc_send(struct i2s_dev_s *dev,
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const void *buffer, size_t nbytes);
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static void i2s_receive(struct i2s_dev_s *dev, void *buffer,
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static void ssc_receive(struct i2s_dev_s *dev, void *buffer,
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size_t nbytes);
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/* Initialization */
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#ifdef CONFIG_SAMA5_SSC0
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static void i2s_ssc0_configure(struct sam_i2s_s *i2s);
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static void ssc0_configure(struct sam_ssc_s *priv);
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#endif
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#ifdef CONFIG_SAMA5_SSC1
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static void i2s_ssc1_configure(struct sam_i2s_s *i2s);
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static void ssc1_configure(struct sam_ssc_s *priv);
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#endif
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/****************************************************************************
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@ -268,11 +283,11 @@ static void i2s_ssc1_configure(struct sam_i2s_s *i2s);
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****************************************************************************/
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/* I2S device operations */
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static const struct i2s_ops_s g_i2sops =
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static const struct i2s_ops_s g_sscops =
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{
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.i2s_frequency = i2s_frequency,
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.i2s_send = i2s_send,
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.i2s_receive = i2s_receive,
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.i2s_frequency = ssc_frequency,
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.i2s_send = ssc_send,
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.i2s_receive = ssc_receive,
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};
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/****************************************************************************
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@ -284,7 +299,7 @@ static const struct i2s_ops_s g_i2sops =
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****************************************************************************/
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/****************************************************************************
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* Name: i2s_checkreg
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* Name: ssc_checkreg
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*
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* Description:
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* Check if the current register access is a duplicate of the preceding.
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@ -300,35 +315,35 @@ static const struct i2s_ops_s g_i2sops =
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SSC_REGDEBUG
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static bool i2s_checkreg(struct sam_i2s_s *i2s, bool wr, uint32_t value,
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static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t value,
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uint32_t address)
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{
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if (wr == i2s->wr && /* Same kind of access? */
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value == i2s->regval && /* Same value? */
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address == i2s->regaddr) /* Same address? */
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if (wr == priv->wr && /* Same kind of access? */
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value == priv->regval && /* Same value? */
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address == priv->regaddr) /* Same address? */
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{
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/* Yes, then just keep a count of the number of times we did this. */
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i2s->count++;
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priv->count++;
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return false;
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}
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else
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{
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/* Did we do the previous operation more than once? */
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if (i2s->count > 0)
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if (priv->count > 0)
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{
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/* Yes... show how many times we did it */
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lldbg("...[Repeats %d times]...\n", i2s->count);
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lldbg("...[Repeats %d times]...\n", priv->count);
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}
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/* Save information about the new access */
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i2s->wr = wr;
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i2s->regval = value;
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i2s->regaddr = address;
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i2s->count = 0;
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priv->wr = wr;
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priv->regval = value;
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priv->regaddr = address;
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priv->count = 0;
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}
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/* Return true if this is the first time that we have done this operation */
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@ -338,21 +353,21 @@ static bool i2s_checkreg(struct sam_i2s_s *i2s, bool wr, uint32_t value,
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#endif
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/****************************************************************************
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* Name: i2s_getreg
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* Name: ssc_getreg
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*
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* Description:
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* Read an SSC register
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*
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****************************************************************************/
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static inline uint32_t i2s_getreg(struct sam_i2s_s *i2s,
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static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
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unsigned int offset)
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{
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uint32_t address = i2s->base + offset;
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uint32_t address = priv->base + offset;
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uint32_t value = getreg32(address);
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#ifdef CONFIG_SAMA5_SSC_REGDEBUG
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if (i2s_checkreg(i2s, false, value, address))
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if (ssc_checkreg(priv, false, value, address))
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{
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lldbg("%08x->%08x\n", address, value);
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}
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@ -362,20 +377,20 @@ static inline uint32_t i2s_getreg(struct sam_i2s_s *i2s,
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}
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/****************************************************************************
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* Name: i2s_putreg
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* Name: ssc_putreg
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*
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* Description:
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* Write a value to an SSC register
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*
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****************************************************************************/
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static inline void i2s_putreg(struct sam_i2s_s *i2s, uint32_t value,
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static inline void ssc_putreg(struct sam_ssc_s *priv, uint32_t value,
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unsigned int offset)
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{
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uint32_t address = i2s->base + offset;
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uint32_t address = priv->base + offset;
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#ifdef CONFIG_SAMA5_SSC_REGDEBUG
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if (i2s_checkreg(i2s, true, value, address))
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if (ssc_checkreg(priv, true, value, address))
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{
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lldbg("%08x<-%08x\n", address, value);
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}
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@ -385,7 +400,7 @@ static inline void i2s_putreg(struct sam_i2s_s *i2s, uint32_t value,
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}
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/****************************************************************************
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* Name: i2s_physregaddr
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* Name: ssc_physregaddr
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*
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* Description:
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* Return the physical address of an HSMCI register
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@ -393,21 +408,21 @@ static inline void i2s_putreg(struct sam_i2s_s *i2s, uint32_t value,
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SSC_DMA
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static inline uintptr_t i2s_physregaddr(struct sam_i2s_s *i2s,
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static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
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unsigned int offset)
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{
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return sam_physregaddr(i2s->base + offset);
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return sam_physregaddr(priv->base + offset);
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}
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#endif
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/****************************************************************************
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* Name: i2s_dumpregs
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* Name: ssc_dumpregs
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*
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* Description:
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* Dump the contents of all SSC registers
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*
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* Input Parameters:
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* i2s - The SSC controller to dump
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* priv - The SSC controller to dump
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* msg - Message to print before the register data
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*
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* Returned Value:
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@ -416,34 +431,34 @@ static inline uintptr_t i2s_physregaddr(struct sam_i2s_s *i2s,
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****************************************************************************/
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#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
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static void i2s_dumpregs(struct sam_i2s_s *i2s, const char *msg)
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static void ssc_dumpregs(struct sam_ssc_s *priv, const char *msg)
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{
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i2svdbg("SSC%d: %s\n", i2s->i2sno, msg);
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i2svdbg("SSC%d: %s\n", priv->sscno, msg);
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i2svdbg(" CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
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getreg32(i2s->base + SAM_SSC_CMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_RCMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_RFMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_TCMR_OFFSET));
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getreg32(priv->base + SAM_SSC_CMR_OFFSET),
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getreg32(priv->base + SAM_SSC_RCMR_OFFSET),
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getreg32(priv->base + SAM_SSC_RFMR_OFFSET),
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getreg32(priv->base + SAM_SSC_TCMR_OFFSET));
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i2svdbg(" TFMR:%08x RC0R:%08x RC1R:%08x SR:%08x\n",
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getreg32(i2s->base + SAM_SSC_TFMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_RC0R_OFFSET),
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getreg32(i2s->base + SAM_SSC_RC1R_OFFSET),
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getreg32(i2s->base + SAM_SSC_SR_OFFSET));
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getreg32(priv->base + SAM_SSC_TFMR_OFFSET),
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getreg32(priv->base + SAM_SSC_RC0R_OFFSET),
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getreg32(priv->base + SAM_SSC_RC1R_OFFSET),
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getreg32(priv->base + SAM_SSC_SR_OFFSET));
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i2svdbg(" IMR:%08x WPMR:%08x WPSR:%08x\n",
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getreg32(i2s->base + SAM_SSC_IMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_WPMR_OFFSET),
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getreg32(i2s->base + SAM_SSC_WPSR_OFFSET));
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getreg32(priv->base + SAM_SSC_IMR_OFFSET),
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getreg32(priv->base + SAM_SSC_WPMR_OFFSET),
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getreg32(priv->base + SAM_SSC_WPSR_OFFSET));
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}
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#endif
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/****************************************************************************
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* Name: i2s_dma_sampleinit
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* Name: ssc_dma_sampleinit
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*
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* Description:
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* Initialize sampling of DMA registers (if CONFIG_SAMA5_SSC_DMADEBUG)
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*
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* Input Parameters:
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* i2s - Chip select doing the DMA
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* priv - Chip select doing the DMA
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*
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* Returned Value:
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* None
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@ -451,28 +466,28 @@ static void i2s_dumpregs(struct sam_i2s_s *i2s, const char *msg)
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SSC_DMADEBUG
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static void i2s_dma_sampleinit(struct sam_i2s_s *i2s)
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static void ssc_dma_sampleinit(struct sam_ssc_s *priv)
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{
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/* Put contents of register samples into a known state */
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memset(i2s->rxdmaregs, 0xff, DMA_NSAMPLES * sizeof(struct sam_dmaregs_s));
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memset(i2s->txdmaregs, 0xff, DMA_NSAMPLES * sizeof(struct sam_dmaregs_s));
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memset(priv->rxdmaregs, 0xff, DMA_NSAMPLES * sizeof(struct sam_dmaregs_s));
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memset(priv->txdmaregs, 0xff, DMA_NSAMPLES * sizeof(struct sam_dmaregs_s));
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/* Then get the initial samples */
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sam_dmasample(i2s->rxdma, &i2s->rxdmaregs[DMA_INITIAL]);
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sam_dmasample(i2s->txdma, &i2s->txdmaregs[DMA_INITIAL]);
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sam_dmasample(priv->rxdma, &priv->rxdmaregs[DMA_INITIAL]);
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sam_dmasample(priv->txdma, &priv->txdmaregs[DMA_INITIAL]);
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}
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#endif
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/****************************************************************************
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* Name: i2s_dma_sampledone
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* Name: ssc_dma_sampledone
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*
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* Description:
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* Dump sampled DMA registers
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*
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* Input Parameters:
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* i2s - Chip select doing the DMA
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* priv - Chip select doing the DMA
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*
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* Returned Value:
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* None
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@ -480,33 +495,33 @@ static void i2s_dma_sampleinit(struct sam_i2s_s *i2s)
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SSC_DMADEBUG
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static void i2s_dma_sampledone(struct sam_i2s_s *i2s)
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static void ssc_dma_sampledone(struct sam_ssc_s *priv)
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{
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/* Sample the final registers */
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sam_dmasample(i2s->rxdma, &i2s->rxdmaregs[DMA_END_TRANSFER]);
|
||||
sam_dmasample(i2s->txdma, &i2s->txdmaregs[DMA_END_TRANSFER]);
|
||||
sam_dmasample(priv->rxdma, &priv->rxdmaregs[DMA_END_TRANSFER]);
|
||||
sam_dmasample(priv->txdma, &priv->txdmaregs[DMA_END_TRANSFER]);
|
||||
|
||||
/* Then dump the sampled DMA registers */
|
||||
/* Initial register values */
|
||||
|
||||
sam_dmadump(i2s->txdma, &i2s->txdmaregs[DMA_INITIAL],
|
||||
sam_dmadump(priv->txdma, &priv->txdmaregs[DMA_INITIAL],
|
||||
"TX: Initial Registers");
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_INITIAL],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_INITIAL],
|
||||
"RX: Initial Registers");
|
||||
|
||||
/* Register values after DMA setup */
|
||||
|
||||
sam_dmadump(i2s->txdma, &i2s->txdmaregs[DMA_AFTER_SETUP],
|
||||
sam_dmadump(priv->txdma, &priv->txdmaregs[DMA_AFTER_SETUP],
|
||||
"TX: After DMA Setup");
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_AFTER_SETUP],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_AFTER_SETUP],
|
||||
"RX: After DMA Setup");
|
||||
|
||||
/* Register values after DMA start */
|
||||
|
||||
sam_dmadump(i2s->txdma, &i2s->txdmaregs[DMA_AFTER_START],
|
||||
sam_dmadump(priv->txdma, &priv->txdmaregs[DMA_AFTER_START],
|
||||
"TX: After DMA Start");
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_AFTER_START],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_AFTER_START],
|
||||
"RX: After DMA Start");
|
||||
|
||||
/* Register values at the time of the TX and RX DMA callbacks
|
||||
@ -517,31 +532,31 @@ static void i2s_dma_sampledone(struct sam_i2s_s *i2s)
|
||||
* samples either, but we don't know for sure.
|
||||
*/
|
||||
|
||||
sam_dmadump(i2s->txdma, &i2s->txdmaregs[DMA_CALLBACK],
|
||||
sam_dmadump(priv->txdma, &priv->txdmaregs[DMA_CALLBACK],
|
||||
"TX: At DMA callback");
|
||||
|
||||
/* Register values at the end of the DMA */
|
||||
|
||||
if (i2s->result == -ETIMEDOUT)
|
||||
if (priv->result == -ETIMEDOUT)
|
||||
{
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_TIMEOUT],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_TIMEOUT],
|
||||
"RX: At DMA timeout");
|
||||
}
|
||||
else
|
||||
{
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_CALLBACK],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_CALLBACK],
|
||||
"RX: At DMA callback");
|
||||
}
|
||||
|
||||
sam_dmadump(i2s->rxdma, &i2s->rxdmaregs[DMA_END_TRANSFER],
|
||||
sam_dmadump(priv->rxdma, &priv->rxdmaregs[DMA_END_TRANSFER],
|
||||
"RX: At End-of-Transfer");
|
||||
sam_dmadump(i2s->txdma, &i2s->txdmaregs[DMA_END_TRANSFER],
|
||||
sam_dmadump(priv->txdma, &priv->txdmaregs[DMA_END_TRANSFER],
|
||||
"TX: At End-of-Transfer");
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_dmatimeout
|
||||
* Name: ssc_dmatimeout
|
||||
*
|
||||
* Description:
|
||||
* The watchdog timeout setup when a has expired without completion of a
|
||||
@ -560,29 +575,29 @@ static void i2s_dma_sampledone(struct sam_i2s_s *i2s)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_dmatimeout(int argc, uint32_t arg)
|
||||
static void ssc_dmatimeout(int argc, uint32_t arg)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)arg;
|
||||
DEBUGASSERT(i2s != NULL);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)arg;
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Sample DMA registers at the time of the timeout */
|
||||
|
||||
i2s_rxdma_sample(i2s, DMA_CALLBACK);
|
||||
ssc_rxdma_sample(priv, DMA_CALLBACK);
|
||||
|
||||
/* Report timeout result, perhaps overwriting any failure reports from
|
||||
* the TX callback.
|
||||
*/
|
||||
|
||||
i2s->result = -ETIMEDOUT;
|
||||
priv->result = -ETIMEDOUT;
|
||||
|
||||
/* Then wake up the waiting thread */
|
||||
|
||||
sem_post(&i2s->dmawait);
|
||||
sem_post(&priv->dmawait);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_rxcallback
|
||||
* Name: ssc_rxcallback
|
||||
*
|
||||
* Description:
|
||||
* This callback function is invoked at the completion of the SSC RX DMA.
|
||||
@ -598,38 +613,38 @@ static void i2s_dmatimeout(int argc, uint32_t arg)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_rxcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
static void ssc_rxcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)arg;
|
||||
DEBUGASSERT(i2s != NULL);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)arg;
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Cancel the watchdog timeout */
|
||||
|
||||
(void)wd_cancel(i2s->dmadog);
|
||||
(void)wd_cancel(priv->dmadog);
|
||||
|
||||
/* Sample DMA registers at the time of the callback */
|
||||
|
||||
i2s_rxdma_sample(i2s, DMA_CALLBACK);
|
||||
ssc_rxdma_sample(priv, DMA_CALLBACK);
|
||||
|
||||
/* Report the result of the transfer only if the TX callback has not already
|
||||
* reported an error.
|
||||
*/
|
||||
|
||||
if (i2s->result == -EBUSY)
|
||||
if (priv->result == -EBUSY)
|
||||
{
|
||||
/* Save the result of the transfer if no error was previuosly reported */
|
||||
|
||||
i2s->result = result;
|
||||
priv->result = result;
|
||||
}
|
||||
|
||||
/* Then wake up the waiting thread */
|
||||
|
||||
sem_post(&i2s->dmawait);
|
||||
sem_post(&priv->dmawait);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_txcallback
|
||||
* Name: ssc_txcallback
|
||||
*
|
||||
* Description:
|
||||
* This callback function is invoked at the completion of the SSC TX DMA.
|
||||
@ -645,29 +660,29 @@ static void i2s_rxcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_txcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
static void ssc_txcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)arg;
|
||||
DEBUGASSERT(i2s != NULL);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)arg;
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
i2s_txdma_sample(i2s, DMA_CALLBACK);
|
||||
ssc_txdma_sample(priv, DMA_CALLBACK);
|
||||
|
||||
/* Do nothing on the TX callback unless an error is reported. This
|
||||
* callback is not really important because the SSC exchange is not
|
||||
* complete until the RX callback is received.
|
||||
*/
|
||||
|
||||
if (result != OK && i2s->result == -EBUSY)
|
||||
if (result != OK && priv->result == -EBUSY)
|
||||
{
|
||||
/* Save the result of the transfer if an error is reported */
|
||||
|
||||
i2s->result = result;
|
||||
priv->result = result;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_frequency
|
||||
* Name: ssc_frequency
|
||||
*
|
||||
* Description:
|
||||
* Set the SSC frequency.
|
||||
@ -681,9 +696,9 @@ static void i2s_txcallback(DMA_HANDLE handle, void *arg, int result)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint32_t i2s_frequency(struct i2s_dev_s *dev, uint32_t frequency)
|
||||
static uint32_t ssc_frequency(struct i2s_dev_s *dev, uint32_t frequency)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)dev;
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)dev;
|
||||
uint32_t actual;
|
||||
uint32_t regval;
|
||||
|
||||
@ -695,7 +710,7 @@ static uint32_t i2s_frequency(struct i2s_dev_s *dev, uint32_t frequency)
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
* Name: i2s_send_nodma
|
||||
* Name: ssc_send_nodma
|
||||
*
|
||||
* Description:
|
||||
* Send a block of data on SSC without using DMA
|
||||
@ -711,21 +726,21 @@ static uint32_t i2s_frequency(struct i2s_dev_s *dev, uint32_t frequency)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_send_nodma(struct i2s_dev_s *dev, const void *buffer,
|
||||
static void ssc_send_nodma(struct i2s_dev_s *dev, const void *buffer,
|
||||
size_t nbytes)
|
||||
#else
|
||||
static void i2s_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
static void ssc_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
#endif
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)dev;
|
||||
DEBUGASSERT(i2s);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)dev;
|
||||
DEBUGASSERT(priv);
|
||||
|
||||
i2svdbg("buffer=%p nbytes=%d\n", buffer, (int)nbytes);
|
||||
#warning Missing logic
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_receive_nodma
|
||||
* Name: ssc_receive_nodma
|
||||
*
|
||||
* Description:
|
||||
* Receive a block of data from SSC without using DMA
|
||||
@ -742,21 +757,21 @@ static void i2s_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_receive_nodma(struct i2s_dev_s *dev, void *buffer,
|
||||
static void ssc_receive_nodma(struct i2s_dev_s *dev, void *buffer,
|
||||
size_t nbytes)
|
||||
#else
|
||||
static void i2s_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
static void ssc_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
#endif
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)dev;
|
||||
DEBUGASSERT(i2s);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)dev;
|
||||
DEBUGASSERT(priv);
|
||||
|
||||
i2svdbg("buffer=%p nbytes=%d\n", buffer, (int)nbytes);
|
||||
#warning Missing logic
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
* Name: i2s_send
|
||||
* Name: ssc_send
|
||||
*
|
||||
* Description:
|
||||
* Send a block of data on SSC using DMA is possible
|
||||
@ -772,20 +787,20 @@ static void i2s_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
static void ssc_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)dev;
|
||||
DEBUGASSERT(i2s);
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)dev;
|
||||
DEBUGASSERT(priv);
|
||||
|
||||
i2svdbg("buffer=%p nbytes=%d\n", buffer, (int)nbytes);
|
||||
|
||||
/* If we are not configured to do DMA OR is this is a very small transfer,
|
||||
* then defer the operation to i2s_send_nodma().
|
||||
* then defer the operation to ssc_send_nodma().
|
||||
*/
|
||||
|
||||
if (!i2s->candma || nbytes < CONFIG_SAMA5_SSC_DMATHRESHOLD)
|
||||
if (!priv->candma || nbytes < CONFIG_SAMA5_SSC_DMATHRESHOLD)
|
||||
{
|
||||
i2s_send_nodma(dev, buffer, nbytes);
|
||||
ssc_send_nodma(dev, buffer, nbytes);
|
||||
}
|
||||
|
||||
/* Otherwise, perform the transfer using DMA */
|
||||
@ -798,7 +813,7 @@ static void i2s_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_receive
|
||||
* Name: ssc_receive
|
||||
*
|
||||
* Description:
|
||||
* Receive a block of data from SSC using DMA is possible
|
||||
@ -815,17 +830,17 @@ static void i2s_send(struct i2s_dev_s *dev, const void *buffer, size_t nbytes)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
static void i2s_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
static void ssc_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
{
|
||||
struct sam_i2s_s *i2s = (struct sam_i2s_s *)dev;
|
||||
struct sam_ssc_s *priv = (struct sam_ssc_s *)dev;
|
||||
|
||||
/* If we are not configured to do DMA OR is this is a very small transfer,
|
||||
* then defer the operation to i2s_send_nodma().
|
||||
* then defer the operation to ssc_send_nodma().
|
||||
*/
|
||||
|
||||
if (!i2s->candma || nbytes < CONFIG_SAMA5_SSC_DMATHRESHOLD)
|
||||
if (!priv->candma || nbytes < CONFIG_SAMA5_SSC_DMATHRESHOLD)
|
||||
{
|
||||
i2s_send_nodma(dev, buffer, nbytes);
|
||||
ssc_send_nodma(dev, buffer, nbytes);
|
||||
}
|
||||
|
||||
/* Otherwise, perform the transfer using DMA */
|
||||
@ -838,7 +853,7 @@ static void i2s_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: i2s_ssc0/1_configure
|
||||
* Name: ssc0/1_configure
|
||||
*
|
||||
* Description:
|
||||
* Configure SSC0 and/or SSC1
|
||||
@ -853,7 +868,7 @@ static void i2s_receive(struct i2s_dev_s *dev, void *buffer, size_t nbytes)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC0
|
||||
static void i2s_ssc0_configure(struct sam_i2s_s *i2s)
|
||||
static void ssc0_configure(struct sam_ssc_s *priv)
|
||||
{
|
||||
/* Enable clocking to the SSC0 peripheral */
|
||||
|
||||
@ -882,16 +897,16 @@ static void i2s_ssc0_configure(struct sam_i2s_s *i2s)
|
||||
|
||||
/* Configure driver state specific to this SSC peripheral */
|
||||
|
||||
i2s->base = SAM_SSC0_VBASE;
|
||||
priv->base = SAM_SSC0_VBASE;
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
i2s->candma = SAMA5_SSC1_DMA;
|
||||
i2s->pid = SAM_PID_SSC0;
|
||||
priv->candma = SAMA5_SSC1_DMA;
|
||||
priv->pid = SAM_PID_SSC0;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SAMA5_SSC1
|
||||
static void i2s_ssc1_configure(struct sam_i2s_s *i2s)
|
||||
static void ssc1_configure(struct sam_ssc_s *priv)
|
||||
{
|
||||
/* Enable clocking to the SSC1 peripheral */
|
||||
|
||||
@ -919,10 +934,10 @@ static void i2s_ssc1_configure(struct sam_i2s_s *i2s)
|
||||
|
||||
/* Configure driver state specific to this SSC peripheral */
|
||||
|
||||
i2s->base = SAM_SSC1_VBASE;
|
||||
priv->base = SAM_SSC1_VBASE;
|
||||
#ifdef CONFIG_SAMA5_SSC_DMA
|
||||
i2s->candma = SAMA5_SSC1_DMA;
|
||||
i2s->pid = SAM_PID_SSC1;
|
||||
priv->candma = SAMA5_SSC1_DMA;
|
||||
priv->pid = SAM_PID_SSC1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
@ -932,7 +947,7 @@ static void i2s_ssc1_configure(struct sam_i2s_s *i2s)
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_i2sinitialize
|
||||
* Name: sam_ssc_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the selected SSC port
|
||||
@ -945,9 +960,9 @@ static void i2s_ssc1_configure(struct sam_i2s_s *i2s)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct i2s_dev_s *up_i2sinitialize(int port)
|
||||
struct i2s_dev_s *sam_ssc_initialize(int port)
|
||||
{
|
||||
struct sam_i2s_s *i2s;
|
||||
struct sam_ssc_s *priv;
|
||||
irqstate_t flags;
|
||||
|
||||
/* The support SAM parts have only a single SSC port */
|
||||
@ -959,8 +974,8 @@ struct i2s_dev_s *up_i2sinitialize(int port)
|
||||
* chip select structures.
|
||||
*/
|
||||
|
||||
i2s = (struct sam_i2s_s *)zalloc(sizeof(struct sam_i2s_s));
|
||||
if (!i2s)
|
||||
priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
|
||||
if (!priv)
|
||||
{
|
||||
i2sdbg("ERROR: Failed to allocate a chip select structure\n");
|
||||
return NULL;
|
||||
@ -972,22 +987,22 @@ struct i2s_dev_s *up_i2sinitialize(int port)
|
||||
|
||||
/* Initialize the common parts for the SSC device structure */
|
||||
|
||||
sem_init(&i2s->exclsem, 0, 1);
|
||||
i2s->dev.ops = &g_i2sops;
|
||||
i2s->i2sno = port;
|
||||
sem_init(&priv->exclsem, 0, 1);
|
||||
priv->dev.ops = &g_sscops;
|
||||
priv->sscno = port;
|
||||
|
||||
flags = irqsave();
|
||||
#ifdef CONFIG_SAMA5_SSC0
|
||||
if (port == 0)
|
||||
{
|
||||
i2s_ssc0_configure(i2s);
|
||||
ssc0_configure(priv);
|
||||
}
|
||||
else
|
||||
#endif /* CONFIG_SAMA5_SSC0 */
|
||||
#ifdef CONFIG_SAMA5_SSC1
|
||||
if (port == 1)
|
||||
{
|
||||
i2s_ssc1_configure(i2s);
|
||||
ssc1_configure(priv);
|
||||
}
|
||||
else
|
||||
#endif /* CONFIG_SAMA5_SSC1 */
|
||||
@ -1002,25 +1017,25 @@ struct i2s_dev_s *up_i2sinitialize(int port)
|
||||
* the SSC number (port) is the same as the DMAC number.
|
||||
*/
|
||||
|
||||
if (i2s->candma)
|
||||
if (priv->candma)
|
||||
{
|
||||
i2s->rxdma = sam_dmachannel(port, 0);
|
||||
if (!i2s->rxdma)
|
||||
priv->rxdma = sam_dmachannel(port, 0);
|
||||
if (!priv->rxdma)
|
||||
{
|
||||
i2sdbg("ERROR: Failed to allocate the RX DMA channel\n");
|
||||
i2s->candma = false;
|
||||
priv->candma = false;
|
||||
}
|
||||
}
|
||||
|
||||
if (i2s->candma)
|
||||
if (priv->candma)
|
||||
{
|
||||
i2s->txdma = sam_dmachannel(port, 0);
|
||||
if (!i2s->txdma)
|
||||
priv->txdma = sam_dmachannel(port, 0);
|
||||
if (!priv->txdma)
|
||||
{
|
||||
i2sdbg("ERROR: Failed to allocate the TX DMA channel\n");
|
||||
sam_dmafree(i2s->rxdma);
|
||||
i2s->rxdma = NULL;
|
||||
i2s->candma = false;
|
||||
sam_dmafree(priv->rxdma);
|
||||
priv->rxdma = NULL;
|
||||
priv->candma = false;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1028,24 +1043,24 @@ struct i2s_dev_s *up_i2sinitialize(int port)
|
||||
* thread when the DMA transfer completes.
|
||||
*/
|
||||
|
||||
sem_init(&i2s->dmawait, 0, 0);
|
||||
sem_init(&priv->dmawait, 0, 0);
|
||||
|
||||
/* Create a watchdog time to catch DMA timeouts */
|
||||
|
||||
i2s->dmadog = wd_create();
|
||||
DEBUGASSERT(i2s->dmadog);
|
||||
priv->dmadog = wd_create();
|
||||
DEBUGASSERT(priv->dmadog);
|
||||
#endif
|
||||
|
||||
/* Initialize I2S hardware */
|
||||
#warning "Missing logic"
|
||||
irqrestore(flags);
|
||||
i2s_dumpregs(i2s, "After initialization");
|
||||
ssc_dumpregs(priv, "After initialization");
|
||||
|
||||
return &i2s->dev;
|
||||
return &priv->dev;
|
||||
|
||||
errout_with_alloc:
|
||||
sem_destroy(&i2s->exclsem);
|
||||
kfree(i2s);
|
||||
sem_destroy(&priv->exclsem);
|
||||
kfree(priv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user