stm32 usbfs: Fix stm32_usbfs and add CONFIG_STM32_USBFS
This commit is contained in:
Zou Hanya
Xiang Xiao
parent
654960da4b
commit
ce2a7d6d19
@ -1191,6 +1191,7 @@ config ARCH_CHIP_STM32G474R
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select STM32_STM32G47XX
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select STM32_STM32G4XXR
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select STM32_STM32G474R
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select STM32_HAVE_USBFS
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config ARCH_CHIP_STM32G474Q
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bool "STM32G474Q"
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@ -2209,6 +2210,10 @@ config STM32_HAVE_USBDEV
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bool
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default n
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config STM32_HAVE_USBFS
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bool
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default n
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config STM32_HAVE_OTGFS
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bool
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default n
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@ -3322,6 +3327,12 @@ config STM32_USB
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depends on STM32_HAVE_USBDEV
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select USBDEV
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config STM32_USBFS
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bool "USB Full Speed Device"
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default n
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depends on STM32_HAVE_USBFS
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select USBDEV
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config STM32_UCPD
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bool "UCPD (USB Type C Power Delivery)"
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default n
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@ -10825,6 +10836,18 @@ endmenu
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comment "USB Device Configuration"
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menu "USB Full Speed Debug Configuration"
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depends on STM32_USBFS
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config STM32_USBFS_REGDEBUG
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bool "Register-Level Debug"
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default n
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depends on STM32_USBFS && DEBUG_USB_INFO
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---help---
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Enable very low-level register access debug.
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endmenu
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menu "OTG Configuration"
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depends on STM32_OTGFS
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@ -69,6 +69,9 @@ ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_USB),y)
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CHIP_CSRCS += stm32_usbdev.c
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endif
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ifeq ($(CONFIG_STM32_USBFS),y)
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CHIP_CSRCS += stm32_usbfs.c
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endif
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CHIP_CSRCS += stm32_otgfsdev.c
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endif
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/arm/src/stm32/hardware/stm32_usbdev.h
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* arch/arm/src/stm32/hardware/stm32_usbfs.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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@ -18,8 +18,8 @@
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H
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#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H
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#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBFS_H
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#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBFS_H
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/****************************************************************************
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* Included Files
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@ -28,8 +28,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) \
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|| defined(CONFIG_STM32_STM32F37XX)
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#if defined(CONFIG_STM32_USBFS)
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/****************************************************************************
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* Pre-processor Definitions
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@ -57,6 +56,8 @@
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#define STM32_USB_FNR_OFFSET 0x0048 /* USB frame number register (16-bits) */
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#define STM32_USB_DADDR_OFFSET 0x004c /* USB device address (16-bits) */
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#define STM32_USB_BTABLE_OFFSET 0x0050 /* Buffer table address (16-bits) */
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#define STM32_USB_LPMCSR_OFFSET 0x0054 /* LPM control and status register */
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#define STM32_USB_BCDR_OFFSET 0x0058 /* Battery charging detector */
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/* Buffer Descriptor Table (Relatative to BTABLE address) */
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@ -65,7 +66,7 @@
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#define STM32_USB_ADDR_RX_WOFFSET (4) /* Reception buffer address n (16-bits) */
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#define STM32_USB_COUNT_RX_WOFFSET (6) /* Reception byte count n (16-bits) */
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#define STM32_USB_BTABLE_RADDR(ep,o) ((((uint32_t)getreg16(STM32_USB_BTABLE) + ((ep) << 3)) + (o)) << 1)
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#define STM32_USB_BTABLE_RADDR(ep,o) (((uint32_t)getreg16(STM32_USB_BTABLE) + ((ep) << 3)) + (o))
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#define STM32_USB_ADDR_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_TX_WOFFSET)
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#define STM32_USB_COUNT_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_COUNT_TX_WOFFSET)
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#define STM32_USB_ADDR_RX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_RX_WOFFSET)
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@ -92,6 +93,8 @@
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#define STM32_USB_FNR (STM32_USB_BASE+STM32_USB_FNR_OFFSET)
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#define STM32_USB_DADDR (STM32_USB_BASE+STM32_USB_DADDR_OFFSET)
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#define STM32_USB_BTABLE (STM32_USB_BASE+STM32_USB_BTABLE_OFFSET)
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#define STM32_USB_LPMCSR (STM32_USB_BASE+STM32_USB_LPMCSR_OFFSET)
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#define STM32_USB_BCDR (STM32_USB_BASE+STM32_USB_BCDR_OFFSET)
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/* Buffer Descriptor Table (Relatative to BTABLE address) */
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@ -221,5 +224,25 @@
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#define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */
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#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT)
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#endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F37XX */
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#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H */
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/* LPM control and status register */
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#define USB_LPMCSR_LPMEN (1 << 0) /* Bit 0: LPM support enable */
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#define USB_LPMCSR_LPMACK (1 << 1) /* Bit 1: LPM Token acknowledge enable */
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#define USB_LPMCSR_REMWAKE (1 << 3) /* Bit 3: bRemoteWake value */
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#define USB_LPMCSR_BESL_SHIFT (4) /* Bits 7-4: BESL value */
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#define USB_LPMCSR_BESL_MASK (0x0f << USB_LPMCSR_BESL_SHIFT)
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/* Battery charging detector */
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#define USB_BCDR_BCDEN (1 << 0) /* Bit 0: Battery charging detector (BCD) enable */
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#define USB_BCDR_DCDEN (1 << 1) /* Bit 1: Data contact detection (DCD) mode enable */
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#define USB_BCDR_PDEN (1 << 2) /* Bit 2: Primary detection (PD) mode enable */
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#define USB_BCDR_SDEN (1 << 3) /* Bit 3: Secondary detection (SD) mode enable */
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#define USB_BCDR_DCDET (1 << 4) /* Bit 4: Data contact detection (DCD) status */
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#define USB_BCDR_PDET (1 << 5) /* Bit 5: Primary detection (PD) status */
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#define USB_BCDR_SDET (1 << 6) /* Bit 6: Secondary detection (SD) status */
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#define USB_BCDR_PS2DET (1 << 7) /* Bit 7: DM pull-up detection status */
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#define USB_BCDR_DPPU (1 << 15) /* Bit 15: DP pull-up control */
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#endif /* CONFIG_STM32_USBFS */
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#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBFS_H */
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@ -102,7 +102,8 @@
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#define STM32_UART5_BASE 0x40005000 /* 0x40005000-0x400053ff: UART5 */
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#define STM32_I2C1_BASE 0x40005400 /* 0x40005400-0x400057ff: I2C1 */
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#define STM32_I2C2_BASE 0x40005800 /* 0x40005800-0x40005bff: I2C2 */
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#define STM32_USB_BASE 0x40005c00 /* 0x40005c00-0x400063ff: USB and USB SRAM */
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#define STM32_USB_BASE 0x40005c00 /* 0x40005c00-0x40005fff: USB */
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#define STM32_USBRAM_BASE 0x40006000 /* 0x40006000-0x400063ff: USB SRAM */
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#define STM32_FDCAN1_BASE 0x40006400 /* 0x40006400-0x400067ff: FDCAN1 */
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#define STM32_FDCAN2_BASE 0x40006800 /* 0x40006800-0x40006bff: FDCAN2 */
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#define STM32_FDCAN3_BASE 0x40006c00 /* 0x40006c00-0x40006fff: FDCAN3 */
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_usbdev.c
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* arch/arm/src/stm32/stm32_usbfs.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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@ -18,11 +18,6 @@
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*
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****************************************************************************/
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/* References:
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* - RM0008 Reference manual, STMicro document ID 13902
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* - STM32F10xxx USB development kit, UM0424, STMicro
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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@ -50,9 +45,9 @@
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#include "stm32.h"
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#include "stm32_syscfg.h"
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#include "stm32_gpio.h"
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#include "stm32_usbdev.h"
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#include "stm32_usbfs.h"
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#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
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#if defined(CONFIG_STM32_USBFS)
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/****************************************************************************
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* Pre-processor Definitions
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@ -68,26 +63,12 @@
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# define CONFIG_USBDEV_SETUP_MAXDATASIZE CONFIG_USBDEV_EP0_MAXSIZE
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#endif
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/* USB Interrupts. Should be re-mapped if CAN is used. */
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#ifdef CONFIG_STM32_STM32F30XX
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# ifdef CONFIG_STM32_USB_ITRMP
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# define STM32_IRQ_USBHP STM32_IRQ_USBHP_2
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# define STM32_IRQ_USBLP STM32_IRQ_USBLP_2
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# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_2
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# else
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# define STM32_IRQ_USBHP STM32_IRQ_USBHP_1
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# define STM32_IRQ_USBLP STM32_IRQ_USBLP_1
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# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_1
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# endif
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#endif
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/* Extremely detailed register debug that you would normally never want
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* enabled.
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*/
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#ifndef CONFIG_DEBUG_USB_INFO
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# undef CONFIG_STM32_USBDEV_REGDEBUG
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# undef CONFIG_STM32_USBFS_REGDEBUG
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#endif
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/* Initial interrupt mask: Reset + Suspend + Correct Transfer */
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@ -373,7 +354,7 @@ struct stm32_usbdev_s
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/* Register operations ******************************************************/
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#ifdef CONFIG_STM32_USBDEV_REGDEBUG
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#ifdef CONFIG_STM32_USBFS_REGDEBUG
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static uint16_t stm32_getreg(uint32_t addr);
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static void stm32_putreg(uint16_t val, uint32_t addr);
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static void stm32_checksetup(void);
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@ -512,6 +493,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep);
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static int stm32_getframe(struct usbdev_s *dev);
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static int stm32_wakeup(struct usbdev_s *dev);
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static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered);
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static int stm32_pullup(struct usbdev_s *dev, bool enable);
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/* Initialization/Reset *****************************************************/
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@ -548,7 +530,7 @@ static const struct usbdev_ops_s g_devops =
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.getframe = stm32_getframe,
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.wakeup = stm32_wakeup,
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.selfpowered = stm32_selfpowered,
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.pullup = stm32_usbpullup,
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.pullup = stm32_pullup,
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};
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/****************************************************************************
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@ -640,7 +622,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
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* Name: stm32_getreg
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****************************************************************************/
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#ifdef CONFIG_STM32_USBDEV_REGDEBUG
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#ifdef CONFIG_STM32_USBFS_REGDEBUG
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static uint16_t stm32_getreg(uint32_t addr)
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{
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static uint32_t prevaddr = 0;
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@ -699,7 +681,7 @@ static uint16_t stm32_getreg(uint32_t addr)
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* Name: stm32_putreg
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****************************************************************************/
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#ifdef CONFIG_STM32_USBDEV_REGDEBUG
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#ifdef CONFIG_STM32_USBFS_REGDEBUG
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static void stm32_putreg(uint16_t val, uint32_t addr)
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{
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/* Show the register value being written */
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@ -716,7 +698,7 @@ static void stm32_putreg(uint16_t val, uint32_t addr)
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* Name: stm32_dumpep
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****************************************************************************/
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#ifdef CONFIG_STM32_USBDEV_REGDEBUG
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#ifdef CONFIG_STM32_USBFS_REGDEBUG
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static void stm32_dumpep(int epno)
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{
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uint32_t addr;
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@ -759,18 +741,18 @@ static void stm32_dumpep(int epno)
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* Name: stm32_checksetup
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****************************************************************************/
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#ifdef CONFIG_STM32_USBDEV_REGDEBUG
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#ifdef CONFIG_STM32_USBFS_REGDEBUG
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static void stm32_checksetup(void)
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{
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uint32_t cfgr = getreg32(STM32_RCC_CFGR);
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uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR);
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uint32_t apb1enr = getreg32(STM32_RCC_APB1ENR);
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uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR1);
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uint32_t apb1enr = getreg32(STM32_RCC_APB1ENR1);
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uinfo("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n",
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cfgr, apb1rstr, apb1enr);
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if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 ||
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(apb1enr & RCC_APB1ENR_USBEN) == 0)
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if ((apb1rstr & RCC_APB1RSTR1_USBRST) != 0 ||
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(apb1enr & RCC_APB1ENR1_USBEN) == 0)
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{
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uerr("ERROR: USB is NOT setup correctly\n");
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}
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@ -787,7 +769,7 @@ static void stm32_checksetup(void)
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static inline void stm32_seteptxcount(uint8_t epno, uint16_t count)
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{
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volatile uint32_t *epaddr = (uint32_t *)STM32_USB_COUNT_TX(epno);
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volatile uint16_t *epaddr = (uint16_t *)STM32_USB_COUNT_TX(epno);
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*epaddr = count;
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}
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@ -797,7 +779,7 @@ static inline void stm32_seteptxcount(uint8_t epno, uint16_t count)
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static inline void stm32_seteptxaddr(uint8_t epno, uint16_t addr)
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{
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volatile uint32_t *txaddr = (uint32_t *)STM32_USB_ADDR_TX(epno);
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volatile uint16_t *txaddr = (uint16_t *)STM32_USB_ADDR_TX(epno);
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*txaddr = addr;
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}
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@ -807,7 +789,7 @@ static inline void stm32_seteptxaddr(uint8_t epno, uint16_t addr)
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static inline uint16_t stm32_geteptxaddr(uint8_t epno)
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{
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volatile uint32_t *txaddr = (uint32_t *)STM32_USB_ADDR_TX(epno);
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volatile uint16_t *txaddr = (uint16_t *)STM32_USB_ADDR_TX(epno);
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return (uint16_t)*txaddr;
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}
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@ -817,7 +799,7 @@ static inline uint16_t stm32_geteptxaddr(uint8_t epno)
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static void stm32_seteprxcount(uint8_t epno, uint16_t count)
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{
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volatile uint32_t *epaddr = (uint32_t *)STM32_USB_COUNT_RX(epno);
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volatile uint16_t *epaddr = (uint16_t *)STM32_USB_COUNT_RX(epno);
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uint32_t rxcount = 0;
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uint16_t nblocks;
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@ -866,7 +848,7 @@ static void stm32_seteprxcount(uint8_t epno, uint16_t count)
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static inline uint16_t stm32_geteprxcount(uint8_t epno)
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{
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volatile uint32_t *epaddr = (uint32_t *)STM32_USB_COUNT_RX(epno);
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volatile uint16_t *epaddr = (uint16_t *)STM32_USB_COUNT_RX(epno);
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return (*epaddr) & USB_COUNT_RX_MASK;
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}
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@ -876,7 +858,7 @@ static inline uint16_t stm32_geteprxcount(uint8_t epno)
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static inline void stm32_seteprxaddr(uint8_t epno, uint16_t addr)
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{
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volatile uint32_t *rxaddr = (uint32_t *)STM32_USB_ADDR_RX(epno);
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volatile uint16_t *rxaddr = (uint16_t *)STM32_USB_ADDR_RX(epno);
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*rxaddr = addr;
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}
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@ -886,7 +868,7 @@ static inline void stm32_seteprxaddr(uint8_t epno, uint16_t addr)
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static inline uint16_t stm32_geteprxaddr(uint8_t epno)
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{
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volatile uint32_t *rxaddr = (uint32_t *)STM32_USB_ADDR_RX(epno);
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volatile uint16_t *rxaddr = (uint16_t *)STM32_USB_ADDR_RX(epno);
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return (uint16_t)*rxaddr;
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}
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@ -1134,20 +1116,14 @@ static void stm32_copytopma(const uint8_t *buffer,
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/* Copy loop. Source=user buffer, Dest=packet memory */
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dest = (uint16_t *)(STM32_USBRAM_BASE + ((uint32_t)pma << 1));
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dest = (uint16_t *)(STM32_USBRAM_BASE + (uint32_t)pma);
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for (i = nwords; i != 0; i--)
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{
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/* Read two bytes and pack into on 16-bit word */
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ls = (uint16_t)(*buffer++);
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ms = (uint16_t)(*buffer++);
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*dest = ms << 8 | ls;
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/* Source address increments by 2*sizeof(uint8_t) = 2; Dest address
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* increments by 2*sizeof(uint16_t) = 4.
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*/
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dest += 2;
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*dest++ = ms << 8 | ls;
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}
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}
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@ -1158,20 +1134,20 @@ static void stm32_copytopma(const uint8_t *buffer,
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static inline void
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stm32_copyfrompma(uint8_t *buffer, uint16_t pma, uint16_t nbytes)
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{
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uint32_t *src;
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uint16_t *src;
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int nwords = (nbytes + 1) >> 1;
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||||
int i;
|
||||
|
||||
/* Copy loop. Source=packet memory, Dest=user buffer */
|
||||
|
||||
src = (uint32_t *)(STM32_USBRAM_BASE + ((uint32_t)pma << 1));
|
||||
src = (uint16_t *)(STM32_USBRAM_BASE + (uint32_t)pma);
|
||||
for (i = nwords; i != 0; i--)
|
||||
{
|
||||
/* Copy 16-bits from packet memory to user buffer. */
|
||||
|
||||
*(uint16_t *)buffer = *src++;
|
||||
|
||||
/* Source address increments by 1*sizeof(uint32_t) = 4; Dest address
|
||||
/* Source address increments by 1*sizeof(uint16_t) = 2; Dest address
|
||||
* increments by 2*sizeof(uint8_t) = 2.
|
||||
*/
|
||||
|
||||
@ -3541,6 +3517,41 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_pullup
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_pullup(struct usbdev_s *dev, bool enable)
|
||||
{
|
||||
uint32_t regval;
|
||||
irqstate_t flags;
|
||||
|
||||
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
|
||||
|
||||
flags = enter_critical_section();
|
||||
regval = stm32_getreg(STM32_USB_BCDR);
|
||||
if (enable)
|
||||
{
|
||||
/* Connect the device by setting the DP pull-up bit in the BCDR
|
||||
* register.
|
||||
*/
|
||||
|
||||
regval |= USB_BCDR_DPPU;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disconnect the device by clearing the DP pull-up bit in the BCDR
|
||||
* register.
|
||||
*/
|
||||
|
||||
regval &= ~USB_BCDR_DPPU;
|
||||
}
|
||||
|
||||
stm32_putreg(regval, STM32_USB_BCDR);
|
||||
leave_critical_section(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Initialization/Reset
|
||||
****************************************************************************/
|
||||
@ -3651,6 +3662,19 @@ static void stm32_hwsetup(struct stm32_usbdev_s *priv)
|
||||
{
|
||||
int epno;
|
||||
|
||||
#ifdef CONFIG_STM32_STM32G47XX
|
||||
/* FIXME
|
||||
* Because stm32g4xxxx_rcc.c does not handle HSI48 for now,
|
||||
* enable HSI48 clock for USB block here and wait till HSI48 is ready.
|
||||
*/
|
||||
|
||||
modifyreg32(STM32_RCC_CRRCR, RCC_CRRCR_HSI48ON, RCC_CRRCR_HSI48ON);
|
||||
while (!(getreg32(STM32_RCC_CRRCR) & RCC_CRRCR_HSI48RDY))
|
||||
{
|
||||
/* nothing to do here */
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Power the USB controller, put the USB controller into reset, disable
|
||||
* all USB interrupts
|
||||
*/
|
||||
@ -3661,7 +3685,7 @@ static void stm32_hwsetup(struct stm32_usbdev_s *priv)
|
||||
* host to enumerate us until the class driver is registered.
|
||||
*/
|
||||
|
||||
stm32_usbpullup(&priv->usbdev, false);
|
||||
stm32_pullup(&priv->usbdev, false);
|
||||
|
||||
/* Initialize the device state structure. NOTE: many fields
|
||||
* have the initial value of zero and, hence, are not explicitly
|
||||
@ -3742,7 +3766,7 @@ static void stm32_hwshutdown(struct stm32_usbdev_s *priv)
|
||||
|
||||
/* Disconnect the device / disable the pull-up */
|
||||
|
||||
stm32_usbpullup(&priv->usbdev, false);
|
||||
stm32_pullup(&priv->usbdev, false);
|
||||
|
||||
/* Power down the USB controller */
|
||||
|
||||
@ -3777,13 +3801,6 @@ void arm_usbinitialize(void)
|
||||
usbtrace(TRACE_DEVINIT, 0);
|
||||
stm32_checksetup();
|
||||
|
||||
/* Configure USB GPIO alternate function pins */
|
||||
|
||||
#ifdef CONFIG_STM32_STM32F30XX
|
||||
stm32_configgpio(GPIO_USB_DM);
|
||||
stm32_configgpio(GPIO_USB_DP);
|
||||
#endif
|
||||
|
||||
/* Power up the USB controller, but leave it in the reset state */
|
||||
|
||||
stm32_hwsetup(priv);
|
||||
@ -3792,18 +3809,6 @@ void arm_usbinitialize(void)
|
||||
* (Only supported by the STM32 F3 family)
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_STM32_STM32F30XX
|
||||
# ifdef CONFIG_STM32_USB_ITRMP
|
||||
/* Clear the ITRMP bit to use the legacy, shared USB/CAN interrupts */
|
||||
|
||||
modifyreg32(STM32_RCC_APB1ENR, SYSCFG_CFGR1_USB_ITRMP, 0);
|
||||
# else
|
||||
/* Set the ITRMP bit to use the STM32 F3's dedicated USB interrupts */
|
||||
|
||||
modifyreg32(STM32_RCC_APB1ENR, 0, SYSCFG_CFGR1_USB_ITRMP);
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* Attach USB controller interrupt handlers. The hardware will not be
|
||||
* initialized and interrupts will not be enabled until the class device
|
||||
* driver is bound. Getting the IRQs here only makes sure that we have
|
||||
@ -3938,7 +3943,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
|
||||
* some time after this
|
||||
*/
|
||||
|
||||
stm32_usbpullup(&priv->usbdev, true);
|
||||
stm32_pullup(&priv->usbdev, true);
|
||||
priv->usbdev.speed = USB_SPEED_FULL;
|
||||
}
|
||||
|
||||
@ -4007,4 +4012,4 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_USBDEV && CONFIG_STM32_USB */
|
||||
#endif /* CONFIG_STM32_USBFS */
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32/stm32_usbdev.h
|
||||
* arch/arm/src/stm32/stm32_usbfs.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@ -18,8 +18,8 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_STM32_STM32_USBDEV_H
|
||||
#define __ARCH_ARM_SRC_STM32_STM32_USBDEV_H
|
||||
#ifndef __ARCH_ARM_SRC_STM32_STM32_USBFS_H
|
||||
#define __ARCH_ARM_SRC_STM32_STM32_USBFS_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
@ -30,7 +30,7 @@
|
||||
#include <stdint.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "hardware/stm32_usbdev.h"
|
||||
#include "hardware/stm32_usbfs.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions Prototypes
|
||||
@ -47,19 +47,6 @@ extern "C"
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbpullup
|
||||
*
|
||||
* Description:
|
||||
* If USB is supported and the board supports a pullup via GPIO (for USB
|
||||
* software connect and disconnect), then the board software must provide
|
||||
* stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
|
||||
* of this method.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_usbpullup(struct usbdev_s *dev, bool enable);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_usbsuspend
|
||||
*
|
||||
@ -79,4 +66,4 @@ void stm32_usbsuspend(struct usbdev_s *dev, bool resume);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_USBDEV_H */
|
||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_USBFS_H */
|
||||
|
||||
@ -497,7 +497,7 @@ static inline void rcc_enableapb1(void)
|
||||
regval |= RCC_APB1ENR1_I2C2EN;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32_USB)
|
||||
#if defined(CONFIG_STM32_USB) || defined(CONFIG_STM32_USBFS)
|
||||
regval |= RCC_APB1ENR1_USBEN;
|
||||
#endif
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user