diff --git a/arch/arm/src/sam34/sam_clockconfig.c b/arch/arm/src/sam34/sam_clockconfig.c index 3799416b0b..fe114e74cd 100644 --- a/arch/arm/src/sam34/sam_clockconfig.c +++ b/arch/arm/src/sam34/sam_clockconfig.c @@ -139,6 +139,7 @@ static inline void sam_supcsetup(void) if ((getreg32(SAM_SUPC_SR) & SUPC_SR_OSCSEL) == 0) { uint32_t delay; + putreg32((SUPC_CR_XTALSEL|SUPR_CR_KEY), SAM_SUPC_CR); for (delay = 0; (getreg32(SAM_SUPC_SR) & SUPC_SR_OSCSEL) == 0 && delay < UINT32_MAX; @@ -150,7 +151,7 @@ static inline void sam_supcsetup(void) * Name: sam_pmcwait * * Description: - * Wait for the specide PMC status bit to become "1" + * Wait for the specified PMC status bit to become "1" * ****************************************************************************/ @@ -215,7 +216,7 @@ static inline void sam_pmcsetup(void) * established. */ - regval = getreg32(SAM_PMC_MCKR); + regval = getreg32(SAM_PMC_MCKR); regval &= ~PMC_MCKR_CSS_MASK; regval |= PMC_MCKR_CSS_MAIN; putreg32(regval, SAM_PMC_MCKR); @@ -228,7 +229,7 @@ static inline void sam_pmcsetup(void) * to PLLA_MMAX. */ - putreg32(PMC_PMMR_MASK, SAM_PMC_PMMR); + //putreg32(PMC_PMMR_MASK, SAM_PMC_PMMR); #endif /* Setup PLLA and wait for LOCKA */ @@ -349,4 +350,3 @@ void sam_clockconfig(void) sam_enabledefaultmaster(); } - diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index 7420a4679c..f82c74f9e6 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -739,8 +739,13 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, SAM_UART_MR_OFFSET, regval); - /* Configure the console baud. NOTE: Oversampling by 8 is not supported. - * This may limit BAUD rates for lower USART clocks. + /* Configure the console baud: + * + * Fbaud = USART_CLOCK / (16 * divisor) + * divisor = USART_CLOCK / (16 * Fbaud) + * + * NOTE: Oversampling by 8 is not supported. This may limit BAUD rates + * for lower USART clocks. */ regval = (SAM_USART_CLOCK + (priv->baud << 3))/(priv->baud << 4); diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt index 0f4ca83acf..62b6b19818 100644 --- a/configs/sam4e-ek/README.txt +++ b/configs/sam4e-ek/README.txt @@ -15,6 +15,8 @@ Contents - NuttX OABI "buildroot" Toolchain - NXFLAT Toolchain - Atmel Studio 6.1 + - Loading Code with J-Link + - Writing to FLASH using SAM-BA - LEDs - Serial Console - SAM4E-EK-specific Configuration Options @@ -224,22 +226,74 @@ Atmel Studio 6.1 - Debugging the NuttX Object File: - 1) Rename object file from nutt to nuttx.elf. That is an extension that - will be recognized by the file menu. + 1) Rename object file from nutt to nuttx.elf. That is an extension that + will be recognized by the file menu. - 2) Select the project name, the full path to the NuttX object (called - just nuttx with no extension), and chip. Take the time to resolve - all of the source file linkages or else you will not have source - level debug! + 2) Select the project name, the full path to the NuttX object (called + just nuttx with no extension), and chip. Take the time to resolve + all of the source file linkages or else you will not have source + level debug! - File menu: File -> Open -> Open object file for debugging - - Select nuttx.elf object file - - Select AT91SAM4E16 - - Select files for symbols as desired - - Select debugger + File menu: File -> Open -> Open object file for debugging + - Select nuttx.elf object file + - Select AT91SAM4E16 + - Select files for symbols as desired + - Select debugger - 3) Debug menu: Debug -> Start debugging and break - - This will reload the nuttx.elf file into FLASH + 3) Debug menu: Debug -> Start debugging and break + - This will reload the nuttx.elf file into FLASH + + STATUS: At this point, Atmel Studio 6.1 claims that my object files are + not readable. A little more needs to be done to wring out this procedure. + +Loading Code into SRAM with J-Link +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Loading code with the Segger tools and GDB + ------------------------------------------ + + 1) Change directories into the directory where you built NuttX. + 2) Start the GDB server and wait until it is ready to accept GDB + connections. + 3) Then run GDB like this: + + $ arm-none-eabi-gdb + (gdb) target remote localhost:2331 + (gdb) mon reset + (gdb) load nuttx + (gdb) ... start debugging ... + + Loading code using J-Link Commander + ---------------------------------- + + J-Link> r + J-Link> loadbin
+ J-Link> setpc
+ J-Link> ... start debugging ... + + STATUS: As of this writing, I have no been successful writing to FLASH + using the GDB server. I think that this is because of issues with GPNVM1 + settings and flash lock bits. In any event, the GDB server works great for + debugging after writing the program to FLASH using SAM-BA. + +Writing to FLASH using SAM-BA +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Assumed starting configuration: + + 1. You have installed the J-Link USB driver + + Using SAM-BA to write to FLASH: + + 1. Start the SAM-BA application, selecting (1) the SAM-ICE/J-Link + port, and (2) board = at91sam4e16-ek. + 2. The SAM-BA menu should appear. + 3. Select the FLASH tab and enable FLASH access + 4. "Send" the file to flash + 5. Enable "Boot from Flash (GPNVM1) + 6. Reset the board. + + STATUS: Works great! LEDs ^^^^ @@ -270,17 +324,20 @@ Serial Console ^^^^^^^^^^^^^^ By default, all of these configurations use UART0 for the NuttX serial - console. UART0 corresponds to the DB-9 connector labelled "UART". This - is a male connector and will require a female-to-female, NUL modem cable - to connect to a PC. + console. UART0 corresponds to the DB-9 connector J17 labelled "DBGU". + This is a male connector and will require a female-to-female, NUL modem + cable to connect to a PC. - An alternate is USART1 which connects to the other DB-9 connector labeled - "USART". USART1 is not enabled by default unless specifically noted + An alternate is USART1 which connects to the other DB-9 connector labelled + "USART1". USART1 is not enabled by default unless specifically noted otherwise in the configuration description. A NUL modem cable must be used with the port as well. - NOTE: One of the USART1 pins is shared with the audio CODEC. The audio - CODEC cannot be used of USART1 is enabled. + NOTE: To avoid any electrical conflict, the RS232 and RS485 transceiver + are isolated from the receiving line PA21. + + - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level By default serial console is configured for 115000, 8-bit, 1 stop bit, and no parity. diff --git a/configs/sam4e-ek/include/board.h b/configs/sam4e-ek/include/board.h index 92dfa50887..9ccaa7e1ca 100644 --- a/configs/sam4e-ek/include/board.h +++ b/configs/sam4e-ek/include/board.h @@ -54,17 +54,17 @@ ************************************************************************************/ /* Clocking *************************************************************************/ -/* After power-on reset, the SAM4E16 device is running on a 4MHz internal RC. These - * definitions will configure clocking +/* After power-on reset, the SAM4E16 device is running out of the Master Clock using + * the Fast RC Oscillator running at 4 MHz. * - * MAINOSC: Frequency = 12MHz (crysta) + * MAINOSC: Frequency = 12MHz (crystal) * * CONFIG_SAM4EEK_120MHZ * PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 120MHz * CPU clock: 120MHz * - * CONFIG_SAM4EEK_196MHZ + * CONFIG_SAM4EEK_96MHZ * PLLA: PLL Divider = 1, Multiplier = 16 to generate PLLACK = 192MHz * Master Clock (MCK): Source = PLLACK, Prescalar = 1 to generate MCK = 96MHz * CPU clock: 96MHz @@ -85,9 +85,9 @@ */ #ifdef CONFIG_SAM4EEK_120MHZ -# define BOARD_CKGR_PLLAR_MUL (20 << PMC_CKGR_PLLAR_MUL_SHIFT) +# define BOARD_CKGR_PLLAR_MUL (19 << PMC_CKGR_PLLAR_MUL_SHIFT) #else -# define BOARD_CKGR_PLLAR_MUL (16 << PMC_CKGR_PLLAR_MUL_SHIFT) +# define BOARD_CKGR_PLLAR_MUL (15 << PMC_CKGR_PLLAR_MUL_SHIFT) #endif #define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST @@ -116,7 +116,6 @@ # define BOARD_MCK_FREQUENCY (120000000) /* MCK: PLLACK / 2 */ # define BOARD_CPU_FREQUENCY (120000000) /* CPU: MCK */ #else -# define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ # define BOARD_PLLA_FREQUENCY (192000000) /* PLLACK: 16 * 12Mhz / 1 */ # define BOARD_MCK_FREQUENCY (96000000) /* MCK: PLLACK / 2 */ # define BOARD_CPU_FREQUENCY (96000000) /* CPU: MCK */ diff --git a/configs/sam4e-ek/scripts/flash.ld b/configs/sam4e-ek/scripts/flash.ld index cc61cfa475..1a8d3a3995 100755 --- a/configs/sam4e-ek/scripts/flash.ld +++ b/configs/sam4e-ek/scripts/flash.ld @@ -33,7 +33,7 @@ * ****************************************************************************/ -/* The SAM4E16 has 1025KB of FLASH beginning at address 0x0008:0000, +/* The SAM4E16 has 1024KB of FLASH beginning at address 0x0040:0000, * 128KB of SRAM beginning at address 0x2000:0000. When booting from FLASH, * FLASH memory is aliased to address 0x0000:0000 where the code expects to * begin execution by jumping to the entry point in the 0x0800:0000 address @@ -42,7 +42,7 @@ MEMORY { - flash (rx) : ORIGIN = 0x00080000, LENGTH = 1024K + flash (rx) : ORIGIN = 0x00400000, LENGTH = 1024K sram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K } diff --git a/configs/sam4e-ek/src/sam4e-ek.h b/configs/sam4e-ek/src/sam4e-ek.h index 09ec05d01b..e1fc2bfa18 100644 --- a/configs/sam4e-ek/src/sam4e-ek.h +++ b/configs/sam4e-ek/src/sam4e-ek.h @@ -235,6 +235,18 @@ #define IRQ_WAKU SAM_IRQ_PA19 #define IRQ_TAMP SAM_IRQ_PA20 +/* USART1: To avoid any electrical conflict, the RS232 and RS485 transceiver + * are isolated from the receiving line PA21. + * + * - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + * - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level + */ + +#define GPIO_RS232_ENABLE (GPIO_OUTPUT | GPIO_CFG_DEFAULT | \ + GPIO_OUTPUT_CLEAR | GPIO_PORT_PIOA | GPIO_PIN21) +#define GPIO_RS485_ENABLE (GPIO_OUTPUT | GPIO_CFG_DEFAULT | \ + GPIO_OUTPUT_SET | GPIO_PORT_PIOA | GPIO_PIN21) + /* SD Card Detect */ #define GPIO_MCI_CD (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_PORT_PIOA | GPIO_PIN25) diff --git a/configs/sam4e-ek/src/sam_boot.c b/configs/sam4e-ek/src/sam_boot.c index 4bed7b2a2c..5f6216366f 100644 --- a/configs/sam4e-ek/src/sam_boot.c +++ b/configs/sam4e-ek/src/sam_boot.c @@ -47,13 +47,38 @@ #include "sam4e-ek.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /************************************************************************************ * Private Functions ************************************************************************************/ +/************************************************************************************ + * Name: board_config_usart1 + * + * Description: + * USART1: To avoid any electrical conflict, the RS232 and RS485 transceiver are + * isolated from the receiving line PA21. + * + * - Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level + * - Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level + * + ************************************************************************************/ + +#ifdef CONFIG_SAM34_USART1 +static inline void board_config_usart1(void) +{ +#if defined(CONFIG_USART1_ISUART) + (void)sam_configgpio(GPIO_RS232_ENABLE); +#else /* if defined(CONFIG_USART1_RS485) */ + (void)sam_configgpio(GPIO_RS485_ENABLE); +#endif +} +#else +# define board_config_usart1() +#endif + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -70,6 +95,10 @@ void sam_boardinitialize(void) { + /* Configure USART1 for RS-232/RS-485 operation */ + + board_config_usart1(); + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function * sam_spiinitialize() has been brought into the link. */