From cefa1b28e13f95b62042965049fd7eb3c1877222 Mon Sep 17 00:00:00 2001 From: YAMAMOTO Takashi Date: Fri, 20 Nov 2020 17:54:45 +0900 Subject: [PATCH] arch/arm/src/stm32/stm32_otgfsdev.c: Appease nxstyle --- arch/arm/src/stm32/stm32_otgfsdev.c | 694 ++++++++++++++++------------ 1 file changed, 405 insertions(+), 289 deletions(-) diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 63fee03e5e..667a2a4ad0 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -68,7 +68,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* Configuration ***************************************************************/ +/* Configuration ************************************************************/ #ifndef CONFIG_USBDEV_EP0_MAXSIZE # define CONFIG_USBDEV_EP0_MAXSIZE 64 @@ -118,7 +118,8 @@ # error "FIFO allocations exceed FIFO memory size" #endif -/* The actual FIFO addresses that we use must be aligned to 4-byte boundaries; +/* The actual FIFO addresses that we use must be aligned to 4-byte + * boundaries; * FIFO sizes must be provided in units of 32-bit words. */ @@ -196,7 +197,7 @@ OTGFS_GINT_WKUP) #endif -/* Debug ***********************************************************************/ +/* Debug ********************************************************************/ /* Trace error codes */ @@ -283,7 +284,7 @@ #define STM32_TRACEINTID_SETUPDONE (90 + 3) #define STM32_TRACEINTID_SETUPRECVD (90 + 4) -/* Endpoints ******************************************************************/ +/* Endpoints ****************************************************************/ /* Number of endpoints */ @@ -306,17 +307,17 @@ #define STM32_MAXPACKET (64) /* Max packet size (1-64) */ -/* Delays **********************************************************************/ +/* Delays *******************************************************************/ #define STM32_READY_DELAY 200000 #define STM32_FLUSH_DELAY 200000 -/* Request queue operations ****************************************************/ +/* Request queue operations *************************************************/ #define stm32_rqempty(ep) ((ep)->head == NULL) #define stm32_rqpeek(ep) ((ep)->head) -/* Standard stuff **************************************************************/ +/* Standard stuff ***********************************************************/ #ifndef MIN # define MIN(a,b) ((a) < (b) ? (a) : (b)) @@ -520,7 +521,7 @@ struct stm32_usbdev_s * Private Function Prototypes ****************************************************************************/ -/* Register operations ********************************************************/ +/* Register operations ******************************************************/ #ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint32_t stm32_getreg(uint32_t addr); @@ -530,13 +531,14 @@ static void stm32_putreg(uint32_t val, uint32_t addr); # define stm32_putreg(val,addr) putreg32(val,addr) #endif -/* Request queue operations ****************************************************/ +/* Request queue operations *************************************************/ -static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep); +static FAR struct stm32_req_s *stm32_req_remfirst( + FAR struct stm32_ep_s *privep); static bool stm32_req_addlast(FAR struct stm32_ep_s *privep, FAR struct stm32_req_s *req); -/* Low level data transfers and request operations *****************************/ +/* Low level data transfers and request operations **************************/ /* Special endpoint 0 data transfer logic */ @@ -560,11 +562,14 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, FAR uint8_t *dest, uint16_t len); -static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len); +static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, + int len); static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, FAR struct stm32_ep_s *privep); -static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt); -static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt); +static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, + int bcnt); +static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, + int bcnt); static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, FAR struct stm32_ep_s *privep); @@ -576,10 +581,11 @@ static void stm32_req_complete(FAR struct stm32_ep_s *privep, static void stm32_req_cancel(FAR struct stm32_ep_s *privep, int16_t status); -/* Interrupt handling **********************************************************/ +/* Interrupt handling *******************************************************/ -static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, - uint16_t eplog); +static struct stm32_ep_s *stm32_ep_findbyaddr( + struct stm32_usbdev_s *priv, + uint16_t eplog); static int stm32_req_dispatch(FAR struct stm32_usbdev_s *priv, FAR const struct usb_ctrlreq_s *ctrl); static void stm32_usbreset(FAR struct stm32_usbdev_s *priv); @@ -599,7 +605,8 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv); static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv); static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno); -static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int epno); +static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, + int epno); static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv); /* Other second level interrupt processing */ @@ -619,9 +626,10 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv); /* First level interrupt processing */ -static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg); +static int stm32_usbinterrupt(int irq, FAR void *context, + FAR void *arg); -/* Endpoint operations *********************************************************/ +/* Endpoint operations ******************************************************/ /* Global OUT NAK controls */ @@ -646,15 +654,18 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep); /* Endpoint request management */ -static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep); +static FAR struct usbdev_req_s *stm32_ep_allocreq( + FAR struct usbdev_ep_s *ep); static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *); /* Endpoint buffer management */ #ifdef CONFIG_USBDEV_DMA -static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, uint16_t bytes); -static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf); +static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, + uint16_t bytes); +static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, + FAR void *buf); #endif /* Endpoint request submission */ @@ -683,7 +694,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep); -/* USB device controller operations ********************************************/ +/* USB device controller operations *****************************************/ static int stm32_getframe(struct usbdev_s *dev); static int stm32_wakeup(struct usbdev_s *dev); @@ -694,7 +705,7 @@ static void stm32_setaddress(struct stm32_usbdev_s *priv, static int stm32_txfifo_flush(uint32_t txfnum); static int stm32_rxfifo_flush(void); -/* Initialization **************************************************************/ +/* Initialization ***********************************************************/ static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv); static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv); @@ -741,37 +752,37 @@ static const struct usbdev_ops_s g_devops = #ifdef CONFIG_USBDEV_TRACE_STRINGS const struct trace_msg_t g_usb_trace_strings_deverror[] = { - TRACE_STR(STM32_TRACEERR_ALLOCFAIL ), - TRACE_STR(STM32_TRACEERR_BADCLEARFEATURE ), - TRACE_STR(STM32_TRACEERR_BADDEVGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADEPNO ), - TRACE_STR(STM32_TRACEERR_BADEPGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADGETCONFIG ), - TRACE_STR(STM32_TRACEERR_BADGETSETDESC ), - TRACE_STR(STM32_TRACEERR_BADGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADSETADDRESS ), - TRACE_STR(STM32_TRACEERR_BADSETCONFIG ), - TRACE_STR(STM32_TRACEERR_BADSETFEATURE ), - TRACE_STR(STM32_TRACEERR_BADTESTMODE ), - TRACE_STR(STM32_TRACEERR_BINDFAILED ), - TRACE_STR(STM32_TRACEERR_DISPATCHSTALL ), - TRACE_STR(STM32_TRACEERR_DRIVER ), + TRACE_STR(STM32_TRACEERR_ALLOCFAIL), + TRACE_STR(STM32_TRACEERR_BADCLEARFEATURE), + TRACE_STR(STM32_TRACEERR_BADDEVGETSTATUS), + TRACE_STR(STM32_TRACEERR_BADEPNO), + TRACE_STR(STM32_TRACEERR_BADEPGETSTATUS), + TRACE_STR(STM32_TRACEERR_BADGETCONFIG), + TRACE_STR(STM32_TRACEERR_BADGETSETDESC), + TRACE_STR(STM32_TRACEERR_BADGETSTATUS), + TRACE_STR(STM32_TRACEERR_BADSETADDRESS), + TRACE_STR(STM32_TRACEERR_BADSETCONFIG), + TRACE_STR(STM32_TRACEERR_BADSETFEATURE), + TRACE_STR(STM32_TRACEERR_BADTESTMODE), + TRACE_STR(STM32_TRACEERR_BINDFAILED), + TRACE_STR(STM32_TRACEERR_DISPATCHSTALL), + TRACE_STR(STM32_TRACEERR_DRIVER), TRACE_STR(STM32_TRACEERR_DRIVERREGISTERED), - TRACE_STR(STM32_TRACEERR_EP0NOSETUP ), - TRACE_STR(STM32_TRACEERR_EP0SETUPSTALLED ), - TRACE_STR(STM32_TRACEERR_EPINNULLPACKET ), - TRACE_STR(STM32_TRACEERR_EPINUNEXPECTED ), - TRACE_STR(STM32_TRACEERR_EPOUTNULLPACKET ), - TRACE_STR(STM32_TRACEERR_EPOUTUNEXPECTED ), - TRACE_STR(STM32_TRACEERR_INVALIDCTRLREQ ), - TRACE_STR(STM32_TRACEERR_INVALIDPARMS ), - TRACE_STR(STM32_TRACEERR_IRQREGISTRATION ), - TRACE_STR(STM32_TRACEERR_NOEP ), - TRACE_STR(STM32_TRACEERR_NOTCONFIGURED ), - TRACE_STR(STM32_TRACEERR_EPOUTQEMPTY ), - TRACE_STR(STM32_TRACEERR_EPINREQEMPTY ), - TRACE_STR(STM32_TRACEERR_NOOUTSETUP ), - TRACE_STR(STM32_TRACEERR_POLLTIMEOUT ), + TRACE_STR(STM32_TRACEERR_EP0NOSETUP), + TRACE_STR(STM32_TRACEERR_EP0SETUPSTALLED), + TRACE_STR(STM32_TRACEERR_EPINNULLPACKET), + TRACE_STR(STM32_TRACEERR_EPINUNEXPECTED), + TRACE_STR(STM32_TRACEERR_EPOUTNULLPACKET), + TRACE_STR(STM32_TRACEERR_EPOUTUNEXPECTED), + TRACE_STR(STM32_TRACEERR_INVALIDCTRLREQ), + TRACE_STR(STM32_TRACEERR_INVALIDPARMS), + TRACE_STR(STM32_TRACEERR_IRQREGISTRATION), + TRACE_STR(STM32_TRACEERR_NOEP), + TRACE_STR(STM32_TRACEERR_NOTCONFIGURED), + TRACE_STR(STM32_TRACEERR_EPOUTQEMPTY), + TRACE_STR(STM32_TRACEERR_EPINREQEMPTY), + TRACE_STR(STM32_TRACEERR_NOOUTSETUP), + TRACE_STR(STM32_TRACEERR_POLLTIMEOUT), TRACE_STR_END }; #endif @@ -783,48 +794,48 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] = #ifdef CONFIG_USBDEV_TRACE_STRINGS const struct trace_msg_t g_usb_trace_strings_intdecode[] = { - TRACE_STR(STM32_TRACEINTID_USB ), - TRACE_STR(STM32_TRACEINTID_INTPENDING ), - TRACE_STR(STM32_TRACEINTID_EPOUT ), - TRACE_STR(STM32_TRACEINTID_EPIN ), - TRACE_STR(STM32_TRACEINTID_MISMATCH ), - TRACE_STR(STM32_TRACEINTID_WAKEUP ), - TRACE_STR(STM32_TRACEINTID_SUSPEND ), - TRACE_STR(STM32_TRACEINTID_SOF ), - TRACE_STR(STM32_TRACEINTID_RXFIFO ), - TRACE_STR(STM32_TRACEINTID_DEVRESET ), - TRACE_STR(STM32_TRACEINTID_ENUMDNE ), - TRACE_STR(STM32_TRACEINTID_IISOIXFR ), - TRACE_STR(STM32_TRACEINTID_IISOOXFR ), - TRACE_STR(STM32_TRACEINTID_SRQ ), - TRACE_STR(STM32_TRACEINTID_OTG ), - TRACE_STR(STM32_TRACEINTID_EPOUT_XFRC ), + TRACE_STR(STM32_TRACEINTID_USB), + TRACE_STR(STM32_TRACEINTID_INTPENDING), + TRACE_STR(STM32_TRACEINTID_EPOUT), + TRACE_STR(STM32_TRACEINTID_EPIN), + TRACE_STR(STM32_TRACEINTID_MISMATCH), + TRACE_STR(STM32_TRACEINTID_WAKEUP), + TRACE_STR(STM32_TRACEINTID_SUSPEND), + TRACE_STR(STM32_TRACEINTID_SOF), + TRACE_STR(STM32_TRACEINTID_RXFIFO), + TRACE_STR(STM32_TRACEINTID_DEVRESET), + TRACE_STR(STM32_TRACEINTID_ENUMDNE), + TRACE_STR(STM32_TRACEINTID_IISOIXFR), + TRACE_STR(STM32_TRACEINTID_IISOOXFR), + TRACE_STR(STM32_TRACEINTID_SRQ), + TRACE_STR(STM32_TRACEINTID_OTG), + TRACE_STR(STM32_TRACEINTID_EPOUT_XFRC), TRACE_STR(STM32_TRACEINTID_EPOUT_EPDISD), - TRACE_STR(STM32_TRACEINTID_EPOUT_SETUP ), - TRACE_STR(STM32_TRACEINTID_DISPATCH ), - TRACE_STR(STM32_TRACEINTID_GETSTATUS ), - TRACE_STR(STM32_TRACEINTID_EPGETSTATUS ), + TRACE_STR(STM32_TRACEINTID_EPOUT_SETUP), + TRACE_STR(STM32_TRACEINTID_DISPATCH), + TRACE_STR(STM32_TRACEINTID_GETSTATUS), + TRACE_STR(STM32_TRACEINTID_EPGETSTATUS), TRACE_STR(STM32_TRACEINTID_DEVGETSTATUS), - TRACE_STR(STM32_TRACEINTID_IFGETSTATUS ), + TRACE_STR(STM32_TRACEINTID_IFGETSTATUS), TRACE_STR(STM32_TRACEINTID_CLEARFEATURE), - TRACE_STR(STM32_TRACEINTID_SETFEATURE ), - TRACE_STR(STM32_TRACEINTID_SETADDRESS ), - TRACE_STR(STM32_TRACEINTID_GETSETDESC ), - TRACE_STR(STM32_TRACEINTID_GETCONFIG ), - TRACE_STR(STM32_TRACEINTID_SETCONFIG ), - TRACE_STR(STM32_TRACEINTID_GETSETIF ), - TRACE_STR(STM32_TRACEINTID_SYNCHFRAME ), - TRACE_STR(STM32_TRACEINTID_EPIN_XFRC ), - TRACE_STR(STM32_TRACEINTID_EPIN_TOC ), - TRACE_STR(STM32_TRACEINTID_EPIN_ITTXFE ), - TRACE_STR(STM32_TRACEINTID_EPIN_EPDISD ), - TRACE_STR(STM32_TRACEINTID_EPIN_TXFE ), + TRACE_STR(STM32_TRACEINTID_SETFEATURE), + TRACE_STR(STM32_TRACEINTID_SETADDRESS), + TRACE_STR(STM32_TRACEINTID_GETSETDESC), + TRACE_STR(STM32_TRACEINTID_GETCONFIG), + TRACE_STR(STM32_TRACEINTID_SETCONFIG), + TRACE_STR(STM32_TRACEINTID_GETSETIF), + TRACE_STR(STM32_TRACEINTID_SYNCHFRAME), + TRACE_STR(STM32_TRACEINTID_EPIN_XFRC), + TRACE_STR(STM32_TRACEINTID_EPIN_TOC), + TRACE_STR(STM32_TRACEINTID_EPIN_ITTXFE), + TRACE_STR(STM32_TRACEINTID_EPIN_EPDISD), + TRACE_STR(STM32_TRACEINTID_EPIN_TXFE), TRACE_STR(STM32_TRACEINTID_EPIN_EMPWAIT), - TRACE_STR(STM32_TRACEINTID_OUTNAK ), - TRACE_STR(STM32_TRACEINTID_OUTRECVD ), - TRACE_STR(STM32_TRACEINTID_OUTDONE ), - TRACE_STR(STM32_TRACEINTID_SETUPDONE ), - TRACE_STR(STM32_TRACEINTID_SETUPRECVD ), + TRACE_STR(STM32_TRACEINTID_OUTNAK), + TRACE_STR(STM32_TRACEINTID_OUTRECVD), + TRACE_STR(STM32_TRACEINTID_OUTDONE), + TRACE_STR(STM32_TRACEINTID_SETUPDONE), + TRACE_STR(STM32_TRACEINTID_SETUPRECVD), TRACE_STR_END }; #endif @@ -856,8 +867,8 @@ static uint32_t stm32_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same register last time? Are - * we polling the register? If so, suppress some of the output. + /* Is this the same value that we read from the same register last time? + * Are we polling the register? If so, suppress some of the output. */ if (addr == prevaddr && val == preval) @@ -883,7 +894,7 @@ static uint32_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - uinfo("[repeats %d more times]\n", count-3); + uinfo("[repeats %d more times]\n", count - 3); } /* Save the new address, value, and count */ @@ -929,7 +940,8 @@ static void stm32_putreg(uint32_t val, uint32_t addr) * ****************************************************************************/ -static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep) +static FAR struct stm32_req_s *stm32_req_remfirst( + FAR struct stm32_ep_s *privep) { FAR struct stm32_req_s *ret = privep->head; @@ -971,6 +983,7 @@ static bool stm32_req_addlast(FAR struct stm32_ep_s *privep, privep->tail->flink = req; privep->tail = req; } + return is_empty; } @@ -1137,7 +1150,9 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, if (nbytes == 0) { - /* Yes.. leave the transfer size at zero and set the packet count to 1 */ + /* Yes.. leave the transfer size at zero and set the packet count to + * 1 + */ pktcnt = 1; } @@ -1150,7 +1165,8 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, * perform the transfer. */ - pktcnt = ((uint32_t)nbytes + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket; + pktcnt = ((uint32_t)nbytes + (privep->ep.maxpacket - 1)) / + privep->ep.maxpacket; } /* Set the XFRSIZ and PKTCNT */ @@ -1203,8 +1219,8 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, stm32_putreg(regval, STM32_OTGFS_DIEPCTL(privep->epphy)); /* Transfer the data to the TxFIFO. At this point, the caller has already - * assured that there is sufficient space in the TxFIFO to hold the transfer - * we can just blindly continue. + * assured that there is sufficient space in the TxFIFO to hold the + * transfer we can just blindly continue. */ stm32_txfifo_write(privep, buf, nbytes); @@ -1275,9 +1291,9 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, privep->epphy, privreq, privreq->req.len, privreq->req.xfrd, privep->zlp); - /* Check for a special case: If we are just starting a request (xfrd==0) and - * the class driver is trying to send a zero-length packet (len==0). Then set - * the ZLP flag so that the packet will be sent. + /* Check for a special case: If we are just starting a request (xfrd==0) + * and the class driver is trying to send a zero-length packet (len==0). + * Then set the ZLP flag so that the packet will be sent. */ if (privreq->req.len == 0) @@ -1373,7 +1389,8 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, regval = stm32_getreg(regaddr); if ((int)(regval & OTGFS_DTXFSTS_MASK) < nwords) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EMPWAIT), + (uint16_t)regval); /* There is insufficient space in the TxFIFO. Wait for a TxFIFO * empty interrupt and try again. @@ -1413,9 +1430,10 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, privreq->req.xfrd += nbytes; } - /* Note that the ZLP, if any, must be sent as a separate transfer. The need - * for a ZLP is indicated by privep->zlp. If all of the bytes were sent - * (including any final null packet) then we are finished with the transfer + /* Note that the ZLP, if any, must be sent as a separate transfer. The + * need for a ZLP is indicated by privep->zlp. If all of the bytes were + * sent (including any final null packet) then we are finished with the + * transfer */ if (privreq->req.xfrd >= privreq->req.len && !privep->zlp) @@ -1450,7 +1468,9 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, regaddr = STM32_OTGFS_DFIFO_DEP(EP0); - /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */ + /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned + * accesses) + */ for (i = 0; i < len; i += 4) { @@ -1519,8 +1539,8 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, { struct stm32_req_s *privreq; - /* Since a transfer just completed, there must be a read request at the head of - * the endpoint request queue. + /* Since a transfer just completed, there must be a read request at the + * head of the endpoint request queue. */ privreq = stm32_rqpeek(privep); @@ -1557,13 +1577,14 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, * Name: stm32_ep0out_receive * * Description: - * This function is called from the RXFLVL interrupt handler when new incoming - * data is available in the endpoint's RxFIFO. This function will simply - * copy the incoming data into pending request's data buffer. + * This function is called from the RXFLVL interrupt handler when new + * incoming data is available in the endpoint's RxFIFO. This function + * will simply copy the incoming data into pending request's data buffer. * ****************************************************************************/ -static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) +static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, + int bcnt) { FAR struct stm32_usbdev_s *priv; @@ -1615,13 +1636,14 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) * Name: stm32_epout_receive * * Description: - * This function is called from the RXFLVL interrupt handler when new incoming - * data is available in the endpoint's RxFIFO. This function will simply - * copy the incoming data into pending request's data buffer. + * This function is called from the RXFLVL interrupt handler when new + * incoming data is available in the endpoint's RxFIFO. This function + * will simply copy the incoming data into pending request's data buffer. * ****************************************************************************/ -static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) +static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, + int bcnt) { struct stm32_req_s *privreq; uint8_t *dest; @@ -1637,7 +1659,8 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) { /* Incoming data is available in the RxFIFO, but there is no read setup * to receive the receive the data. This should not happen for data - * endpoints; those endpoints should have been NAKing any OUT data tokens. + * endpoints; those endpoints should have been NAKing any OUT data + * tokens. * * We should get here normally on OUT data phase following an OUT * SETUP command. EP0 data will still receive data in this case and it @@ -1654,7 +1677,8 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) * NAKing is working as expected. */ - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), + privep->epphy); /* Discard the data in the RxFIFO */ @@ -1699,8 +1723,8 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) * * Description: * This function is called when either (1) new read request is received, or - * (2) a pending receive request completes. If there is no read in pending, - * then this function will initiate the next OUT (read) operation. + * (2) a pending receive request completes. If there is no read in + * pending, then this function will initiate the next OUT (read) operation. * ****************************************************************************/ @@ -1713,30 +1737,34 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, uint32_t xfrsize; uint32_t pktcnt; - /* Make sure that there is not already a pending request request. If there is, - * just return, leaving the newly received request in the request queue. + /* Make sure that there is not already a pending request request. If + * there is, just return, leaving the newly received request in the + * request queue. */ if (!privep->active) { /* Loop until a valid request is found (or the request queue is empty). - * The loop is only need to look at the request queue again is an invalid - * read request is encountered. + * The loop is only need to look at the request queue again is an + * invalid read request is encountered. */ for (; ; ) { - /* Get a reference to the request at the head of the endpoint's request queue */ + /* Get a reference to the request at the head of the endpoint's + * request queue + */ privreq = stm32_rqpeek(privep); if (!privreq) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), + privep->epphy); - /* There are no read requests to be setup. Configure the hardware to - * NAK any incoming packets. (This should already be the case. I - * think that the hardware will automatically NAK after a transfer is - * completed until SNAK is cleared). + /* There are no read requests to be setup. Configure the + * hardware to NAK any incoming packets. (This should already + * be the case. I think that the hardware will automatically + * NAK after a transfer is completed until SNAK is cleared). */ regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); @@ -1762,7 +1790,9 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, stm32_req_complete(privep, OK); } - /* Otherwise, we have a usable read request... break out of the loop */ + /* Otherwise, we have a usable read request... break out of the + * loop + */ else { @@ -1778,7 +1808,8 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, * maxpacket bytes). */ - pktcnt = (privreq->req.len + (privep->ep.maxpacket - 1)) / privep->ep.maxpacket; + pktcnt = (privreq->req.len + (privep->ep.maxpacket - 1)) / + privep->ep.maxpacket; xfrsize = pktcnt * privep->ep.maxpacket; /* Then setup the hardware to perform this transfer */ @@ -1857,7 +1888,8 @@ static void stm32_ep_flush(struct stm32_ep_s *privep) * Name: stm32_req_complete * * Description: - * Handle termination of the request at the head of the endpoint request queue. + * Handle termination of the request at the head of the endpoint request + * queue. * ****************************************************************************/ @@ -1957,8 +1989,8 @@ static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, * Name: stm32_req_dispatch * * Description: - * Provide unhandled setup actions to the class driver. This is logically part - * of the USB interrupt handler. + * Provide unhandled setup actions to the class driver. This is logically + * part of the USB interrupt handler. * ****************************************************************************/ @@ -2142,7 +2174,8 @@ static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv, ****************************************************************************/ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, - FAR struct stm32_ctrlreq_s *ctrlreq) + FAR struct stm32_ctrlreq_s * + ctrlreq) { FAR struct stm32_ep_s *privep; @@ -2176,7 +2209,8 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, privep = stm32_ep_findbyaddr(priv, ctrlreq->index); if (!privep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPGETSTATUS), 0); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPGETSTATUS), + 0); priv->stalled = true; } else @@ -2200,19 +2234,25 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { if (ctrlreq->index == 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVGETSTATUS), 0); + usbtrace(TRACE_INTDECODE( + STM32_TRACEINTID_DEVGETSTATUS), + 0); /* Features: Remote Wakeup and self-powered */ - priv->ep0data[0] = (priv->selfpowered << USB_FEATURE_SELFPOWERED); - priv->ep0data[0] |= (priv->wakeup << USB_FEATURE_REMOTEWAKEUP); + priv->ep0data[0] = (priv->selfpowered << + USB_FEATURE_SELFPOWERED); + priv->ep0data[0] |= (priv->wakeup << + USB_FEATURE_REMOTEWAKEUP); priv->ep0data[1] = 0; stm32_ep0in_setupresponse(priv, priv->ep0data, 2); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADDEVGETSTATUS), 0); + usbtrace(TRACE_DEVERROR( + STM32_TRACEERR_BADDEVGETSTATUS), + 0); priv->stalled = true; } } @@ -2338,15 +2378,17 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * len: 0; data = none */ - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETADDRESS), ctrlreq->value); - if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETADDRESS), + ctrlreq->value); + if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE && ctrlreq->index == 0 && ctrlreq->len == 0 && ctrlreq->value < 128 && priv->devstate != DEVSTATE_CONFIGURED) { - /* Save the address. We cannot actually change to the next address until - * the completion of the status phase. + /* Save the address. We cannot actually change to the next + * address until the completion of the status phase. */ stm32_setaddress(priv, (uint16_t)priv->ctrlreq.value[0]); @@ -2376,7 +2418,8 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETDESC), 0); - if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE) { stm32_req_dispatch(priv, &priv->ctrlreq); } @@ -2398,7 +2441,8 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETCONFIG), 0); if (priv->addressed && - (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && + (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE && ctrlreq->value == 0 && ctrlreq->index == 0 && ctrlreq->len == 1) @@ -2423,7 +2467,8 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETCONFIG), 0); if (priv->addressed && - (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && + (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == + USB_REQ_RECIPIENT_DEVICE && ctrlreq->index == 0 && ctrlreq->len == 0) { @@ -2545,7 +2590,8 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) ctrlreq.len = GETUINT16(priv->ctrlreq.len); uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n", - ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len); + ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, + ctrlreq.len); /* Check for a standard request */ @@ -2566,13 +2612,14 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) if (priv->stalled) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0SETUPSTALLED), priv->ep0state); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0SETUPSTALLED), + priv->ep0state); stm32_ep0_stall(priv); } /* Reset state/data associated with the SETUP request */ - priv->ep0datlen = 0; + priv->ep0datlen = 0; } /**************************************************************************** @@ -2631,12 +2678,13 @@ static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) * Name: stm32_epout_interrupt * * Description: - * USB OUT endpoint interrupt handler. The core generates this interrupt when - * there is an interrupt is pending on one of the OUT endpoints of the core. - * The driver must read the OTGFS DAINT register to determine the exact number - * of the OUT endpoint on which the interrupt occurred, and then read the - * corresponding OTGFS DOEPINTx register to determine the exact cause of the - * interrupt. + * USB OUT endpoint interrupt handler. The core generates this interrupt + * when there is an interrupt is pending on one of the OUT endpoints of + * the core. + * The driver must read the OTGFS DAINT register to determine the exact + * number of the OUT endpoint on which the interrupt occurred, and then + * read the corresponding OTGFS DOEPINTx register to determine the exact + * cause of the interrupt. * ****************************************************************************/ @@ -2647,8 +2695,8 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) uint32_t doepint; int epno; - /* Get the pending, enabled interrupts for the OUT endpoint from the endpoint - * interrupt status register. + /* Get the pending, enabled interrupts for the OUT endpoint from the + * endpoint interrupt status register. */ regval = stm32_getreg(STM32_OTGFS_DAINT); @@ -2680,7 +2728,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) { regval = stm32_getreg(STM32_OTGFS_DOEPINT(epno)); uinfo("DOEPINT(%d) = %08x\n", epno, regval); - stm32_putreg(0xFF, STM32_OTGFS_DOEPINT(epno)); + stm32_putreg(0xff, STM32_OTGFS_DOEPINT(epno)); } epno++; @@ -2705,14 +2753,15 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) doepint &= stm32_getreg(STM32_OTGFS_DOEPMSK); /* Transfer completed interrupt. This interrupt is triggered when - * stm32_rxinterrupt() removes the last packet data from the RxFIFO. - * In this case, core internally sets the NAK bit for this endpoint to - * prevent it from receiving any more packets. + * stm32_rxinterrupt() removes the last packet data from the + * RxFIFO. In this case, core internally sets the NAK bit for this + * endpoint to prevent it from receiving any more packets. */ if ((doepint & OTGFS_DOEPINT_XFRC) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_XFRC), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_XFRC), + (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ @@ -2731,18 +2780,21 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) if ((doepint & OTGFS_DOEPINT_EPDISD) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_EPDISD), + (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ stm32_putreg(OTGFS_DOEPINT_EPDISD, STM32_OTGFS_DOEPINT(epno)); } #endif + /* Setup Phase Done (control EPs) */ if ((doepint & OTGFS_DOEPINT_SETUP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_SETUP), priv->ep0state); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_SETUP), + priv->ep0state); /* Handle the receipt of the IN SETUP packets now (OUT setup * packet processing may be delayed until the accompanying @@ -2753,6 +2805,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) { stm32_ep0out_setup(priv); } + stm32_putreg(OTGFS_DOEPINT_SETUP, STM32_OTGFS_DOEPINT(epno)); } } @@ -2847,7 +2900,8 @@ static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) * ****************************************************************************/ -static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int epno) +static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, + int epno) { FAR struct stm32_ep_s *privep = &priv->epin[epno]; @@ -2863,11 +2917,12 @@ static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int e * Name: stm32_epin_interrupt * * Description: - * USB IN endpoint interrupt handler. The core generates this interrupt when - * an interrupt is pending on one of the IN endpoints of the core. The driver - * must read the OTGFS DAINT register to determine the exact number of the IN - * endpoint on which the interrupt occurred, and then read the corresponding - * OTGFS DIEPINTx register to determine the exact cause of the interrupt. + * USB IN endpoint interrupt handler. The core generates this interrupt + * when an interrupt is pending on one of the IN endpoints of the core. + * The driver must read the OTGFS DAINT register to determine the exact + * number of the IN endpoint on which the interrupt occurred, and then + * read the corresponding OTGFS DIEPINTx register to determine the exact + * cause of the interrupt. * ****************************************************************************/ @@ -2879,8 +2934,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) uint32_t empty; int epno; - /* Get the pending, enabled interrupts for the IN endpoint from the endpoint - * interrupt status register. + /* Get the pending, enabled interrupts for the IN endpoint from the + * endpoint interrupt status register. */ daint = stm32_getreg(STM32_OTGFS_DAINT); @@ -2912,7 +2967,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) { uinfo("DIEPINT(%d) = %08x\n", epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno))); - stm32_putreg(0xFF, STM32_OTGFS_DIEPINT(epno)); + stm32_putreg(0xff, STM32_OTGFS_DIEPINT(epno)); } epno++; @@ -2958,6 +3013,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) diepint = stm32_getreg(STM32_OTGFS_DIEPINT(epno)) & mask; /* Decode and process the enabled, pending interrupts */ + /* Transfer completed interrupt */ if ((diepint & OTGFS_DIEPINT_XFRC) != 0) @@ -2984,20 +3040,22 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) if ((diepint & OTGFS_DIEPINT_TOC) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TOC), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TOC), + (uint16_t)diepint); stm32_putreg(OTGFS_DIEPINT_TOC, STM32_OTGFS_DIEPINT(epno)); } - /* IN token received when TxFIFO is empty. Applies to non-periodic IN - * endpoints only. This interrupt indicates that an IN token was received - * when the associated TxFIFO (periodic/non-periodic) was empty. This - * interrupt is asserted on the endpoint for which the IN token was - * received. + /* IN token received when TxFIFO is empty. Applies to + * non-periodic IN endpoints only. This interrupt indicates + * that an IN token was received when the associated TxFIFO + * (periodic/non-periodic) was empty. This interrupt is asserted + * on the endpoint for which the IN token was received. */ if ((diepint & OTGFS_DIEPINT_ITTXFE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_ITTXFE), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_ITTXFE), + (uint16_t)diepint); stm32_epin_request(priv, &priv->epin[epno]); stm32_putreg(OTGFS_DIEPINT_ITTXFE, STM32_OTGFS_DIEPINT(epno)); } @@ -3008,35 +3066,41 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) #if 0 if ((diepint & OTGFS_DIEPINT_INEPNE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_INEPNE), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_INEPNE), + (uint16_t)diepint); stm32_putreg(OTGFS_DIEPINT_INEPNE, STM32_OTGFS_DIEPINT(epno)); } #endif + /* Endpoint disabled interrupt (ignored as this used only in polled * mode) */ #if 0 if ((diepint & OTGFS_DIEPINT_EPDISD) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EPDISD), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EPDISD), + (uint16_t)diepint); stm32_putreg(OTGFS_DIEPINT_EPDISD, STM32_OTGFS_DIEPINT(epno)); } #endif + /* Transmit FIFO empty */ if ((diepint & OTGFS_DIEPINT_TXFE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TXFE), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TXFE), + (uint16_t)diepint); - /* If we were waiting for TxFIFO to become empty, the we might have both - * XFRC and TXFE interrupts pending. Since we do the same thing for both - * cases, ignore the TXFE if we have already processed the XFRC. + /* If we were waiting for TxFIFO to become empty, the we might + * have both XFRC and TXFE interrupts pending. Since we do + * the same thing for both cases, ignore the TXFE if we have + * already processed the XFRC. */ if ((diepint & OTGFS_DIEPINT_XFRC) == 0) { - /* Mask further FIFO empty interrupts. This will be re-enabled - * whenever we need to wait for a FIFO event. + /* Mask further FIFO empty interrupts. This will be + * re-enabled whenever we need to wait for a FIFO event. */ empty &= ~OTGFS_DIEPEMPMSK(epno); @@ -3177,7 +3241,8 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) /* Decode status fields */ - epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; + epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> + OTGFS_GRXSTSD_EPNUM_SHIFT; /* Workaround for bad values read from the STM32_OTGFS_GRXSTSP register * happens regval is 0xb4e48168 or 0xa80c9367 or 267E781c @@ -3192,11 +3257,11 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK) { - /* Global OUT NAK. This indicate that the global OUT NAK bit has taken - * effect. + /* Global OUT NAK. This indicate that the global OUT NAK bit + * has taken effect. * - * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't - * Care. + * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, + * DPID = Don't Care. */ case OTGFS_GRXSTSD_PKTSTS_OUTNAK: @@ -3208,13 +3273,15 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) /* OUT data packet received. * * PKTSTS = DataOUT, BCNT = size of the received data OUT packet, - * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID. + * EPNUM = EPNUM on which the packet was received, DPID = Actual + * Data PID. */ case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy); - bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; + bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> + OTGFS_GRXSTSD_BCNT_SHIFT; if (bcnt > 0) { stm32_epout_receive(privep, bcnt); @@ -3222,13 +3289,14 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) } break; - /* OUT transfer completed. This indicates that an OUT data transfer for - * the specified OUT endpoint has completed. After this entry is popped - * from the receive FIFO, the core asserts a Transfer Completed interrupt - * on the specified OUT endpoint. + /* OUT transfer completed. This indicates that an OUT data + * transfer for the specified OUT endpoint has completed. + * After this entry is popped from the receive FIFO, the core + * asserts a Transfer Completed interrupt on the specified OUT + * endpoint. * - * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on - * which the data transfer is complete, DPID = Don't Care. + * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP + * Num on which the data transfer is complete, DPID = Don't Care. */ case OTGFS_GRXSTSD_PKTSTS_OUTDONE: @@ -3237,11 +3305,12 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) } break; - /* SETUP transaction completed. This indicates that the Setup stage for - * the specified endpoint has completed and the Data stage has started. - * After this entry is popped from the receive FIFO, the core asserts a - * Setup interrupt on the specified control OUT endpoint (triggers an - * interrupt). + /* SETUP transaction completed. This indicates that the Setup + * stage for the specified endpoint has completed and the Data + * stage has started. + * After this entry is popped from the receive FIFO, the core + * asserts a Setup interrupt on the specified control OUT + * endpoint (triggers an interrupt). * * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num, * DPID = Don't Care. @@ -3251,8 +3320,8 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy); - /* Now that the Setup Phase is complete if it was an OUT enable - * the endpoint + /* Now that the Setup Phase is complete if it was an OUT + * enable the endpoint * (Doing this here prevents the loss of the first FIFO word) */ @@ -3263,13 +3332,13 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) regval = stm32_getreg(STM32_OTGFS_DOEPCTL0); regval |= OTGFS_DOEPCTL0_CNAK; stm32_putreg(regval, STM32_OTGFS_DOEPCTL0); - } } break; - /* SETUP data packet received. This indicates that a SETUP packet for the - * specified endpoint is now available for reading from the receive FIFO. + /* SETUP data packet received. This indicates that a SETUP + * packet for the specified endpoint is now available for + * reading from the receive FIFO. * * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0. */ @@ -3278,23 +3347,26 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) { uint16_t datlen; - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), + epphy); - /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, - * the last one overwrites the previous setup packets and only that - * last SETUP packet will be processed. + /* Read EP0 setup data. NOTE: If multiple SETUP packets are + * received, the last one overwrites the previous setup + * packets and only that last SETUP packet will be processed. */ - stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, - USB_SIZEOF_CTRLREQ); + stm32_rxfifo_read(&priv->epout[EP0], + (FAR uint8_t *)&priv->ctrlreq, + USB_SIZEOF_CTRLREQ); - /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, - * then we need to wait for the completion of the data phase to - * process the setup command. If it is an IN SETUP packet, then - * we must processing the command BEFORE we enter the DATA phase. + /* Was this an IN or an OUT SETUP packet. If it is an OUT + * SETUP, then we need to wait for the completion of the + * data phase to process the setup command. If it is an + * IN SETUP packet, then we must processing the command + * BEFORE we enter the DATA phase. * - * If the data associated with the OUT SETUP packet is zero length, - * then, of course, we don't need to wait. + * If the data associated with the OUT SETUP packet is zero + * length, then, of course, we don't need to wait. */ datlen = GETUINT16(priv->ctrlreq.len); @@ -3306,8 +3378,8 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) } else { - /* We can process the setup data as soon as SETUP done word is - * popped of the RxFIFO. + /* We can process the setup data as soon as SETUP done + * word is popped of the RxFIFO. */ priv->ep0state = EP0STATE_SETUP_READY; @@ -3318,7 +3390,8 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) default: { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), - (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); + (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> + OTGFS_GRXSTSD_PKTSTS_SHIFT); } break; } @@ -3342,7 +3415,9 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) stm32_ep0in_activate(); - /* Set USB turn-around time for the full speed device with internal PHY interface. */ + /* Set USB turn-around time for the full speed device with internal PHY + * interface. + */ regval = stm32_getreg(STM32_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_TRDT_MASK; @@ -3354,9 +3429,9 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) * Name: stm32_isocininterrupt * * Description: - * Incomplete isochronous IN transfer interrupt. Assertion of the incomplete - * isochronous IN transfer interrupt indicates an incomplete isochronous IN - * transfer on at least one of the isochronous IN endpoints. + * Incomplete isochronous IN transfer interrupt. Assertion of the + * incomplete isochronous IN transfer interrupt indicates an incomplete + * isochronous IN transfer on at least one of the isochronous IN endpoints. * ****************************************************************************/ @@ -3365,8 +3440,9 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) { int i; - /* The application must read the endpoint control register for all isochronous - * IN endpoints to detect endpoints with incomplete IN data transfers. + /* The application must read the endpoint control register for all + * isochronous IN endpoints to detect endpoints with incomplete IN data + * transfers. */ for (i = 0; i < STM32_NENDPOINTS; i++) @@ -3445,7 +3521,8 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) /* When it receives an IISOOXFR interrupt, the application must read the * control registers of all isochronous OUT endpoints to determine which * endpoints had an incomplete transfer in the current microframe. An - * endpoint transfer is incomplete if both the following conditions are true: + * endpoint transfer is incomplete if both the following conditions are + * true: * * DOEPCTLx:EONUM = DSTS:SOFFN[0], and * DOEPCTLx:EPENA = 1 @@ -3560,7 +3637,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32_usbdev_s *priv = &g_otgfsdev; @@ -3571,12 +3649,14 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) /* Assure that we are in device mode */ - DEBUGASSERT((stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE); + DEBUGASSERT((stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == + OTGFS_GINTSTS_DEVMODE); /* Get the state of all enabled interrupts. We will do this repeatedly * some interrupts (like RXFLVL) will generate additional interrupting * events. */ + for (; ; ) { /* Get the set of pending, un-masked interrupts */ @@ -3589,7 +3669,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) * **Writable** pending irqs we will service below */ - stm32_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), STM32_OTGFS_GINTSTS); + stm32_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), + STM32_OTGFS_GINTSTS); /* Break out of the loop when there are no further pending (and * unmasked) interrupts to be processes. @@ -3599,7 +3680,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) { break; } - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_INTPENDING), (uint16_t)regval); + + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_INTPENDING), + (uint16_t)regval); /* OUT endpoint interrupt. The core sets this bit to indicate that an * interrupt is pending on one of the OUT endpoints of the core. @@ -3607,7 +3690,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_OEP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), + (uint16_t)regval); stm32_epout_interrupt(priv); } @@ -3626,7 +3710,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) #ifdef CONFIG_DEBUG_USB if ((regval & OTGFS_GINT_MMIS) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), + (uint16_t)regval); } #endif @@ -3634,7 +3719,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_WKUP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), + (uint16_t)regval); stm32_resumeinterrupt(priv); } @@ -3642,7 +3728,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_USBSUSP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), + (uint16_t)regval); stm32_suspendinterrupt(priv); } @@ -3661,7 +3748,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_RXFLVL) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), + (uint16_t)regval); stm32_rxinterrupt(priv); } @@ -3669,7 +3757,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_RESETS) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), + (uint16_t)regval); /* Perform the device reset */ @@ -3682,7 +3771,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_ENUMDNE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), + (uint16_t)regval); stm32_enuminterrupt(priv); } @@ -3695,7 +3785,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) #ifdef CONFIG_USBDEV_ISOCHRONOUS if ((regval & OTGFS_GINT_IISOIXFR) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), + (uint16_t)regval); stm32_isocininterrupt(priv); } @@ -3711,7 +3802,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context, FAR void *arg) if ((regval & OTGFS_GINT_IISOOXFR) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), + (uint16_t)regval); stm32_isocoutinterrupt(priv); } #endif @@ -3778,11 +3870,11 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep) #else /* Since we are in the interrupt handler, we cannot wait inline for the - * GONAKEFF because it cannot occur until service the RXFLVL global interrupt - * and pop the OUTNAK word from the RxFIFO. + * GONAKEFF because it cannot occur until service the RXFLVL global + * interrupt and pop the OUTNAK word from the RxFIFO. * - * Perhaps it is sufficient to wait for Global OUT NAK status to be reported - * in OTGFS DCTL register? + * Perhaps it is sufficient to wait for Global OUT NAK status to be + * reported in OTGFS DCTL register? */ while ((stm32_getreg(STM32_OTGFS_DCTL) & OTGFS_DCTL_GONSTS) == 0); @@ -3821,7 +3913,8 @@ static void stm32_disablegonak(FAR struct stm32_ep_s *privep) * ****************************************************************************/ -static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, +static int stm32_epout_configure(FAR struct stm32_ep_s *privep, + uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; @@ -3916,7 +4009,8 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, * ****************************************************************************/ -static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, +static int stm32_epin_configure(FAR struct stm32_ep_s *privep, + uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; @@ -3977,7 +4071,8 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, regval |= OTGFS_DIEPCTL_CNAK; } - regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK); + regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | + OTGFS_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT); regval |= (privep->epphy << OTGFS_DIEPCTL_TXFNUM_SHIFT); @@ -4181,7 +4276,9 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) regval |= (OTGFS_DIEPCTL_EPDIS | OTGFS_DIEPCTL_SNAK); stm32_putreg(regval, regaddr); - /* Wait for the INEPNE interrupt that indicates that we are now in NAK mode */ + /* Wait for the INEPNE interrupt that indicates that we are now in NAK + * mode + */ regaddr = STM32_OTGFS_DIEPINT(privep->epphy); while ((stm32_getreg(regaddr) & OTGFS_DIEPINT_INEPNE) == 0); @@ -4310,7 +4407,8 @@ static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep) * ****************************************************************************/ -static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req; @@ -4376,7 +4474,8 @@ static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) * ****************************************************************************/ -static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req; FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; @@ -4390,7 +4489,8 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * if (!req || !req->callback || !req->buf || !ep) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); - uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep); + uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, + req->buf, ep); return -EINVAL; } #endif @@ -4401,7 +4501,8 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * #ifdef CONFIG_DEBUG_FEATURES if (!priv->driver) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), + priv->usbdev.speed); return -ESHUTDOWN; } #endif @@ -4470,7 +4571,8 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * * ****************************************************************************/ -static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; irqstate_t flags; @@ -4552,12 +4654,15 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) return OK; #else /* This implementation follows the STMicro code example. */ + /* REVISIT: */ uint32_t regaddr; uint32_t regval; - /* Stall the OUT endpoint by setting the STALL bit in the DOECPTL register. */ + /* Stall the OUT endpoint by setting the STALL bit in the DOECPTL + * register. + */ regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); regval = stm32_getreg(regaddr); @@ -4708,6 +4813,7 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) { ret = stm32_ep_setstall(privep); } + leave_critical_section(flags); return ret; @@ -4740,12 +4846,13 @@ static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv) * Allocate an endpoint matching the parameters. * * Input Parameters: - * eplog - 7-bit logical endpoint number (direction bit ignored). Zero means - * that any endpoint matching the other requirements will suffice. The - * assigned endpoint can be found in the eplog field. + * eplog - 7-bit logical endpoint number (direction bit ignored). + * Zero means that any endpoint matching the other requirements + * will suffice. The assigned endpoint can be found in the eplog + * field. * in - true: IN (device-to-host) endpoint requested - * eptype - Endpoint type. One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK, - * USB_EP_ATTR_XFER_INT} + * eptype - Endpoint type. One of {USB_EP_ATTR_XFER_ISOC, + * USB_EP_ATTR_XFER_BULK, USB_EP_ATTR_XFER_INT} * ****************************************************************************/ @@ -4774,8 +4881,9 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, if (epphy > 0) { - /* Otherwise, we will return the endpoint structure only for the requested - * 'logical' endpoint. All of the other checks will still be performed. + /* Otherwise, we will return the endpoint structure only for the + * requested 'logical' endpoint. All of the other checks will still + * be performed. * * First, verify that the logical endpoint is in the range supported by * by the hardware. @@ -4834,7 +4942,8 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, * ****************************************************************************/ -static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) +static void stm32_ep_free(FAR struct usbdev_s *dev, + FAR struct usbdev_ep_s *ep) { FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev; FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; @@ -5189,7 +5298,8 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) /* Disable global interrupts by clearing the GINTMASK bit in the GAHBCFG * register; Set the TXFELVL bit in the GAHBCFG register so that TxFIFO - * interrupts will occur when the TxFIFO is truly empty (not just half full). + * interrupts will occur when the TxFIFO is truly empty (not just half + * full). */ stm32_putreg(OTGFS_GAHBCFG_TXFELVL, STM32_OTGFS_GAHBCFG); @@ -5244,7 +5354,8 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) * Sense when Set */ - regval = (OTGFS_GCCFG_PWRDWN | OTGFS_GCCFG_VBUSASEN | OTGFS_GCCFG_VBUSBSEN); + regval = (OTGFS_GCCFG_PWRDWN | OTGFS_GCCFG_VBUSASEN | + OTGFS_GCCFG_VBUSBSEN); # ifndef CONFIG_USBDEV_VBUSSENSING regval |= OTGFS_GCCFG_NOVBUSSENS; # endif @@ -5255,8 +5366,8 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) stm32_putreg(regval, STM32_OTGFS_GCCFG); up_mdelay(20); - /* For the new OTG controller in the F446, F469 when VBUS sensing is not used we - * need to force the B session valid + /* For the new OTG controller in the F446, F469 when VBUS sensing is not + * used we need to force the B session valid */ #if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) @@ -5442,9 +5553,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) * Assumptions: * - This function is called very early in the initialization sequence * - PLL and GIO pin initialization is not performed here but should been in - * the low-level boot logic: PLL1 must be configured for operation at 48MHz - * and P0.23 and PO.31 in PINSEL1 must be configured for Vbus and USB connect - * LED. + * the low-level boot logic: PLL1 must be configured for operation at + * 48MHz and P0.23 and PO.31 in PINSEL1 must be configured for Vbus and + * USB connect LED. * ****************************************************************************/ @@ -5453,7 +5564,8 @@ void arm_usbinitialize(void) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32_usbdev_s *priv = &g_otgfsdev; @@ -5543,7 +5655,8 @@ void arm_usbuninitialize(void) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32_usbdev_s *priv = &g_otgfsdev; @@ -5598,8 +5711,8 @@ void arm_usbuninitialize(void) * Name: usbdev_register * * Description: - * Register a USB device class driver. The class driver's bind() method will be - * called to bind it to a USB device driver. + * Register a USB device class driver. The class driver's bind() method + * will be called to bind it to a USB device driver. * ****************************************************************************/ @@ -5608,7 +5721,8 @@ int usbdev_register(struct usbdevclass_driver_s *driver) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32_usbdev_s *priv = &g_otgfsdev; @@ -5668,9 +5782,10 @@ int usbdev_register(struct usbdevclass_driver_s *driver) * Name: usbdev_unregister * * Description: - * Un-register usbdev class driver.If the USB device is connected to a USB host, - * it will first disconnect(). The driver is also requested to unbind() and clean - * up any device state, before this procedure finally returns. + * Un-register usbdev class driver.If the USB device is connected to a USB + * host, it will first disconnect(). The driver is also requested to + * unbind() and clean up any device state, before this procedure finally + * returns. * ****************************************************************************/ @@ -5679,7 +5794,8 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32_usbdev_s *priv = &g_otgfsdev;