From cf217c6e87cbde9b617e759c2461d20acba51acc Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 21 Oct 2016 11:24:23 -0600 Subject: [PATCH] Xtensa: Fix a few more compilation issues --- arch/xtensa/src/common/xtensa.h | 2 +- arch/xtensa/src/common/xtensa_context.S | 37 +++++++------------ arch/xtensa/src/common/xtensa_exit.c | 2 +- .../xtensa/src/common/xtensa_schedsigaction.c | 4 +- arch/xtensa/src/common/xtensa_sigdeliver.c | 10 ++--- 5 files changed, 23 insertions(+), 32 deletions(-) diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h index 063edbe473..3065911cf0 100644 --- a/arch/xtensa/src/common/xtensa.h +++ b/arch/xtensa/src/common/xtensa.h @@ -255,7 +255,7 @@ int xtensa_swint(int irq, FAR void *context); /* Synchronous context switching */ int xtensa_context_save(uint32_t *regs); -int xtensa_context_restore(uint32_t *regs); +void xtensa_context_restore(uint32_t *regs) noreturn_function; /* Signals */ diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index 840620b4e5..01d9e97748 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -59,9 +59,12 @@ ****************************************************************************/ #include + #include #include +#include "xtensa_specregs.h" + #ifdef CONFIG_XTENSA_USE_OVLY # include #endif @@ -262,7 +265,7 @@ xtensa_context_save: /* Set up for call to _xtensa_context_save() */ - rsr a12, EPS_2 /* Save callee's PS */ + rsr a12, PS /* Save callee's PS */ s32i a12, a2, (4 * REG_PS) s32i a0, a2, (4 * REG_PC) /* Save Return address as PC */ @@ -290,9 +293,9 @@ xtensa_context_save: * * These functions restores Xtensa processor state and differ in which * registers are saved: _xtensa_context_restore() restores all registers - * except PC, PS, and A0 + * except PC, PS, A0, and A2 * - * The caller is responsible for restoring PC, PS, and A0 in both cases. + * The caller is responsible for restoring PC, PS, A0, and A2. * * _xtensa_context_save is the counterpart to this function. * @@ -418,9 +421,6 @@ _xtensa_context_restore: * - A2 = Pointer to the processor state save area * * Exit conditions: - * - A0 = Return address in caller. - * - A2 = 1 - * * NOTE: That this function does NOT return to the caller but rather * to a new threading context. * @@ -442,21 +442,12 @@ xtensa_context_restore: call0 _xtensa_context_restore /* Restore full register state */ - /* Restore PC, PS, and A0. */ - - s32i a0, sp, (4 * REG_PS) - - rsr a12, EPS_2 /* Save callee's PS */ - s32i a12, sp, (4 * REG_PS) - s32i a0, a2, (4 * REG_PC) /* Save Return address as PC */ - - s32i a0, a2, (4 * REG_A0) /* Save callee's a0 */ - s32i sp, a2, (4 * REG_A1) /* Save callee's SP */ - movi a12, 1 /* Set saved A2 to 1 */ - s32i a12, a2, (4 * REG_A2) - - - l32i a0, a2, (4 * REG_A0) /* Recover return addess */ - movi a2, 0 /* Return zero */ - ret + /* Restore PC, PS, A0, and A2. */ + l32i a0, a2, (4 * REG_PS) /* Restore PS */ + wsr a0, PS + l32i a0, a2, (4 * REG_PC) /* Set up for RFE */ + rsr a0, EPC + l32i a0, a2, (4 * REG_A0) /* Restore a0 */ + l32i a2, a2, (4 * REG_A2) /* Restore A2 */ + rfe /* And return from "exception" */ diff --git a/arch/xtensa/src/common/xtensa_exit.c b/arch/xtensa/src/common/xtensa_exit.c index 9d54bf9ede..e6c64aaecd 100644 --- a/arch/xtensa/src/common/xtensa_exit.c +++ b/arch/xtensa/src/common/xtensa_exit.c @@ -177,7 +177,7 @@ void _exit(int status) /* Then switch contexts */ - xtensa_full_context_restore(tcb->xcp.regs); + xtensa_context_restore(tcb->xcp.regs); /* xtensa_full_context_restore() should not return but could if the software * interrupts are disabled. diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c index 5f6b1cc536..76c8669a39 100644 --- a/arch/xtensa/src/common/xtensa_schedsigaction.c +++ b/arch/xtensa/src/common/xtensa_schedsigaction.c @@ -148,7 +148,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * disabled */ - CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; + CURRENT_REGS[REG_PC] = (uint32_t)xtensa_sigdeliver; #warning REVISIT: Missing logic... need to set interrupt state with interrupts disabled /* And make sure that the saved context in the TCB is the same @@ -179,7 +179,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * disabled */ - tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver; + tcb->xcp.regs[REG_PC] = (uint32_t)xtensa_sigdeliver; #warning REVISIT: Missing logic... need to set interrupt state with interrupts disabled } } diff --git a/arch/xtensa/src/common/xtensa_sigdeliver.c b/arch/xtensa/src/common/xtensa_sigdeliver.c index b28ed30d71..381b08f9a7 100644 --- a/arch/xtensa/src/common/xtensa_sigdeliver.c +++ b/arch/xtensa/src/common/xtensa_sigdeliver.c @@ -58,7 +58,7 @@ ****************************************************************************/ /**************************************************************************** - * Name: up_sigdeliver + * Name: xtensa_sigdeliver * * Description: * This is the a signal handling trampoline. When a signal action was @@ -67,7 +67,7 @@ * ****************************************************************************/ -void up_sigdeliver(void) +void xtensa_sigdeliver(void) { struct tcb_s *rtcb = this_task(); uint32_t regs[XCPTCONTEXT_REGS]; @@ -90,7 +90,7 @@ void up_sigdeliver(void) xtensa_copystate(regs, rtcb->xcp.regs); regs[REG_PC] = rtcb->xcp.saved_pc; -#warbing Missing Logic... Need to restore the correct interrupt here +#warning Missing Logic... Need to save the correct interrupt state /* Get a local copy of the sigdeliver function pointer. we do this so that * we can nullify the sigdeliver function pointer in the TCB and accept @@ -101,8 +101,8 @@ void up_sigdeliver(void) rtcb->xcp.sigdeliver = NULL; /* Then restore the task interrupt state */ - - up_irq_restore(regs[REG_CPSR]); +#warning Missing Logic... Need to restore the correct interrupt state + //up_irq_restore(regs[REG_CPSR]); /* Deliver the signals */