Merged in acassis/nuttx_acassis/canbus (pull request #377)

Canbus

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Alan Carvalho 2017-05-23 17:47:51 +00:00 committed by Gregory Nutt
commit cf3351aa8c
12 changed files with 4920 additions and 1 deletions

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@ -0,0 +1,113 @@
############################################################################
# configs/stm32f103-minimum/nsh/Make.defs
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

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@ -69,6 +69,10 @@ ifeq ($(CONFIG_AUDIO_TONE),y)
CSRCS += stm32_tone.c
endif
ifeq ($(CONFIG_CAN_MCP2515),y)
CSRCS += stm32_mcp2515.c
endif
ifeq ($(CONFIG_CL_MFRC522),y)
CSRCS += stm32_mfrc522.c
endif

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@ -151,6 +151,13 @@ int stm32_bringup(void)
}
#endif
#ifdef CONFIG_CAN_MCP2515
ret = stm32_mcp2515initialize("/dev/can0");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_mcp2515initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_CL_MFRC522
ret = stm32_mfrc522initialize("/dev/rfid0");

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@ -0,0 +1,240 @@
/************************************************************************************
* configs/stm32f4discovery/src/stm32_mcp2515.c
*
* Copyright (C) 2015 Alan Carvalho de Assis. All rights reserved.
* Author: Alan Carvalho de Assis <acassis@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <nuttx/can/mcp2515.h>
#include "stm32.h"
#include "stm32_spi.h"
#include "stm32f103_minimum.h"
#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && defined(CONFIG_CAN_MCP2515)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#define MCP2515_SPI_PORTNO 1 /* On SPI1 */
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_mcp2515config_s
{
/* Configuration structure as seen by the MCP2515 driver */
struct mcp2515_config_s config;
/* Additional private definitions only known to this driver */
MCP2515_HANDLE handle; /* The MCP2515 driver handle */
mcp2515_handler_t handler; /* The MCP2515 interrupt handler */
FAR void *arg; /* Argument to pass to the interrupt handler */
};
/****************************************************************************
* Static Function Prototypes
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks
* to isolate the MCP2515 driver from differences in GPIO interrupt handling
* by varying boards and MCUs.
*
* attach - Attach the MCP2515 interrupt handler to the GPIO interrupt
*/
static int mcp2515_attach(FAR struct mcp2515_config_s *state,
mcp2515_handler_t handler, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the MCP2515
* driver. This structure provides information about the configuration
* of the MCP2515 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active. The
* memory must be writable because, under certain circumstances, the driver
* may modify frequency or X plate resistance values.
*/
static struct stm32_mcp2515config_s g_mcp2515config =
{
.config =
{
.devid = 0,
.nfilters = 6,
.ntxbuffers = 3,
.attach = mcp2515_attach,
},
};
/****************************************************************************
* Private Functions
****************************************************************************/
/* This is the MCP2515 Interupt handler */
int mcp2515_interrupt(int irq, FAR void *context)
{
/* Verify that we have a handler attached */
if (g_mcp2515config.handler)
{
/* Yes.. forward with interrupt along with its argument */
g_mcp2515config.handler(&g_mcp2515config.config, g_mcp2515config.arg);
}
return OK;
}
static int mcp2515_attach(FAR struct mcp2515_config_s *state,
mcp2515_handler_t handler, FAR void *arg)
{
FAR struct stm32_mcp2515config_s *priv =
(FAR struct stm32_mcp2515config_s *) state;
irqstate_t flags;
caninfo("Saving handle %p\n", handler);
flags = enter_critical_section();
priv->handler = handler;
priv->arg = arg;
/* Configure the interrupt for falling edge*/
(void)stm32_gpiosetevent(GPIO_MCP2515_IRQ, false, true, false, mcp2515_interrupt, NULL);
leave_critical_section(flags);
return OK;
}
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_mcp2515initialize
*
* Description:
* Initialize and register the MCP2515 RFID driver.
*
* Input parameters:
* devpath - The full path to the driver to register. E.g., "/dev/rfid0"
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
************************************************************************************/
int stm32_mcp2515initialize(FAR const char *devpath)
{
FAR struct spi_dev_s *spi;
FAR struct can_dev_s *can;
FAR struct mcp2515_can_s *mcp2515;
int ret;
/* Check if we are already initialized */
if (!g_mcp2515config.handle)
{
sninfo("Initializing\n");
/* Configure the MCP2515 interrupt pin as an input */
(void)stm32_configgpio(GPIO_MCP2515_IRQ);
spi = stm32_spibus_initialize(MCP2515_SPI_PORTNO);
if (!spi)
{
return -ENODEV;
}
/* Save the SPI instance in the mcp2515_config_s structure */
g_mcp2515config.config.spi = spi;
/* Instantiate the MCP2515 CAN Driver */
mcp2515 = mcp2515_instantiate(&g_mcp2515config.config);
if (mcp2515 == NULL)
{
canerr("ERROR: Failed to get MCP2515 Driver Loaded\n");
return -ENODEV;
}
/* Save the opaque structure */
g_mcp2515config.handle = (MCP2515_HANDLE) mcp2515;
/* Initialize the CAN Device with the MCP2515 operations */
can = mcp2515_initialize(mcp2515);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register(devpath, can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
}
return OK;
}
#endif /* CONFIG_SPI && CONFIG_CAN_MCP2515 */

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@ -74,6 +74,10 @@ void stm32_spidev_initialize(void)
* architecture.
*/
#ifdef CONFIG_CAN_MCP2515
(void)stm32_configgpio(GPIO_MCP2515_CS); /* MCP2515 chip select */
#endif
#ifdef CONFIG_CL_MFRC522
(void)stm32_configgpio(GPIO_CS_MFRC522); /* MFRC522 chip select */
#endif
@ -120,6 +124,13 @@ void stm32_spidev_initialize(void)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
#if defined(CONFIG_CAN_MCP2515)
if (devid == SPIDEV_CANBUS(0))
{
stm32_gpiowrite(GPIO_MCP2515_CS, !selected);
}
#endif
#if defined(CONFIG_CL_MFRC522)
if (devid == SPIDEV_WIRELESS(0))
{

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@ -86,6 +86,9 @@
#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define GPIO_MCP2515_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define GPIO_NRF24L01_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
@ -114,6 +117,10 @@
#define GPIO_NRF24L01_IRQ (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTA|GPIO_PIN0)
/* MCP2515 IRQ line: PB.0 */
#define GPIO_MCP2515_IRQ (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTB|GPIO_PIN0)
/* USB Soft Connect Pullup: PC.13 */
#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\

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@ -124,4 +124,52 @@ config CAN_NPOLLWAITERS
The maximum number of threads that may be waiting on the
poll method.
comment "CAN Bus Controllers:"
config CAN_MCP2515
bool "Microchip MCP2515 CAN Bus Controller over SPI"
default n
depends on SPI
select ARCH_HAVE_CAN_ERRORS
---help---
Enable driver support for Microchip MCP2515.
if CAN_MCP2515
config MCP2515_BITRATE
int "MCP2515 bitrate"
default 500000
---help---
MCP2515 bitrate in bits per second.
config MCP2515_PROPSEG
int "MCP2515 Propagation Segment TQ"
default 2
range 1 8
---help---
The length of the bit time is Tquanta * (SyncSeg + PropSeg + PhaseSeg1 + PhaseSeg2).
config MCP2515_PHASESEG1
int "MCP2515 Phase Segment 1"
default 2
range 1 8
---help---
The length of the bit time is Tquanta * (SyncSeg + PropSeg + PhaseSeg1 + PhaseSeg2).
config MCP2515_PHASESEG2
int "MCP2515 Phase Segment 2"
default 3
range 2 8
---help---
The length of the bit time is Tquanta * (SyncSeg + PropSeg + PhaseSeg1 + PhaseSeg2).
config MCP2515_SJW
int "MCP2515 Synchronization Jump Width"
default 1
range 1 4
---help---
The duration of a synchronization jump is SJW.
endif # CAN_MCP2515
endif # CAN

2581
drivers/can/mcp2515.c Normal file

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397
drivers/can/mcp2515.h Normal file
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@ -0,0 +1,397 @@
/* Register Addresses */
#define MCP2515_RXF0SIDH 0x00
#define MCP2515_RXF0SIDL 0x01
#define MCP2515_RXF0EID8 0x02
#define MCP2515_RXF0EID0 0x03
#define MCP2515_RXF1SIDH 0x04
#define MCP2515_RXF1SIDL 0x05
#define MCP2515_RXF1EID8 0x06
#define MCP2515_RXF1EID0 0x07
#define MCP2515_RXF2SIDH 0x08
#define MCP2515_RXF2SIDL 0x09
#define MCP2515_RXF2EID8 0x0a
#define MCP2515_RXF2EID0 0x0b
#define MCP2515_BFPCTRL 0x0c
#define MCP2515_TXRTSCTRL 0x0d
#define MCP2515_CANSTAT 0x0e
#define MCP2515_CANCTRL 0x0f
#define MCP2515_RXF3SIDH 0x10
#define MCP2515_RXF3SIDL 0x11
#define MCP2515_RXF3EID8 0x12
#define MCP2515_RXF3EID0 0x13
#define MCP2515_RXF4SIDH 0x14
#define MCP2515_RXF4SIDL 0x15
#define MCP2515_RXF4EID8 0x16
#define MCP2515_RXF4EID0 0x17
#define MCP2515_RXF5SIDH 0x18
#define MCP2515_RXF5SIDL 0x19
#define MCP2515_RXF5EID8 0x1a
#define MCP2515_RXF5EID0 0x1b
#define MCP2515_TEC 0x1c
#define MCP2515_REC 0x1d
#define MCP2515_RXM0SIDH 0x20
#define MCP2515_RXM0SIDL 0x21
#define MCP2515_RXM0EID8 0x22
#define MCP2515_RXM0EID0 0x23
#define MCP2515_RXM1SIDH 0x24
#define MCP2515_RXM1SIDL 0x25
#define MCP2515_RXM1EID8 0x26
#define MCP2515_RXM1EID0 0x27
#define MCP2515_CNF3 0x28
#define MCP2515_CNF2 0x29
#define MCP2515_CNF1 0x2a
#define MCP2515_CANINTE 0x2b
#define MCP2515_CANINTF 0x2c
#define MCP2515_EFLG 0x2d
#define MCP2515_TXB0CTRL 0x30
#define MCP2515_TXB0SIDH 0x31
#define MCP2515_TXB0SIDL 0x32
#define MCP2515_TXB0EID8 0x33
#define MCP2515_TXB0EID0 0x34
#define MCP2515_TXB0DLC 0x35
#define MCP2515_TXB0D0 0x36
#define MCP2515_TXB0D1 0x37
#define MCP2515_TXB0D2 0x38
#define MCP2515_TXB0D3 0x39
#define MCP2515_TXB0D4 0x3a
#define MCP2515_TXB0D5 0x3b
#define MCP2515_TXB0D6 0x3c
#define MCP2515_TXB0D7 0x3d
#define MCP2515_TXB1CTRL 0x40
#define MCP2515_TXB1SIDH 0x41
#define MCP2515_TXB1SIDL 0x42
#define MCP2515_TXB1EID8 0x43
#define MCP2515_TXB1EID0 0x44
#define MCP2515_TXB1DLC 0x45
#define MCP2515_TXB1D0 0x46
#define MCP2515_TXB1D1 0x47
#define MCP2515_TXB1D2 0x48
#define MCP2515_TXB1D3 0x49
#define MCP2515_TXB1D4 0x4a
#define MCP2515_TXB1D5 0x4b
#define MCP2515_TXB1D6 0x4c
#define MCP2515_TXB1D7 0x4d
#define MCP2515_TXB2CTRL 0x50
#define MCP2515_TXB2SIDH 0x51
#define MCP2515_TXB2SIDL 0x52
#define MCP2515_TXB2EID8 0x53
#define MCP2515_TXB2EID0 0x54
#define MCP2515_TXB2DLC 0x55
#define MCP2515_TXB2D0 0x56
#define MCP2515_TXB2D1 0x57
#define MCP2515_TXB2D2 0x58
#define MCP2515_TXB2D3 0x59
#define MCP2515_TXB2D4 0x5a
#define MCP2515_TXB2D5 0x5b
#define MCP2515_TXB2D6 0x5c
#define MCP2515_TXB2D7 0x5d
#define MCP2515_RXB0CTRL 0x60
#define MCP2515_RXB0SIDH 0x61
#define MCP2515_RXB0SIDL 0x62
#define MCP2515_RXB0EID8 0x63
#define MCP2515_RXB0EID0 0x64
#define MCP2515_RXB0DLC 0x65
#define MCP2515_RXB0D0 0x66
#define MCP2515_RXB0D1 0x67
#define MCP2515_RXB0D2 0x68
#define MCP2515_RXB0D3 0x69
#define MCP2515_RXB0D4 0x6a
#define MCP2515_RXB0D5 0x6b
#define MCP2515_RXB0D6 0x6c
#define MCP2515_RXB0D7 0x6d
#define MCP2515_RXB1CTRL 0x70
#define MCP2515_RXB1SIDH 0x71
#define MCP2515_RXB1SIDL 0x72
#define MCP2515_RXB1EID8 0x73
#define MCP2515_RXB1EID0 0x74
#define MCP2515_RXB1DLC 0x75
#define MCP2515_RXB1D0 0x76
#define MCP2515_RXB1D1 0x77
#define MCP2515_RXB1D2 0x78
#define MCP2515_RXB1D3 0x79
#define MCP2515_RXB1D4 0x7a
#define MCP2515_RXB1D5 0x7b
#define MCP2515_RXB1D6 0x7c
#define MCP2515_RXB1D7 0x7d
/* Offset to simplify mcp2515_receive() function */
#define MCP2515_RX0_OFFSET 0x00
#define MCP2515_RX1_OFFSET 0x10
/* Offset to simplify mcp2515_send() function */
#define MCP2515_TX0_OFFSET 0x00
#define MCP2515_TX1_OFFSET 0x10
#define MCP2515_TX2_OFFSET 0x20
/* CANCTRL: CAN CONTROL REGISTER */
#define CANCTRL_CLKPRE_SHIFT (0) /* Bits 0-1: CLKOUT Pin Prescaler bits */
#define CANCTRL_CLKPRE_MASK (3 << CANCTRL_CLKPRE_SHIFT)
#define CANCTRL_CLKEN (1 << 2) /* Bit 2: CLKOUT Pin Enable bit */
#define CANCTRL_OSM (1 << 3) /* Bit 3: One-Shot Mode bit */
#define CANCTRL_ABAT (1 << 4) /* Bit 4: Abort All Pending Transmissions bit */
#define CANCTRL_REQOP_SHIFT (5) /* Bits 5-7: Request Operation Mode bits */
#define CANCTRL_REQOP_MASK (7 << CANCTRL_REQOP_SHIFT)
#define CANCTRL_REQOP_NORMAL (0 << CANCTRL_REQOP_SHIFT)
#define CANCTRL_REQOP_SLEEP (1 << CANCTRL_REQOP_SHIFT)
#define CANCTRL_REQOP_LOOPBK (2 << CANCTRL_REQOP_SHIFT)
#define CANCTRL_REQOP_LISTEN (3 << CANCTRL_REQOP_SHIFT)
#define CANCTRL_REQOP_CONFIG (4 << CANCTRL_REQOP_SHIFT)
/* TXBnCTRL TRANSMIT BUFFER n CONTROL REGISTER */
#define TXBCTRL_TXP_SHIFT (0) /* Bits 0-1: Transmit Buffer Priority */
#define TXBCTRL_TXP_MASK (3 << MCP2515_TXBCTRL_TXP_SHIFT)
/* Bit 2: Not used */
#define TXBCTRL_TXREQ (1 << 3) /* Bit 3: Message Transmit Request bit */
#define TXBCTRL_TXERR (1 << 4) /* Bit 4: Transmission Error Detected bit */
#define TXBCTRL_MLOA (1 << 5) /* Bit 5: Message Lost Arbitration bit */
#define TXBCTRL_ABTF (1 << 6) /* Bit 6: Message Aborted Flag bit */
/* Bit 7: Not used */
/* TXRTSCTRL TXnRTS PIN CONTROL AND STATUS REGISTER */
#define TXRTSCTRL_B0RTSM (1 << 0) /* Bit 0: TX0RTS Pin mode bit */
#define TXRTSCTRL_B1RTSM (1 << 1) /* Bit 1: TX1RTS Pin mode bit */
#define TXRTSCTRL_B2RTSM (1 << 2) /* Bit 2: TX2RTS Pin mode bit */
#define TXRTSCTRL_B0RTS (1 << 3) /* Bit 3: TX0RTS Pin State bit */
#define TXRTSCTRL_B1RTS (1 << 4) /* Bit 4: TX1RTS Pin State bit */
#define TXRTSCTRL_B2RTS (1 << 5) /* Bit 5: TX2RTS Pin State bit */
/* Bit 6-7: Not used */
/* TXBnSIDH TRANSMIT BUFFER n STANDARD IDENTIFIER HIGH */
#define TXBSIDH_SID_MASK 0xff /* Standard Identifier bits <10:3> */
/* TXBnSIDL TRANSMIT BUFFER n STANDARD IDENTIFIER LOW */
#define TXBSIDL_SID_SHIFT (5) /* Bits 5-7: Standard Identifier bits <2:0> */
#define TXBSIDL_SID_MASK (0x7 << TXBSIDL_SID_SHIFT)
#define TXBSIDL_EXIDE (1 << 3) /* Bit 3: Extended Identifier Enable bit */
#define TXBSIDL_EID_SHIFT (0) /* Bits 0-1: Extended Identifier bits <17:16> */
#define TXBSIDL_EID_MASK (0x03 << TXBSIDL_EID_MASK)
/* TXBnEID8 TRANSMIT BUFFER n EXTENDED IDENTIFIER HIGH */
#define TXBEID8_EID_MASK 0xff /* Bits 0-7: Extended Identifier bits <15:8> */
/* TXBnEID0 TRANSMIT BUFFER n EXTENDED IDENTIFIER LOW */
#define TXBEID0_EID_MASK 0xff /* Bits 0-7: Extended Identifier bits <7:0> */
/* TXBnDLC - TRANSMIT BUFFER n DATA LENGTH CODE */
#define TXBDLC_DLC_SHIFT (0) /* Bits 0-3: Data Length Code <3:0> bits */
#define TXBDLC_DLC_MASK (0xf << TXBDLC_DLC_SHIFT)
#define TXBDLC_RTR (1 << 6) /* Bit 6: Remote Transmission Request bit */
/* TXBnDm TRANSMIT BUFFER n DATA BYTE m */
#define TXBD_D0 (1 << 0) /* Bit 0: Transmit Buffer n Data Field Bytes 0 */
#define TXBD_D1 (1 << 1) /* Bit 1: Transmit Buffer n Data Field Bytes 1 */
#define TXBD_D2 (1 << 2) /* Bit 2: Transmit Buffer n Data Field Bytes 2 */
#define TXBD_D3 (1 << 3) /* Bit 3: Transmit Buffer n Data Field Bytes 3 */
#define TXBD_D4 (1 << 4) /* Bit 4: Transmit Buffer n Data Field Bytes 4 */
#define TXBD_D5 (1 << 5) /* Bit 5: Transmit Buffer n Data Field Bytes 5 */
#define TXBD_D6 (1 << 6) /* Bit 6: Transmit Buffer n Data Field Bytes 6 */
#define TXBD_D7 (1 << 7) /* Bit 7: Transmit Buffer n Data Field Bytes 7 */
/* RXB0CTRL RECEIVE BUFFER 0 CONTROL */
#define RXB0CTRL_FILHIT (1 << 0) /* Bit 0: Filter Hit bit - 1 = Msg was accepted by Filter 1; 0 = Filter 0 */
#define RXB0CTRL_BUKT1 (1 << 1) /* Bit 1: Read-only Copy of BUKT bit (used internally by the MCP2515) */
#define RXB0CTRL_BUKT (1 << 2) /* Bit 2: Rollover Enable bit */
/* These bits are common to RXB0 and RXB1: */
#define RXBCTRL_RXRTR (1 << 3) /* Bit 3: Received Remote Transfer Request bit */
/* Bit 4: Not used */
#define RXBCTRL_RXM_SHIFT (5) /* Bits 5-6: Receive Buffer Operating Mode bits */
#define RXBCTRL_RXM_MASK (0x3 << RXBCTRL_RXM_SHIFT)
#define RXBCTRL_RXM_ALLMSG (3 << RXBCTRL_RXM_SHIFT) /* 11: Turn mask/filters off; receive any message */
#define RXBCTRL_RXM_ALLVALID (0 << RXBCTRL_RXM_SHIFT) /* 00: Receive all valid msgs using (STD or EXT) that meet filter criteria */
/* Bit 7: Not used */
/* N.B.: In the datasheet DS21801D the file RXM of RXBnCTRL could to assume
the value 01 and 10 to receive only STD or EXT msgs respectively.
But in a more recent datasheet DS20001801H it was removed. */
/* RXB1CTRL RECEIVE BUFFER 1 CONTROL */
#define RXB1CTRL_FILHIT_SHIFT (0) /* Filter Hit bits - indicates which acceptance filter enabled reception of message */
#define RXB1CTRL_FILHIT_MASK (0x7 << RXB0CTRL_FILHIT_SHIFT)
#define RXB1CTRL_FILHIT_F5 (5 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 5 (RXF5) */
#define RXB1CTRL_FILHIT_F4 (4 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 4 (RXF4) */
#define RXB1CTRL_FILHIT_F3 (3 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 3 (RXF3) */
#define RXB1CTRL_FILHIT_F2 (2 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 2 (RXF2) */
#define RXB1CTRL_FILHIT_F1 (1 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 1 (RXF1) (Only if BUKT bit set in RXB0CTRL) */
#define RXB1CTRL_FILHIT_F0 (0 << RXB1CTRL_FILHIT_SHIFT) /* Acceptance Filter 0 (RXF0) (Only if BUKT bit set in RXB0CTRL) */
/* BFPCTRL RXnBF PIN CONTROL AND STATUS */
#define BFPCTRL_B0BFM (1 << 0) /* Bit 0: RX0BF Pin Operation Mode bit */
#define BFPCTRL_B1BFM (1 << 1) /* Bit 1: RX1BF Pin Operation Mode bit */
#define BFPCTRL_B0BFE (1 << 2) /* Bit 2: RX0BF Pin Function Enable bit */
#define BFPCTRL_B1BFE (1 << 3) /* Bit 3: RX1BF Pin Function Enable bit */
#define BFPCTRL_B0BFS (1 << 4) /* Bit 4: RX0BF Pin State bit (Digital Output mode only) */
#define BFPCTRL_B1BFS (1 << 5) /* Bit 5: RX1BF Pin State bit (Digital Output mode only) */
/* Bits 6-7: Not used */
/* RXBnSIDH RECEIVE BUFFER n STANDARD IDENTIFIER HIGH */
#define RXBSIDH_SID_MASK 0xff /* Standard Identifier bits <10:3> */
/* RXBnSIDL RECEIVE BUFFER n STANDARD IDENTIFIER LOW */
#define RXBSIDL_SID_SHIFT (5) /* Bits 5-7: Standard Identifier bits <2:0> */
#define RXBSIDL_SID_MASK (0x7 << RXBSIDL_SID_SHIFT)
#define RXBSIDL_SRR (1 << 4) /* Bit 4: Standard Frame Remote Transmit Request bit (valid only if IDE bit = '0')*/
#define RXBSIDL_IDE (1 << 3) /* Bit 3: Extended Identifier Message received */
/* Bit 2: Not used */
#define RXBSIDL_EID_SHIFT (0) /* Bits 0-1: Extended Identifier bits <17:16> */
#define RXBSIDL_EID_MASK (0x03 << RXBSIDL_EID_SHIFT)
/* RXBnEID8 RECEIVE BUFFER n EXTENDED IDENTIFIER HIGH */
#define RXBEID8_EID_MASK 0xff /* Bits 0-7: Extended Identifier bits <15:8> */
/* RXBnEID0 RECEIVE BUFFER n EXTENDED IDENTIFIER LOW */
#define RXBEID0_EID_MASK 0xff /* Bits 0-7: Extended Identifier bits <7:0> */
/* RXBnDLC RECEIVE BUFFER n DATA LENGHT CODE */
#define RXBDLC_DLC_SHIFT (0) /* Bits 0-3: Data Length Code <3:0> bits */
#define RXBDLC_DLC_MASK (0xf << RXBDLC_DLC_SHIFT)
#define RXBDLC_RB0 (1 << 4) /* Bit 4: Reserved bit 0 */
#define RXBDLC_RB1 (1 << 5) /* Bit 5: Reserved bit 1 */
#define RXBDLC_RTR (1 << 6) /* Bit 6: Remote Transmission Request bit */
/* Bit 7: Not used */
/* RXFnSIDH FILTER n STANDARD IDENTIFIER HIGH */
#define RXFSIDH_SID_MASK 0xff /* Standard Identifier Filter bits <10:3> */
/* RXFnSIDL FILTER n STANDARD IDENTIFIER LOW */
#define RXFSIDL_EID_SHIFT (0) /* Bit 0-1: Extended Identifier Filter bits <17:16> */
#define RXFSIDL_EID_MASK (3 << RXFSIDL_EID_SHIFT)
#define RXFSIDL_EXIDE (1 << 3) /* Bit 3: Extended Identifier Enable bit */
#define RXFSIDL_SID_SHIFT (5) /* Bits 5-7: Standard Identifier Filter bits <2:0> */
#define RXFSIDL_SID_MASK (0x7 << RXFSIDL_SID_SHIFT)
/* RXFnEID8 FILTER n EXTENDED IDENTIFIER HIGH */
#define RXFEID8_EID_MASK 0xff /* Extended Identifier bits <15:8> */
/* RXFnEID0 FILTER n EXTENDED IDENTIFIER LOW */
#define RXFEID0_EID_MASK 0xff /* Extended Identifier bits <7:0> */
/* RXMnSIDH MASK n STANDARD IDENTIFIER HIGH */
#define RXMSIDH_SID_MASK 0xff /* Standard Identifier Mask bits <10:3> */
/* RXMnSIDL MASK n STANDARD IDENTIFIER LOW */
#define RXMSIDL_EID_SHIFT (0) /* Bits 0-1: Extended Identifier Mask bits <17:16> */
#define RXMSIDL_EID_MASK (3 << RXMSIDH_EID_SHIFT)
#define RXMSIDL_SID_SHIFT (5) /* Bits 5-7: Standard Identifier Mask bits <2:0> */
#define RXMSIDL_MASK (7 << RXMSIDH_SID_SHIFT)
/* RXMnEID8 MASK n EXTENDED IDENTIFIER HIGH */
#define RXMEID8_EID_MASK 0xff /* Extended Identifier bits <15:8> */
/* RXMnEID0 MASK n EXTENDED IDENTIFIER LOW */
#define RXMEID0_EID_MASK 0xff /* Extended Identifier Mask bits <7:0> */
/* CNF1 CONFIGURATION 1 */
#define CNF1_BRP_SHIFT (0) /* Bits 0-5: Baud Rate Prescaler bits <5:0>, TQ = 2 x (BRP + 1)/Fosc */
#define CNF1_BRP_MASK (0x3f << CNF1_BRP_SHIFT)
#define CNF1_SJW_SHIFT (6) /* Bit 6-7: Synchronization Jump Width Length bits <1:0> */
#define CNF1_SJW_MASK (3 << CNF1_SJW_SHIFT)
# define CNF1_SJW_4xTQ (3 << CNF1_SJW_SHIFT) /* Length = 4 x TQ */
# define CNF1_SJW_3xTQ (2 << CNF1_SJW_SHIFT) /* Length = 3 x TQ */
# define CNF1_SJW_2xTQ (1 << CNF1_SJW_SHIFT) /* Length = 2 x TQ */
# define CNF1_SJW_1xTQ (0 << CNF1_SJW_SHIFT) /* Length = 1 x TQ */
/* CNF2 CONFIGURATION 2 */
#define CNF2_PRSEG_SHIFT (0) /* Bits 0-2: Propagation Segment Length bits <2:0>, (PRSEG + 1) x TQ */
#define CNF2_PRSEG_MASK (7 << CNF2_PRSEG_SHIFT)
#define CNF2_PHSEG1_SHIFT (3) /* Bits 3-5: PS1 Length bits <2:0>, (PHSEG1 + 1) x TQ */
#define CNF2_PHSEG1_MASK (7 << CNF2_PHSEG1_SHIFT)
#define CNF2_SAM (1 << 6) /* Bit 6: Sample Point Configuration bit */
#define CNF2_BTLMODE (1 << 7) /* Bit 7: PS2 Bit Time Length bit */
/* CNF3 - CONFIGURATION 3 */
#define CNF3_PHSEG2_SHIFT (0) /* Bits 0-2: PS2 Length bits<2:0>, (PHSEG2 + 1) x TQ */
#define CNF3_PHSEG2_MASK (7 << CNF3_PHSEG2_SHIFT)
#define CNF3_WAKFIL (1 << 6) /* Bit 3: Wake-up Filter bit */
#define CNF3_SOF (1 << 7) /* Bit 7: Start-of-Frame signal bit */
/* TEC TRANSMIT ERROR COUNTER */
#define TEC_MASK 0xff /* Transmit Error Count bits <7:0> */
/* REC RECEIVER ERROR COUNTER */
#define REC_MASK 0xff /* Receive Error Count bits <7:0> */
/* EFLG ERROR FLAG */
#define EFLG_EWARN (1 << 0) /* Bit 0: Error Warning Flag bit */
#define EFLG_RXWAR (1 << 1) /* Bit 1: Receive Error Warning Flag bit */
#define EFLG_TXWAR (1 << 2) /* Bit 2: Transmit Error Warning Flag bit */
#define EFLG_RXEP (1 << 3) /* Bit 3: Receive Error-Passive Flag bit */
#define EFLG_TXEP (1 << 4) /* Bit 4: Transmit Error-Passive Flag bit */
#define EFLG_TXBO (1 << 5) /* Bit 5: Bus-Off Error Flag bit */
#define EFLG_RX0OVR (1 << 6) /* Bit 6: Receive Buffer 0 Overflow Flag bit */
#define EFLG_RX1OVR (1 << 7) /* Bit 7: Receive Buffer 1 Overflow Flag bit */
/* CANINTE/CANINTF INTERRUPT ENABLE/FLAG */
#define MCP2515_INT_RX0 (1 << 0) /* Bit 0: Receive Buffer 0 Full Interrupt Enable bit */
#define MCP2515_INT_RX1 (1 << 1) /* Bit 1: Receive Buffer 1 Full Interrupt Enable bit */
#define MCP2515_INT_TX0 (1 << 2) /* Bit 2: Transmit Buffer 0 Empty Interrupt Enable bit */
#define MCP2515_INT_TX1 (1 << 3) /* Bit 3: Transmit Buffer 1 Empty Interrupt Enable bit */
#define MCP2515_INT_TX2 (1 << 4) /* Bit 4: Transmit Buffer 2 Empty Interrupt Enable bit */
#define MCP2515_INT_ERR (1 << 5) /* Bit 5: Error Interrupt Enable bit (multiple sources in EFLG register) */
#define MCP2515_INT_WAK (1 << 6) /* Bit 6: Wakeup Interrupt Enable bit */
#define MCP2515_INT_MERR (1 << 7) /* Bit 7: Message Error Interrupt Enable bit */
/* MCP2515 SPI Instruction/Command byte */
#define MCP2515_RESET 0xC0
#define MCP2515_READ 0x03
#define MCP2515_READ_RX0 0x90
#define MCP2515_READ_RX1 0x94
#define MCP2515_WRITE 0x02
#define MCP2515_LOAD_TX0 0x40
#define MCP2515_LOAD_TX1 0x42
#define MCP2515_LOAD_TX2 0x44
#define MCP2515_RTS_TX0 0x81
#define MCP2515_RTS_TX1 0x82
#define MCP2515_RTS_TX2 0x84
#define MCP2515_RTS_ALL 0x87
#define MCP2515_READ_STATUS 0xA0
#define MCP2515_RX_STATUS 0xB0
#define MCP2515_BITMOD 0x05
/* CANCTRL register will be 0x87 after reset and in Conf. Mode */
#define DEFAULT_CANCTRL_CONFMODE 0x87
/* Crystal Frequency used on MCP2515 board */
#define MCP2515_CANCLK_FREQUENCY 8000000

164
include/nuttx/can/mcp2515.h Normal file
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@ -0,0 +1,164 @@
/****************************************************************************
* include/nuttx/can/mcp2515.h
*
* Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved.
* Author: Alan Carvalho de Assis <acassis@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_CAN_MCP2515_H
#define __INCLUDE_NUTTX_CAN_MCP2515_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/irq.h>
#include <nuttx/config.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/spi/spi.h>
#include <nuttx/can/can.h>
#if defined(CONFIG_CAN) && defined(CONFIG_CAN_MCP2515)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* SPI BUS PARAMETERS *******************************************************/
#define MCP2515_SPI_FREQUENCY (1000000) /* 1 MHz */
#define MCP2515_SPI_MODE (SPIDEV_MODE0) /* Device uses SPI Mode 0: CPOL=0, CPHA=0 */
/****************************************************************************
* Public Types
****************************************************************************/
typedef void (*mcp2515_handler_t)(FAR struct mcp2515_config_s *config, FAR void *arg);
/* A reference to a structure of this type must be passed to the MCP2515 driver when the
* driver is instantiated. This structure provides information about the configuration of the
* MCP2515 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied by the driver
* and is presumed to persist while the driver is active. The memory must be writeable
* because, under certain circumstances, the driver may modify the frequency.
*/
struct mcp2515_config_s
{
struct spi_dev_s *spi; /* SPI used for MCP2515 communication */
uint32_t baud; /* Configured baud */
uint32_t btp; /* Bit timing/prescaler register setting */
uint8_t devid; /* MCP2515 device ID */
uint8_t mode; /* See enum mcp2515_canmod_e */
uint8_t nfilters; /* Number of standard/extended filters */
uint8_t ntxbuffers; /* Number of TX Buffer available */
uint8_t txbuf0[10]; /* Transmit Buffer 0 */
uint8_t txbuf1[10]; /* Transmit Buffer 1 */
uint8_t txbuf2[10]; /* Transmit Buffer 2 */
#ifdef MCP2515_LOOPBACK
bool loopback; /* True: Loopback mode */
#endif
/* Device characterization */
/* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the ADXL345 driver from differences in GPIO
* interrupt handling by varying boards and MCUs.
*
* attach - Attach the ADXL345 interrupt handler to the GPIO interrupt
*/
int (*attach)(FAR struct mcp2515_config_s *state, mcp2515_handler_t handler,
FAR void *arg);
};
typedef FAR void *MCP2515_HANDLE;
struct mcp2515_can_s;
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: mcp2515_instantiate
*
* Description:
* Initialize a CAN Driver for MCP2515.
*
* Input Parameters:
* spi - An instance of the SPI interface to use to communicate with
* MCP2515
* config - Describes the configuration of the MCP2515 part.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
FAR struct mcp2515_can_s *mcp2515_instantiate(FAR struct mcp2515_config_s *config);
/****************************************************************************
* Name: mcp2515_initialize
*
* Description:
* Initialize a CAN Driver for MCP2515.
*
* Input Parameters:
* spi - An instance of the SPI interface to use to communicate with
* MCP2515
* config - Describes the configuration of the MCP2515 part.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
FAR struct can_dev_s *mcp2515_initialize(FAR struct mcp2515_can_s *mcp2515can);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_CAN && CONFIG_CAN_MCP2515 */
#endif /* __INCLUDE_NUTTX_CAN_MCP2515_H */

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@ -457,6 +457,7 @@
#define SPIDEV_IEEE802154(n) SPIDEV_ID(SPIDEVTYPE_IEEE802154, (n))
#define SPIDEV_CONTACTLESS(n) SPIDEV_ID(SPIDEVTYPE_CONTACTLESS, (n))
#define SPIDEV_USER(n) SPIDEV_ID(SPIDEVTYPE_USER, (n))
#define SPIDEV_CANBUS(n) SPIDEV_ID(SPIDEVTYPE_CANBUS, (n))
/****************************************************************************
* Public Types
@ -491,7 +492,8 @@ enum spi_devtype_e
SPIDEVTYPE_TEMPERATURE, /* Select SPI Temperature sensor device */
SPIDEVTYPE_IEEE802154, /* Select SPI IEEE 802.15.4 wireless device */
SPIDEVTYPE_CONTACTLESS, /* Select SPI Contactless device */
SPIDEVTYPE_USER /* Board-specific values start here */
SPIDEVTYPE_USER, /* Board-specific values start here */
SPIDEVTYPE_CANBUS /* Select SPI CAN Bus controller over SPI */
};
/* Certain SPI devices may required different clocking modes */