From cf62b2288ba3505ace479f2ecc0239e98530ff52 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Feb 2019 14:00:05 -0600 Subject: [PATCH] Squashed commit of the following: arch/arm/src/tiva/cc13xx/cc13xx_prcm.c: Fix reverse bit modification: Set the bit to enabled clocking, clear the bit to dissable clocking. arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c: Use correct index for determining if this the SERIAL or PERIPH power domain. --- arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c | 6 +-- arch/arm/src/tiva/cc13xx/cc13xx_prcm.c | 58 +++++++++++++++++---- arch/arm/src/tiva/cc13xx/cc13xx_prcm.h | 36 +++++++++++++ configs/launchxl-cc1312r1/README.txt | 11 ++-- 4 files changed, 90 insertions(+), 21 deletions(-) diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c index 65fff8305e..47e7a1931a 100644 --- a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c +++ b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c @@ -70,12 +70,12 @@ void cc13xx_periph_enablepwr(uint32_t peripheral) { irqstate_t flags; uint32_t domain; - int dndx; - int pndx; + unsigned int dndx; + unsigned int pndx; dndx = PRCM_DOMAIN_INDEX(peripheral); pndx = PRCM_PERIPH_ID(peripheral); - domain = (pndx == 0 ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH); + domain = (dndx == 0 ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH); /* Remember that this peripheral needs power in this domain */ diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c index ed77ce29d1..4a5050e9b4 100644 --- a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c +++ b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c @@ -130,6 +130,9 @@ static const uintptr_t g_dcgcr_base[PRCM_NPERIPH] = * modes are:{PRCM_RUN_MODE, PRCM_SLEEP_MODE, or * PRCM_DEEP_SLEEP_MODE} * + * Returned Value: + * None + * ******************************************************************************/ void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv, @@ -202,6 +205,9 @@ void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv, * worddiv - The desired word clock divider. * bitdiv - The desired bit clock divider. * + * Returned Value: + * None + * ******************************************************************************/ #ifdef CONFIG_TIVA_I2S @@ -267,6 +273,9 @@ void prcm_audioclock_manual(uint32_t clkconfig, uint32_t mstdiv, * I2S_SAMPLE_RATE_24K, I2S_SAMPLE_RATE_32K, or * I2S_SAMPLE_RATE_48K} * + * Returned Value: + * None + * ******************************************************************************/ #ifdef CONFIG_TIVA_I2S @@ -369,6 +378,9 @@ void prcm_audioclock_configure(uint32_t clkconfig, * 5) PRCM_DOMAIN_SYSBUS * 6) PRCM_DOMAIN_CPU * + * Returned Value: + * None + * ******************************************************************************/ void prcm_powerdomain_on(uint32_t domains) @@ -376,10 +388,10 @@ void prcm_powerdomain_on(uint32_t domains) /* Check the arguments. */ DEBUGASSERT((domains & PRCM_DOMAIN_RFCORE) != 0 || - (domains & PRCM_DOMAIN_SERIAL) != 0 || - (domains & PRCM_DOMAIN_PERIPH) != 0 || - (domains & PRCM_DOMAIN_CPU) != 0 || - (domains & PRCM_DOMAIN_VIMS) != 0); + (domains & PRCM_DOMAIN_SERIAL) != 0 || + (domains & PRCM_DOMAIN_PERIPH) != 0 || + (domains & PRCM_DOMAIN_CPU) != 0 || + (domains & PRCM_DOMAIN_VIMS) != 0); /* Assert the request to power on the right domains. */ @@ -440,6 +452,9 @@ void prcm_powerdomain_on(uint32_t domains) * 5) PRCM_DOMAIN_SYSBUS * 6) PRCM_DOMAIN_CPU * + * Returned Value: + * None + * ******************************************************************************/ void prcm_powerdomain_off(uint32_t domains) @@ -519,6 +534,9 @@ void prcm_powerdomain_off(uint32_t domains) * - True: The specified domains are all powered up. * - False: One or more of the domains is powered down. * + * Returned Value: + * None + * ******************************************************************************/ bool prcm_powerdomain_status(uint32_t domains) @@ -549,7 +567,7 @@ bool prcm_powerdomain_status(uint32_t domains) if (domains & PRCM_DOMAIN_PERIPH) { - status = status && (pdstat0 & PRCM_DOMAIN_PERIPH) != 0; + status = status && (pdstat0 & PRCM_DOMAIN_PERIPH) != 0; } /* Return the status. */ @@ -584,6 +602,9 @@ bool prcm_powerdomain_status(uint32_t domains) * peripheral - The peripheral to enable. This is an encoded value. See the * PRCRM_PERIPH_* definitions for available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_runenable(uint32_t peripheral) @@ -597,7 +618,7 @@ void prcm_periph_runenable(uint32_t peripheral) /* Enable module in Run Mode. */ - modifyreg32(g_rcgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); + modifyreg32(g_rcgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); } /****************************************************************************** @@ -623,6 +644,9 @@ void prcm_periph_runenable(uint32_t peripheral) * peripheral - The peripheral to disable. This is an encoded value. See the * PRCRM_PERIPH_* definitions for available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_rundisable(uint32_t peripheral) @@ -636,7 +660,7 @@ void prcm_periph_rundisable(uint32_t peripheral) /* Disable module in Run Mode. */ - modifyreg32(g_rcgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); + modifyreg32(g_rcgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); } /****************************************************************************** @@ -661,6 +685,9 @@ void prcm_periph_rundisable(uint32_t peripheral) * value. See the PRCRM_PERIPH_* definitions for available * encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_sleepenable(uint32_t peripheral) @@ -674,7 +701,7 @@ void prcm_periph_sleepenable(uint32_t peripheral) /* Enable this peripheral in sleep mode. */ - modifyreg32(g_scgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); + modifyreg32(g_scgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); } /****************************************************************************** @@ -700,6 +727,9 @@ void prcm_periph_sleepenable(uint32_t peripheral) * value. See the PRCRM_PERIPH_* definitions for available * encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_sleepdisable(uint32_t peripheral) @@ -713,7 +743,7 @@ void prcm_periph_sleepdisable(uint32_t peripheral) /* Disable this peripheral in sleep mode */ - modifyreg32(g_scgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); + modifyreg32(g_scgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); } /****************************************************************************** @@ -738,6 +768,9 @@ void prcm_periph_sleepdisable(uint32_t peripheral) * encoded value. See the PRCRM_PERIPH_* definitions for * available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_deepsleepenable(uint32_t peripheral) @@ -751,7 +784,7 @@ void prcm_periph_deepsleepenable(uint32_t peripheral) /* Enable this peripheral in sleep mode. */ - modifyreg32(g_dcgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); + modifyreg32(g_dcgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); } /****************************************************************************** @@ -779,6 +812,9 @@ void prcm_periph_deepsleepenable(uint32_t peripheral) * encoded value. See the PRCRM_PERIPH_* definitions for * available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_deepsleepdisable(uint32_t peripheral) @@ -792,5 +828,5 @@ void prcm_periph_deepsleepdisable(uint32_t peripheral) /* Enable this peripheral in sleep mode. */ - modifyreg32(g_dcgcr_base[index], 0, PRCM_PERIPH_MASKBIT(peripheral)); + modifyreg32(g_dcgcr_base[index], PRCM_PERIPH_MASKBIT(peripheral), 0); } diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h index 6cd5d74413..efcb020430 100644 --- a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h +++ b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h @@ -509,6 +509,9 @@ static inline void prcm_cacheretention_disable(void) * modes are:{PRCM_RUN_MODE, PRCM_SLEEP_MODE, or * PRCM_DEEP_SLEEP_MODE} * + * Returned Value: + * None + * ******************************************************************************/ void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv, @@ -535,6 +538,9 @@ void prcm_infclock_configure(enum prcm_clkdivider_e clkdiv, * worddiv - The desired word clock divider. * bitdiv - The desired bit clock divider. * + * Returned Value: + * None + * ******************************************************************************/ #ifdef CONFIG_TIVA_I2S @@ -569,6 +575,9 @@ void prcm_audioclock_manual(uint32_t clkconfig, uint32_t mstdiv, * I2S_SAMPLE_RATE_24K, I2S_SAMPLE_RATE_32K, or * I2S_SAMPLE_RATE_48K} * + * Returned Value: + * None + * ******************************************************************************/ #ifdef CONFIG_TIVA_I2S @@ -626,6 +635,9 @@ void prcm_audioclock_configure(uint32_t clkconfig, * 5) PRCM_DOMAIN_SYSBUS * 6) PRCM_DOMAIN_CPU * + * Returned Value: + * None + * ******************************************************************************/ void prcm_powerdomain_on(uint32_t domains); @@ -651,6 +663,9 @@ void prcm_powerdomain_on(uint32_t domains); * 5) PRCM_DOMAIN_SYSBUS * 6) PRCM_DOMAIN_CPU * + * Returned Value: + * None + * ******************************************************************************/ void prcm_powerdomain_off(uint32_t domains); @@ -674,6 +689,9 @@ void prcm_powerdomain_off(uint32_t domains); * - True: The specified domains are all powered up. * - False: One or more of the domains is powered down. * + * Returned Value: + * None + * ******************************************************************************/ bool prcm_powerdomain_status(uint32_t domains); @@ -705,6 +723,9 @@ bool prcm_powerdomain_status(uint32_t domains); * peripheral - The peripheral to enable. This is an encoded value. See the * PRCRM_PERIPH_* definitions for available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_runenable(uint32_t peripheral); @@ -732,6 +753,9 @@ void prcm_periph_runenable(uint32_t peripheral); * peripheral - The peripheral to enable. This is an encoded value. See the * PRCRM_PERIPH_* definitions for available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_rundisable(uint32_t peripheral); @@ -758,6 +782,9 @@ void prcm_periph_rundisable(uint32_t peripheral); * value. See the PRCRM_PERIPH_* definitions for available * encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_sleepenable(uint32_t peripheral); @@ -785,6 +812,9 @@ void prcm_periph_sleepenable(uint32_t peripheral); * value. See the PRCRM_PERIPH_* definitions for available * encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_sleepdisable(uint32_t peripheral); @@ -811,6 +841,9 @@ void prcm_periph_sleepdisable(uint32_t peripheral); * encoded value. See the PRCRM_PERIPH_* definitions for * available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_deepsleepenable(uint32_t peripheral); @@ -840,6 +873,9 @@ void prcm_periph_deepsleepenable(uint32_t peripheral); * encoded value. See the PRCRM_PERIPH_* definitions for * available encodings. * + * Returned Value: + * None + * ******************************************************************************/ void prcm_periph_deepsleepdisable(uint32_t peripheral); diff --git a/configs/launchxl-cc1312r1/README.txt b/configs/launchxl-cc1312r1/README.txt index 998648a3b0..086ec02398 100644 --- a/configs/launchxl-cc1312r1/README.txt +++ b/configs/launchxl-cc1312r1/README.txt @@ -20,15 +20,12 @@ Status of this board support is simply to assist in the CC13xx architecture development. Serious board development will occur later. Board support is missing LED and button support. - 2019-02-10: Figured out how to connect J-Link and began debug. First - failure is in tiva_configgpio() while trying to configure the console - UART pins. The failure is a hardfault apparently generated by: + 2019-02-10: Figured out how to connect J-Link and began debug. + 2019-02-12: Now hard-faults in tiva_lowsetup() here: - 109 regval = getreg32(TIVA_GPIO_DOE); + 352 ctl = getreg32(TIVA_CONSOLE_BASE + TIVA_UART_CTL_OFFSET); - The GPIO base address and DOE register offset seem to be okay. Must - be some issue with powering up the GPIO? The TI code calls Power_init() - which has not yet be brought into NuttX. Could this be the issue? + Most likely UART0 clocking is not being enabled correctly. Serial Console ==============