diff --git a/arch/arm/include/samv7/samv71_irq.h b/arch/arm/include/samv7/samv71_irq.h index 221985679c..34d9ab0c49 100644 --- a/arch/arm/include/samv7/samv71_irq.h +++ b/arch/arm/include/samv7/samv71_irq.h @@ -115,8 +115,12 @@ #define SAM_PID_SDRAMC (62) /* SDRAM Controller */ #define SAM_PID_WDT1 (63) /* Watchdog Timer 1 */ #define SAM_PID_CCW (64) /* ARM Cache ECC Warning */ +#define SAM_PID_CCF (65) /* ARM Cache ECC Fault */ +#define SAM_PID_EMACQ1 (66) /* EMAC Queue 1 Interrupt */ +#define SAM_PID_EMACQ2 (67) /* EMAC Queue 2 Interrupt */ +#define SAM_PID_FPIXC (68) /* ARM Cache ECC Warning */ -#define NR_PIDS (65) /* Number of peripheral identifiers */ +#define NR_PIDS (69) /* Number of peripheral identifiers */ /* External interrupts (priority levels >= 256*/ @@ -185,6 +189,10 @@ #define SAM_IRQ_SDRAMC (SAM_IRQ_EXTINT+SAM_PID_SDRAMC) /* SDRAM Controller */ #define SAM_IRQ_WDT1 (SAM_IRQ_EXTINT+SAM_PID_WDT1) /* Watchdog Timer 1 */ #define SAM_IRQ_CCW (SAM_IRQ_EXTINT+SAM_PID_CCW) /* ARM Cache ECC Warning */ +#define SAM_IRQ_CCF (SAM_IRQ_EXTINT+SAM_PID_CCF) /* ARM Cache ECC Fault */ +#define SAM_IRQ_EMACQ1 (SAM_IRQ_EXTINT+SAM_PID_EMACQ1) /* EMAC Queue 1 Interrupt */ +#define SAM_IRQ_EMACQ2 (SAM_IRQ_EXTINT+SAM_PID_EMACQ2) /* EMAC Queue 2 Interrupt */ +#define SAM_IRQ_FPIXC (SAM_IRQ_EXTINTSAM_PID_FPIXC+) /* ARM Cache ECC Warning */ #define SAM_IRQ_NEXTINT NR_PIDS /* Total number of external interrupt numbers */ #define SAM_IRQ_NIRQS (SAM_IRQ_EXTINT+NR_PIDS) /* The number of real IRQs */ diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c index c71e11d430..7dc7c9a1b1 100644 --- a/arch/arm/src/samv7/sam_usbdevhs.c +++ b/arch/arm/src/samv7/sam_usbdevhs.c @@ -4176,10 +4176,34 @@ static int sam_pullup(FAR struct usbdev_s *dev, bool enable) * connections. * * If there is no host connected (no bus activity), then we might - * get a SUSPend interrupt instead of a End of Reset. + * get a SUSPend interrupt instead of a End of Reset. In the case, we + * would like to keep the clock frozen until the host is connected. + * + * The strategy here was taken from the SAMV7 sample code: It will + * force a SUSPend event. Then disable clocking. We will take the + * SUSPend interrupt (because it is already pending), but after the + * clock is frozen, only a WAKEUP interrupt can be received. */ - sam_putreg(USBHS_DEVINT_EORST | USBHS_DEVINT_SUSPD, SAM_USBHS_DEVIER); + /* Enable expected interrupts */ + + sam_putreg(USBHS_DEVINT_EORST | USBHS_DEVINT_WAKEUP | USBHS_DEVINT_SUSPD, + SAM_USBHS_DEVIER); + + /* Clear pending interrupt interrupts */ + + sam_putreg(USBHS_DEVINT_EORST | USBHS_DEVINT_SUSPD, SAM_USBHS_DEVICR); + + /* Force the first suspend event */ + + sam_putreg(USBHS_DEVINT_SUSPD, SAM_USBHS_DEVIFR); + sam_putreg(USBHS_DEVINT_WAKEUP, SAM_USBHS_DEVICR); + + /* Refreeze the clock and wait for the wakeup event */ + + regval = sam_getreg(SAM_USBHS_CTRL); + regval |= USBHS_CTRL_FRZCLK; + sam_putreg(regval, SAM_USBHS_CTRL); } else { @@ -4333,15 +4357,15 @@ static void sam_hw_setup(struct sam_usbdev_s *priv) * unfreeze clocking (FRZCLK = 0) */ - regval &= ~USBHS_CTRL_FRZCLK; - sam_putreg(regval, SAM_USBHS_CTRL); - regval |= USBHS_CTRL_USBE; sam_putreg(regval, SAM_USBHS_CTRL); regval |= USBHS_CTRL_UIMOD_DEVICE; sam_putreg(regval, SAM_USBHS_CTRL); + regval &= ~USBHS_CTRL_FRZCLK; + sam_putreg(regval, SAM_USBHS_CTRL); + /* Select High Speed */ regval = sam_getreg(SAM_USBHS_DEVCTRL); @@ -4359,9 +4383,10 @@ static void sam_hw_setup(struct sam_usbdev_s *priv) regval &= ~USBHS_DEVCTRL_LS; sam_putreg(regval, SAM_USBHS_DEVCTRL); - /* Reset and disable all endpoints (including endpoint 0) */ + /* Reset and disable all endpoints, initializing endpoint 0. */ sam_epset_reset(priv, SAM_EPSET_ALL); + sam_ep0_configure(priv); /* Disconnect the device */