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Make some spacing comply better with coding standard

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This commit is contained in:
Gregory Nutt 2015-10-06 18:32:16 -06:00
parent fc3ed64864
commit d0d62668e7
20 changed files with 191 additions and 189 deletions
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7
arch/arm/src/c5471/c5471_ethernet.c
View File

@ -2002,7 +2002,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
putreg32(0, pbuf);
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
}
/* TX CPU */
@ -2032,7 +2032,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
putreg32(0, pbuf);
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
}
/* RX CPU */
@ -2062,7 +2062,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
putreg32(0, pbuf);
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
}
ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf);
/* Save the descriptor packet size */

20
arch/arm/src/dm320/dm320_framebuffer.c
View File

@ -1308,26 +1308,26 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
putreg16(settings->pos.x, DM320_OSD_CURXP);
putreg16(settings->pos.y, DM320_OSD_CURYP);
}
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((settings->flags & FB_CUR_SETSIZE) != 0)
{
gvdbg("h=%d w=%d\n", settings->size.h, settings->size.w);
if (settings->size.w > MAX_YRES)
{
if (settings->size.w > MAX_YRES)
{
settings->size.w = MAX_YRES;
}
}
if (settings->size.h > MAX_YRES)
{
if (settings->size.h > MAX_YRES)
{
settings->size.h = MAX_YRES;
}
}
putreg16(settings->size.w, DM320_OSD_CURXL);
putreg16(settings->size.h, DM320_OSD_CURYL);
}
putreg16(settings->size.w, DM320_OSD_CURXL);
putreg16(settings->size.h, DM320_OSD_CURYL);
}
#endif
regval = getreg16(DM320_OSD_RECTCUR);

2
arch/arm/src/efm32/efm32_usbdev.c
View File

@ -5189,7 +5189,7 @@ static void efm32_hwinitialize(FAR struct efm32_usbdev_s *priv)
/* First Turn on USB clocking */
modifyreg32(EFM32_CMU_HFCORECLKEN0,0,
CMU_HFCORECLKEN0_USB|CMU_HFCORECLKEN0_USBC);
CMU_HFCORECLKEN0_USB | CMU_HFCORECLKEN0_USBC);
/* At start-up the core is in FS mode. */

6
arch/arm/src/imx/imx_allocateheap.c
View File

@ -86,7 +86,7 @@
void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
{
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)g_idle_topstack;
*heap_start = (FAR void *)g_idle_topstack;
*heap_size = (IMX_SDRAM_VSECTION + CONFIG_RAM_SIZE) - g_idle_topstack;
}
@ -110,14 +110,14 @@ void up_addregion(void)
# if (CONFIG_RAM_NUTTXENTRY & 0xffff0000) != CONFIG_RAM_VSTART
uint32_t start = CONFIG_RAM_VSTART + 0x1000;
uint32_t end = (CONFIG_RAM_NUTTXENTRY & 0xffff0000);
kmm_addregion((FAR void*)start, end - start);
kmm_addregion((FAR void *)start, end - start);
# endif
#endif
/* Check for any additional memory regions */
#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_SIZE)
kmm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
kmm_addregion((FAR void *)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
#endif
}
#endif

8
arch/arm/src/imx/imx_boot.c
View File

@ -118,7 +118,7 @@ extern void imx_boardinitialize(void);
static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
{
uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR;
uint32_t index = vaddr >> 20;
/* Save the page table entry */
@ -180,9 +180,9 @@ static void up_copyvectorblock(void)
*/
#if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM)
uint32_t *src = (uint32_t*)&_vector_start;
uint32_t *end = (uint32_t*)&_vector_end;
uint32_t *dest = (uint32_t*)VECTOR_BASE;
uint32_t *src = (uint32_t *)&_vector_start;
uint32_t *end = (uint32_t *)&_vector_end;
uint32_t *dest = (uint32_t *)VECTOR_BASE;
while (src < end)
{

4
arch/arm/src/imx/imx_decodeirq.c
View File

@ -71,7 +71,7 @@
* Public Functions
********************************************************************************/
void up_decodeirq(uint32_t* regs)
void up_decodeirq(uint32_t *regs)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
lowsyslog(LOG_ERR, "Unexpected IRQ\n");
@ -127,7 +127,7 @@ void up_decodeirq(uint32_t* regs)
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t*)current_regs);
up_restorefpu((uint32_t *)current_regs);
#endif
#ifdef CONFIG_ARCH_ADDRENV

101
arch/arm/src/imx/imx_serial.c
View File

@ -456,7 +456,7 @@ static inline void up_waittxready(struct up_dev_s *priv)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t regval;
uint32_t ucr2;
uint32_t div;
@ -663,7 +663,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Disable the UART */
@ -690,7 +690,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ */
@ -718,11 +718,11 @@ static int up_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
#endif
return ret;
@ -740,7 +740,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
up_disable_irq(priv->rxirq);
@ -828,7 +828,7 @@ static int up_interrupt(int irq, void *context)
int passes = 0;
dev = up_mapirq(irq);
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.
@ -892,7 +892,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s*)arg;
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
@ -927,7 +927,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t rxd0;
rxd0 = up_serialin(priv, UART_RXD0);
@ -945,7 +945,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Enable interrupts for data availab at Rx FIFO */
@ -972,7 +972,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Return true is data is ready in the Rx FIFO */
@ -989,7 +989,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, UART_TXD0, (uint32_t)ch);
}
@ -1003,7 +1003,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* We won't take an interrupt until the FIFO is completely empty (although
* there may still be a transmission in progress).
@ -1032,7 +1032,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* When TXFULL is set, there is no space in the Tx FIFO */
@ -1049,7 +1049,7 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* When TXDC is set, the FIFO is empty and the transmission is complete */
@ -1072,50 +1072,50 @@ static bool up_txempty(struct uart_dev_s *dev)
void up_earlyserialinit(void)
{
/* Configure and disable the UART1 */
/* Configure and disable the UART1 */
#ifdef CONFIG_IMX_UART1
up_serialout(&g_uart1priv, UART_UCR1, 0);
up_serialout(&g_uart1priv, UART_UCR2, 0);
up_serialout(&g_uart1priv, UART_UCR1, 0);
up_serialout(&g_uart1priv, UART_UCR2, 0);
/* Configure UART1 pins: RXD, TXD, RTS, and CTS */
/* Configure UART1 pins: RXD, TXD, RTS, and CTS */
imxgpio_configpfoutput(GPIOC, 9); /* Port C, pin 9: CTS */
imxgpio_configpfinput(GPIOC, 10); /* Port C, pin 10: RTS */
imxgpio_configpfoutput(GPIOC, 11); /* Port C, pin 11: TXD */
imxgpio_configpfinput(GPIOC, 12); /* Port C, pin 12: RXD */
imxgpio_configpfoutput(GPIOC, 9); /* Port C, pin 9: CTS */
imxgpio_configpfinput(GPIOC, 10); /* Port C, pin 10: RTS */
imxgpio_configpfoutput(GPIOC, 11); /* Port C, pin 11: TXD */
imxgpio_configpfinput(GPIOC, 12); /* Port C, pin 12: RXD */
#endif
/* Configure and disable the UART2 */
/* Configure and disable the UART2 */
#ifdef CONFIG_IMX_UART2
up_serialout(&g_uart2priv, UART_UCR1, 0);
up_serialout(&g_uart2priv, UART_UCR2, 0);
up_serialout(&g_uart2priv, UART_UCR1, 0);
up_serialout(&g_uart2priv, UART_UCR2, 0);
/* Configure UART2 pins: RXD, TXD, RTS, and CTS (only, also
* supports DTR, DCD, RI, and DSR -- not configured)
*/
/* Configure UART2 pins: RXD, TXD, RTS, and CTS (only, also
* supports DTR, DCD, RI, and DSR -- not configured)
*/
imxgpio_configpfoutput(GPIOB, 28); /* Port B, pin 28: CTS */
imxgpio_configpfinput(GPIOB, 29); /* Port B, pin 29: RTS */
imxgpio_configpfoutput(GPIOB, 30); /* Port B, pin 30: TXD */
imxgpio_configpfinput(GPIOB, 31); /* Port B, pin 31: RXD */
imxgpio_configpfoutput(GPIOB, 28); /* Port B, pin 28: CTS */
imxgpio_configpfinput(GPIOB, 29); /* Port B, pin 29: RTS */
imxgpio_configpfoutput(GPIOB, 30); /* Port B, pin 30: TXD */
imxgpio_configpfinput(GPIOB, 31); /* Port B, pin 31: RXD */
#endif
/* Configure and disable the UART3 */
/* Configure and disable the UART3 */
#ifdef CONFIG_IMX_UART3
up_serialout(&g_uart3priv, UART_UCR1, 0);
up_serialout(&g_uart3priv, UART_UCR2, 0);
up_serialout(&g_uart3priv, UART_UCR1, 0);
up_serialout(&g_uart3priv, UART_UCR2, 0);
/* Configure UART2 pins: RXD, TXD, RTS, and CTS (only, also
* supports DTR, DCD, RI, and DSR -- not configured)
*/
/* Configure UART2 pins: RXD, TXD, RTS, and CTS (only, also
* supports DTR, DCD, RI, and DSR -- not configured)
*/
imxgpio_configpfoutput(GPIOC, 28); /* Port C, pin 18: CTS */
imxgpio_configpfinput(GPIOC, 29); /* Port C, pin 29: RTS */
imxgpio_configpfoutput(GPIOC, 30); /* Port C, pin 30: TXD */
imxgpio_configpfinput(GPIOC, 31); /* Port C, pin 31: RXD */
imxgpio_configpfoutput(GPIOC, 28); /* Port C, pin 18: CTS */
imxgpio_configpfinput(GPIOC, 29); /* Port C, pin 29: RTS */
imxgpio_configpfoutput(GPIOC, 30); /* Port C, pin 30: TXD */
imxgpio_configpfinput(GPIOC, 31); /* Port C, pin 31: RXD */
#endif
/* Then enable the console UART. The others will be initialized
@ -1165,7 +1165,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint32_t ier;
up_disableuartint(priv, &ier);
@ -1211,12 +1211,11 @@ static inline void up_waittxready(void)
for (tmp = 1000 ; tmp > 0 ; tmp--)
{
/* Loop until TXFULL is zero -- meaning that there is space available
* in the TX FIFO.
*/
/* Loop until TXFULL is zero -- meaning that there is space available
* in the TX FIFO.
*/
if ((getreg32(IMX_REGISTER_BASE + UART_UTS) & UART_UTS_TXFULL) == 0)
if ((getreg32(IMX_REGISTER_BASE + UART_UTS) & UART_UTS_TXFULL) == 0)
{
break;
}

34
arch/arm/src/imx/imx_spi.c
View File

@ -306,16 +306,16 @@ static void spi_txnull(struct imx_spidev_s *priv)
static void spi_txuint16(struct imx_spidev_s *priv)
{
uint16_t *ptr = (uint16_t*)priv->txbuffer;
uint16_t *ptr = (uint16_t *)priv->txbuffer;
spi_putreg(priv, CSPI_TXD_OFFSET, *ptr++);
priv->txbuffer = (void*)ptr;
priv->txbuffer = (void *)ptr;
}
static void spi_txuint8(struct imx_spidev_s *priv)
{
uint8_t *ptr = (uint8_t*)priv->txbuffer;
uint8_t *ptr = (uint8_t *)priv->txbuffer;
spi_putreg(priv, CSPI_TXD_OFFSET, *ptr++);
priv->txbuffer = (void*)ptr;
priv->txbuffer = (void *)ptr;
}
/****************************************************************************
@ -342,16 +342,16 @@ static void spi_rxnull(struct imx_spidev_s *priv)
static void spi_rxuint16(struct imx_spidev_s *priv)
{
uint16_t *ptr = (uint16_t*)priv->rxbuffer;
uint16_t *ptr = (uint16_t *)priv->rxbuffer;
*ptr++ = (uint16_t)spi_getreg(priv, CSPI_TXD_OFFSET);
priv->rxbuffer = (void*)ptr;
priv->rxbuffer = (void *)ptr;
}
static void spi_rxuint8(struct imx_spidev_s *priv)
{
uint8_t *ptr = (uint8_t*)priv->rxbuffer;
uint8_t *ptr = (uint8_t *)priv->rxbuffer;
*ptr++ = (uint8_t)spi_getreg(priv, CSPI_TXD_OFFSET);
priv->rxbuffer = (void*)ptr;
priv->rxbuffer = (void *)ptr;
}
/****************************************************************************
@ -507,18 +507,18 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
/* Set up to perform the transfer */
priv->txbuffer = (uint8_t*)txbuffer; /* Source buffer */
priv->rxbuffer = (uint8_t*)rxbuffer; /* Destination buffer */
priv->ntxwords = nwords; /* Number of words left to send */
priv->nrxwords = 0; /* Number of words received */
priv->nwords = nwords; /* Total number of exchanges */
priv->txbuffer = (uint8_t *)txbuffer; /* Source buffer */
priv->rxbuffer = (uint8_t *)rxbuffer; /* Destination buffer */
priv->ntxwords = nwords; /* Number of words left to send */
priv->nrxwords = 0; /* Number of words received */
priv->nwords = nwords; /* Total number of exchanges */
/* Set up the low-level data transfer function pointers */
if (priv->nbits > 8)
{
priv->txword = spi_txuint16;
priv->rxword =spi_rxuint16;
priv->rxword = spi_rxuint16;
}
else
{
@ -833,7 +833,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
case SPIDEV_MODE3: /* CPOL=1 CHPHA=1 */
modebits = CSPI_CTRL_PHA|CSPI_CTRL_POL;
modebits = CSPI_CTRL_PHA | CSPI_CTRL_POL;
break;
default:
@ -843,7 +843,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Then set the selected mode */
regval = spi_getreg(priv, CSPI_CTRL_OFFSET);
regval &= ~(CSPI_CTRL_PHA|CSPI_CTRL_POL);
regval &= ~(CSPI_CTRL_PHA | CSPI_CTRL_POL);
regval |= modebits;
spi_putreg(priv, CSPI_CTRL_OFFSET, regval);
}
@ -895,7 +895,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
{
struct imx_spidev_s *priv = (struct imx_spidev_s*)dev;
struct imx_spidev_s *priv = (struct imx_spidev_s *)dev;
uint16_t response = 0;
(void)spi_transfer(priv, &wd, &response, 1);

6
arch/arm/src/kinetis/kinetis_allocateheap.c
View File

@ -132,7 +132,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
/* Return the user-space heap settings */
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)ubase;
*heap_start = (FAR void *)ubase;
*heap_size = usize;
/* Allow user-mode access to the user heap memory */
@ -143,7 +143,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
/* Return the heap settings */
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)g_idle_topstack;
*heap_start = (FAR void *)g_idle_topstack;
*heap_size = CONFIG_RAM_END - g_idle_topstack;
#endif
}
@ -187,7 +187,7 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
* that was not dedicated to the user heap).
*/
*heap_start = (FAR void*)USERSPACE->us_bssend;
*heap_start = (FAR void *)USERSPACE->us_bssend;
*heap_size = ubase - (uintptr_t)USERSPACE->us_bssend;
}
#endif

20
arch/arm/src/kinetis/kinetis_enet.c
View File

@ -523,7 +523,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
*/
priv->dev.d_len = kinesis_swap16(priv->rxdesc[priv->rxtail].length);
priv->dev.d_buf = (uint8_t*)kinesis_swap32((uint32_t)priv->rxdesc[priv->rxtail].data);
priv->dev.d_buf = (uint8_t *)kinesis_swap32((uint32_t)priv->rxdesc[priv->rxtail].data);
/* Doing this here could cause corruption! */
@ -1060,13 +1060,13 @@ static int kinetis_txavail(struct net_driver_s *dev)
* packet.
*/
if (!kinetics_txringfull(priv))
{
/* No, there is space for another transfer. Poll uIP for new
* XMIT data.
*/
if (!kinetics_txringfull(priv))
{
/* No, there is space for another transfer. Poll uIP for new
* XMIT data.
*/
(void)devif_poll(&priv->dev, kinetis_txpoll);
(void)devif_poll(&priv->dev, kinetis_txpoll);
}
}
@ -1417,7 +1417,7 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
{
priv->txdesc[i].status1 = 0;
priv->txdesc[i].length = 0;
priv->txdesc[i].data = (uint8_t*)kinesis_swap32((uint32_t)addr);
priv->txdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr);
#ifdef CONFIG_ENET_ENHANCEDBD
priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS;
#endif
@ -1430,7 +1430,7 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
{
priv->rxdesc[i].status1 = RXDESC_E;
priv->rxdesc[i].length = 0;
priv->rxdesc[i].data = (uint8_t*)kinesis_swap32((uint32_t)addr);
priv->rxdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr);
#ifdef CONFIG_ENET_ENHANCEDBD
priv->rxdesc[i].bdu = 0;
priv->rxdesc[i].status2 = RXDESC_INT;
@ -1619,7 +1619,7 @@ int kinetis_netinitialize(int intf)
priv->dev.d_addmac = kinetis_addmac; /* Add multicast MAC address */
priv->dev.d_rmmac = kinetis_rmmac; /* Remove multicast MAC address */
#endif
priv->dev.d_private = (void*)g_enet; /* Used to recover private state from dev */
priv->dev.d_private = (void *)g_enet; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */

6
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -59,9 +59,9 @@
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
(NVIC_SYSH_PRIORITY_DEFAULT << 24 |\
NVIC_SYSH_PRIORITY_DEFAULT << 16 |\
NVIC_SYSH_PRIORITY_DEFAULT << 8 |\
(NVIC_SYSH_PRIORITY_DEFAULT << 24 | \
NVIC_SYSH_PRIORITY_DEFAULT << 16 | \
NVIC_SYSH_PRIORITY_DEFAULT << 8 | \
NVIC_SYSH_PRIORITY_DEFAULT)
/* Given the address of a NVIC ENABLE register, this is the offset to

6
arch/arm/src/kinetis/kinetis_lowputc.c
View File

@ -284,7 +284,7 @@ void kinetis_uartreset(uintptr_t uart_base)
/* Just disable the transmitter and receiver */
regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
regval &= ~(UART_C2_RE|UART_C2_TE);
regval &= ~(UART_C2_RE | UART_C2_TE);
putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
}
#endif
@ -313,7 +313,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
/* Disable the transmitter and receiver throughout the reconfiguration */
regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
regval &= ~(UART_C2_RE|UART_C2_TE);
regval &= ~(UART_C2_RE | UART_C2_TE);
putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
/* Configure number of bits, stop bits and parity */
@ -324,7 +324,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
if (parity == 1)
{
regval |= (UART_C1_PE|UART_C1_PT); /* Enable + odd parity type */
regval |= (UART_C1_PE | UART_C1_PT); /* Enable + odd parity type */
}
/* Check for even parity */

76
arch/arm/src/kinetis/kinetis_sdhc.c
View File

@ -903,7 +903,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
{
/* Transfer any trailing fractional word */
uint8_t *ptr = (uint8_t*)priv->buffer;
uint8_t *ptr = (uint8_t *)priv->buffer;
int i;
for (i = 0; i < priv->remaining; i++)
@ -1134,10 +1134,10 @@ static int kinetis_interrupt(int irq, void *context)
kinetis_receive(priv);
}
/* Otherwise, Is the TX buffer write ready? If so we must
* be processing a non-DMA send transaction. NOTE: We can't be
* processing both!
*/
/* Otherwise, Is the TX buffer write ready? If so we must
* be processing a non-DMA send transaction. NOTE: We can't be
* processing both!
*/
else if ((pending & SDHC_INT_BWR) != 0)
{
@ -1163,7 +1163,7 @@ static int kinetis_interrupt(int irq, void *context)
/* Terminate the transfer with an error */
flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE|SDIOWAIT_ERROR);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
/* Handle data timeout error */
@ -1173,7 +1173,7 @@ static int kinetis_interrupt(int irq, void *context)
/* Terminate the transfer with an error */
flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
}
@ -1188,7 +1188,7 @@ static int kinetis_interrupt(int irq, void *context)
{
/* Yes.. Is their a thread waiting for response done? */
if ((priv->waitevents & (SDIOWAIT_CMDDONE|SDIOWAIT_RESPONSEDONE)) != 0)
if ((priv->waitevents & (SDIOWAIT_CMDDONE | SDIOWAIT_RESPONSEDONE)) != 0)
{
/* Yes.. mask further interrupts and wake the thread up */
@ -1463,7 +1463,7 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
prescaler = 128;
}
else /* if (frequency >= (BOARD_CORECLK_FREQ / 256) &&
frequency <= (BOARD_CORECLK_FREQ / 256 / 16)) */
* frequency <= (BOARD_CORECLK_FREQ / 256 / 16)) */
{
sdclkfs = SDHC_SYSCTL_SDCLKFS_DIV256;
prescaler = 256;
@ -1499,9 +1499,9 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
*/
regval = getreg32(KINETIS_SDHC_SYSCTL);
regval &= ~(SDHC_SYSCTL_SDCLKFS_MASK|SDHC_SYSCTL_DVS_MASK);
regval &= ~(SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
regval |= (sdclkfs | SDHC_SYSCTL_DVS_DIV(divisor));
regval |= (SDHC_SYSCTL_SDCLKEN|SDHC_SYSCTL_PEREN|SDHC_SYSCTL_HCKEN|
regval |= (SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
@ -1549,8 +1549,8 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
* enables as well.
*/
regval &= ~(SDHC_SYSCTL_IPGEN|SDHC_SYSCTL_HCKEN|SDHC_SYSCTL_PEREN|
SDHC_SYSCTL_SDCLKFS_MASK|SDHC_SYSCTL_DVS_MASK);
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN |
SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
@ -1599,7 +1599,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
* in.
*/
regval &= ~(SDHC_SYSCTL_SDCLKFS_MASK|SDHC_SYSCTL_DVS_MASK);
regval &= ~(SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
/* Select the new prescaler and divisor values based on the requested mode
* and the settings from the board.h file.
@ -1617,37 +1617,37 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
* enables as well.
*/
regval &= ~(SDHC_SYSCTL_IPGEN|SDHC_SYSCTL_HCKEN|SDHC_SYSCTL_PEREN);
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
}
case CLOCK_IDMODE : /* Initial ID mode clocking (<400KHz) */
regval |= (BOARD_SDHC_IDMODE_PRESCALER|BOARD_SDHC_IDMODE_DIVISOR|
SDHC_SYSCTL_SDCLKEN|SDHC_SYSCTL_PEREN|SDHC_SYSCTL_HCKEN|
regval |= (BOARD_SDHC_IDMODE_PRESCALER | BOARD_SDHC_IDMODE_DIVISOR |
SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
break;
case CLOCK_MMC_TRANSFER : /* MMC normal operation clocking */
regval |= (BOARD_SDHC_MMCMODE_PRESCALER|BOARD_SDHC_MMCMODE_DIVISOR|
SDHC_SYSCTL_SDCLKEN|SDHC_SYSCTL_PEREN|SDHC_SYSCTL_HCKEN|
regval |= (BOARD_SDHC_MMCMODE_PRESCALER | BOARD_SDHC_MMCMODE_DIVISOR |
SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
break;
case CLOCK_SD_TRANSFER_1BIT : /* SD normal operation clocking (narrow
* 1-bit mode) */
#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
regval |= (BOARD_SDHC_SD1MODE_PRESCALER|BOARD_SDHC_IDMODE_DIVISOR|
SDHC_SYSCTL_SDCLKEN|SDHC_SYSCTL_PEREN|SDHC_SYSCTL_HCKEN|
regval |= (BOARD_SDHC_SD1MODE_PRESCALER | BOARD_SDHC_IDMODE_DIVISOR |
SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
break;
#endif
case CLOCK_SD_TRANSFER_4BIT : /* SD normal operation clocking (wide
* 4-bit mode) */
regval |= (BOARD_SDHC_SD4MODE_PRESCALER|BOARD_SDHC_SD4MODE_DIVISOR|
SDHC_SYSCTL_SDCLKEN|SDHC_SYSCTL_PEREN|SDHC_SYSCTL_HCKEN|
regval |= (BOARD_SDHC_SD4MODE_PRESCALER | BOARD_SDHC_SD4MODE_DIVISOR |
SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
break;
}
@ -1792,17 +1792,19 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
break;
case MMCSD_R1B_RESPONSE: /* Response length 48, check busy & cmdindex */
regval |= (SDHC_XFERTYP_RSPTYP_LEN48BSY|SDHC_XFERTYP_CICEN|SDHC_XFERTYP_CCCEN);
regval |= (SDHC_XFERTYP_RSPTYP_LEN48BSY | SDHC_XFERTYP_CICEN |
SDHC_XFERTYP_CCCEN);
break;
case MMCSD_R1_RESPONSE: /* Response length 48, check cmdindex */
case MMCSD_R5_RESPONSE:
case MMCSD_R6_RESPONSE:
regval |= (SDHC_XFERTYP_RSPTYP_LEN48|SDHC_XFERTYP_CICEN|SDHC_XFERTYP_CCCEN);
regval |= (SDHC_XFERTYP_RSPTYP_LEN48 | SDHC_XFERTYP_CICEN |
SDHC_XFERTYP_CCCEN);
break;
case MMCSD_R2_RESPONSE: /* Response length 136, check CRC */
regval |= (SDHC_XFERTYP_RSPTYP_LEN136|SDHC_XFERTYP_CCCEN);
regval |= (SDHC_XFERTYP_RSPTYP_LEN136 | SDHC_XFERTYP_CCCEN);
break;
case MMCSD_R3_RESPONSE: /* Response length 48 */
@ -1894,7 +1896,7 @@ static int kinetis_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
/* Save the destination buffer information for use by the interrupt handler */
priv->buffer = (uint32_t*)buffer;
priv->buffer = (uint32_t *)buffer;
priv->remaining = nbytes;
/* Then set up the SDIO data path */
@ -1945,7 +1947,7 @@ static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buff
/* Save the source buffer information for use by the interrupt handler */
priv->buffer = (uint32_t*)buffer;
priv->buffer = (uint32_t *)buffer;
priv->remaining = nbytes;
/* Then set up the SDIO data path */
@ -1979,7 +1981,7 @@ static int kinetis_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buff
static int kinetis_cancel(FAR struct sdio_dev_s *dev)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
#ifdef CONFIG_SDIO_DMA
uint32_t regval;
#endif
@ -2329,7 +2331,7 @@ static int kinetis_recvnotimpl(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_
static void kinetis_waitenable(FAR struct sdio_dev_s *dev,
sdio_eventset_t eventset)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
uint32_t waitints;
DEBUGASSERT(priv != NULL);
@ -2343,7 +2345,7 @@ static void kinetis_waitenable(FAR struct sdio_dev_s *dev,
*/
waitints = 0;
if ((eventset & (SDIOWAIT_CMDDONE|SDIOWAIT_RESPONSEDONE)) != 0)
if ((eventset & (SDIOWAIT_CMDDONE | SDIOWAIT_RESPONSEDONE)) != 0)
{
waitints |= SDHC_RESPDONE_INTS;
}
@ -2382,7 +2384,7 @@ static void kinetis_waitenable(FAR struct sdio_dev_s *dev,
static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
uint32_t timeout)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
sdio_eventset_t wkupevent = 0;
int ret;
@ -2482,7 +2484,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
sdio_eventset_t eventset)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
fvdbg("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
@ -2516,7 +2518,7 @@ static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
static int kinetis_registercallback(FAR struct sdio_dev_s *dev,
worker_t callback, void *arg)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
/* Disable callbacks and register this callback and is argument */
@ -2589,7 +2591,7 @@ static int kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
/* Save the destination buffer information for use by the interrupt handler */
priv->buffer = (uint32_t*)buffer;
priv->buffer = (uint32_t *)buffer;
priv->remaining = buflen;
/* Then set up the SDIO data path */
@ -2647,7 +2649,7 @@ static int kinetis_dmasendsetup(FAR struct sdio_dev_s *dev,
/* Save the source buffer information for use by the interrupt handler */
priv->buffer = (uint32_t*)buffer;
priv->buffer = (uint32_t *)buffer;
priv->remaining = buflen;
/* Then set up the SDIO data path */
@ -2687,7 +2689,7 @@ static int kinetis_dmasendsetup(FAR struct sdio_dev_s *dev,
static void kinetis_callback(void *arg)
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s*)arg;
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)arg;
/* Is a callback registered? */

30
arch/arm/src/kinetis/kinetis_serial.c
View File

@ -610,7 +610,7 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Configure the UART as an RS-232 UART */
@ -645,7 +645,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Disable interrupts */
@ -673,7 +673,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ(s). The interrupts are (probably) still
@ -711,7 +711,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Disable interrupts */
@ -790,7 +790,7 @@ static int up_interrupte(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Handle error interrupts. This interrupt may be caused by:
@ -879,7 +879,7 @@ static int up_interrupts(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Loop until there are no characters to be transferred or,
@ -978,7 +978,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
switch (cmd)
{
@ -1008,7 +1008,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint8_t s1;
/* Get error status information:
@ -1047,7 +1047,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -1086,7 +1086,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#ifdef CONFIG_KINETIS_UARTFIFOS
unsigned int count;
@ -1116,7 +1116,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, KINETIS_UART_D_OFFSET, (uint8_t)ch);
}
@ -1130,7 +1130,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -1170,7 +1170,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#ifdef CONFIG_KINETIS_UARTFIFOS
/* Read the number of bytes currently in the FIFO and compare that to the
@ -1202,7 +1202,7 @@ static bool up_txready(struct uart_dev_s *dev)
#ifdef CONFIG_KINETIS_UARTFIFOS
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Return true if the transmit buffer/fifo is "empty." */
@ -1305,7 +1305,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
#ifdef HAVE_SERIAL_CONSOLE
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint8_t ie;
up_disableuartint(priv, &ie);

10
arch/arm/src/kinetis/kinetis_userspace.c
View File

@ -87,8 +87,8 @@ void kinetis_userspace(void)
DEBUGASSERT(USERSPACE->us_bssstart != 0 && USERSPACE->us_bssend != 0 &&
USERSPACE->us_bssstart <= USERSPACE->us_bssend);
dest = (uint8_t*)USERSPACE->us_bssstart;
end = (uint8_t*)USERSPACE->us_bssend;
dest = (uint8_t *)USERSPACE->us_bssstart;
end = (uint8_t *)USERSPACE->us_bssend;
while (dest != end)
{
@ -101,9 +101,9 @@ void kinetis_userspace(void)
USERSPACE->us_datastart != 0 && USERSPACE->us_dataend != 0 &&
USERSPACE->us_datastart <= USERSPACE->us_dataend);
src = (uint8_t*)USERSPACE->us_datasource;
dest = (uint8_t*)USERSPACE->us_datastart;
end = (uint8_t*)USERSPACE->us_dataend;
src = (uint8_t *)USERSPACE->us_datasource;
dest = (uint8_t *)USERSPACE->us_datastart;
end = (uint8_t *)USERSPACE->us_dataend;
while (dest != end)
{

2
arch/arm/src/kl/kl_irq.c
View File

@ -59,7 +59,7 @@
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
(NVIC_SYSH_PRIORITY_DEFAULT << 24 | NVIC_SYSH_PRIORITY_DEFAULT << 16 |\
(NVIC_SYSH_PRIORITY_DEFAULT << 24 | NVIC_SYSH_PRIORITY_DEFAULT << 16 | \
NVIC_SYSH_PRIORITY_DEFAULT << 8 | NVIC_SYSH_PRIORITY_DEFAULT)
/****************************************************************************

2
arch/arm/src/kl/kl_lowputc.c
View File

@ -262,7 +262,7 @@ void kl_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
/* Disable the transmitter and receiver throughout the reconfiguration */
regval = getreg8(uart_base+KL_UART_C2_OFFSET);
regval &= ~(UART_C2_RE|UART_C2_TE);
regval &= ~(UART_C2_RE | UART_C2_TE);
putreg8(regval, uart_base+KL_UART_C2_OFFSET);
/* Configure number of bits, stop bits and parity */

26
arch/arm/src/kl/kl_serial.c
View File

@ -396,7 +396,7 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Configure the UART as an RS-232 UART */
@ -421,7 +421,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Disable interrupts */
@ -449,7 +449,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ(s). The interrupts are (probably) still
@ -477,7 +477,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Disable interrupts */
@ -533,7 +533,7 @@ static int up_interrupts(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
/* Loop until there are no characters to be transferred or,
@ -625,7 +625,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
switch (cmd)
{
@ -655,7 +655,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint8_t s1;
/* Get error status information:
@ -694,7 +694,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -728,7 +728,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Return true if the receive data register is full (RDRF). NOTE: If
* FIFOS are enabled, this does not mean that the FIFO is full,
@ -750,7 +750,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, KL_UART_D_OFFSET, (uint8_t)ch);
}
@ -764,7 +764,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -804,7 +804,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
/* Return true if the transmit data register is "empty." NOTE: If
* FIFOS are enabled, this does not mean that the FIFO is empty,
@ -911,7 +911,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
#ifdef HAVE_SERIAL_CONSOLE
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint8_t ie;
up_disableuartint(priv, &ie);

4
arch/arm/src/kl/kl_spi.c
View File

@ -530,8 +530,8 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords)
{
FAR struct kl_spidev_s *priv = (FAR struct kl_spidev_s *)dev;
FAR uint8_t *rxptr = (FAR uint8_t*)rxbuffer;
FAR uint8_t *txptr = (FAR uint8_t*)txbuffer;
FAR uint8_t *rxptr = (FAR uint8_t *)rxbuffer;
FAR uint8_t *txptr = (FAR uint8_t *)txbuffer;
uint8_t data;
spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);

10
arch/arm/src/kl/kl_userspace.c
View File

@ -86,8 +86,8 @@ void kl_userspace(void)
DEBUGASSERT(USERSPACE->us_bssstart != 0 && USERSPACE->us_bssend != 0 &&
USERSPACE->us_bssstart <= USERSPACE->us_bssend);
dest = (uint8_t*)USERSPACE->us_bssstart;
end = (uint8_t*)USERSPACE->us_bssend;
dest = (uint8_t *)USERSPACE->us_bssstart;
end = (uint8_t *)USERSPACE->us_bssend;
while (dest != end)
{
@ -100,9 +100,9 @@ void kl_userspace(void)
USERSPACE->us_datastart != 0 && USERSPACE->us_dataend != 0 &&
USERSPACE->us_datastart <= USERSPACE->us_dataend);
src = (uint8_t*)USERSPACE->us_datasource;
dest = (uint8_t*)USERSPACE->us_datastart;
end = (uint8_t*)USERSPACE->us_dataend;
src = (uint8_t *)USERSPACE->us_datasource;
dest = (uint8_t *)USERSPACE->us_datastart;
end = (uint8_t *)USERSPACE->us_dataend;
while (dest != end)
{