S32K FlexCAN don't use a blocking wait in tx avail

This commit is contained in:
Peter van der Perk 2022-12-14 13:09:27 +01:00 committed by David Sidrane
parent 893b1477ea
commit d172d8cd0f
2 changed files with 2 additions and 52 deletions

View File

@ -502,9 +502,6 @@ static void s32k1xx_setfreeze(uint32_t base, uint32_t freeze);
static uint32_t s32k1xx_waitmcr_change(uint32_t base,
uint32_t mask,
uint32_t target_state);
static uint32_t s32k1xx_waitesr2_change(uint32_t base,
uint32_t mask,
uint32_t target_state);
/* Interrupt handling */
@ -1216,26 +1213,6 @@ static void s32k1xx_setenable(uint32_t base, uint32_t enable)
s32k1xx_waitmcr_change(base, CAN_MCR_LPMACK, 1);
}
static uint32_t s32k1xx_waitesr2_change(uint32_t base, uint32_t mask,
uint32_t target_state)
{
const uint32_t timeout = 1000;
uint32_t wait_ack;
for (wait_ack = 0; wait_ack < timeout; wait_ack++)
{
uint32_t state = (getreg32(base + S32K1XX_CAN_ESR2_OFFSET) & mask);
if (state == target_state)
{
return true;
}
up_udelay(10);
}
return false;
}
static void s32k1xx_setfreeze(uint32_t base, uint32_t freeze)
{
uint32_t regval;
@ -1395,9 +1372,7 @@ static void s32k1xx_txavail_work(void *arg)
* packet.
*/
if (s32k1xx_waitesr2_change(priv->base,
(CAN_ESR2_IMB | CAN_ESR2_VPS),
(CAN_ESR2_IMB | CAN_ESR2_VPS)))
if (!s32k1xx_txringfull(priv))
{
/* No, there is space for another transfer. Poll the network for
* new XMIT data.

View File

@ -670,9 +670,6 @@ static void s32k3xx_setfreeze(uint32_t base, uint32_t freeze);
static uint32_t s32k3xx_waitmcr_change(uint32_t base,
uint32_t mask,
uint32_t target_state);
static uint32_t s32k3xx_waitesr2_change(uint32_t base,
uint32_t mask,
uint32_t target_state);
/* Interrupt handling */
@ -1379,26 +1376,6 @@ static void s32k3xx_setenable(uint32_t base, uint32_t enable)
s32k3xx_waitmcr_change(base, CAN_MCR_LPMACK, 1);
}
static uint32_t s32k3xx_waitesr2_change(uint32_t base, uint32_t mask,
uint32_t target_state)
{
const uint32_t timeout = 1000;
uint32_t wait_ack;
for (wait_ack = 0; wait_ack < timeout; wait_ack++)
{
uint32_t state = (getreg32(base + S32K3XX_CAN_ESR2_OFFSET) & mask);
if (state == target_state)
{
return true;
}
up_udelay(10);
}
return false;
}
static void s32k3xx_setfreeze(uint32_t base, uint32_t freeze)
{
uint32_t regval;
@ -1590,9 +1567,7 @@ static void s32k3xx_txavail_work(void *arg)
* packet.
*/
if (s32k3xx_waitesr2_change(priv->base,
(CAN_ESR2_IMB | CAN_ESR2_VPS),
(CAN_ESR2_IMB | CAN_ESR2_VPS)))
if (!s32k3xx_txringfull(priv))
{
/* No, there is space for another transfer. Poll the network for
* new XMIT data.