diff --git a/arch/arm/src/armv7-a/cp15_clean_dcache.S b/arch/arm/src/armv7-a/cp15_clean_dcache.S
index fdc7513ede..6a244dac9e 100755
--- a/arch/arm/src/armv7-a/cp15_clean_dcache.S
+++ b/arch/arm/src/armv7-a/cp15_clean_dcache.S
@@ -99,7 +99,7 @@ cp15_clean_dcache:
 	mov		r2, r2, lsl r3			/* Get the cache line size in bytes */
 
 	sub		r3, r2, #1				/* R3=Cache line size mask */
-	bic		r12, r0, r3				/* R12=aligned start address */
+	bic		r0, r0, r3				/* R0=aligned start address */
 
 	/* Loop, cleaning each cache line by writing its contents to memory */
 
diff --git a/arch/arm/src/armv7-a/cp15_flush_dcache.S b/arch/arm/src/armv7-a/cp15_flush_dcache.S
index 2e21db5981..ba5b753bad 100755
--- a/arch/arm/src/armv7-a/cp15_flush_dcache.S
+++ b/arch/arm/src/armv7-a/cp15_flush_dcache.S
@@ -99,7 +99,7 @@ cp15_flush_dcache:
 	mov		r2, r2, lsl r3			/* Get the cache line size in bytes */
 
 	sub		r3, r2, #1				/* R3=Cache line size mask */
-	bic		r12, r0, r3				/* R12=aligned start address */
+	bic		r0, r0, r3				/* R0=aligned start address */
 
 	/* Loop, cleaning and invaliding each D cache line in the address range */