arch/espressif: Add MCUboot support for ESP32-C3

Add MCUboot support for ESP32-C3 when using the Espressif HAL
This commit is contained in:
Lucas Saavedra Vaz 2023-08-04 11:32:47 -03:00 committed by Xiang Xiao
parent 0b721ac21c
commit d1b5558c8b
12 changed files with 989 additions and 36 deletions

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@ -1,4 +1,4 @@
/esp-wireless-drivers-3rdparty /bootloader
/esp-nuttx-bootloader /esp-nuttx-bootloader
/*.zip /*.zip
/esp-hal-3rdparty /esp-hal-3rdparty

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@ -18,18 +18,108 @@
# #
############################################################################ ############################################################################
BOOTLOADER_VERSION = latest
BOOTLOADER_URL = https://github.com/espressif/esp-nuttx-bootloader/releases/download/$(BOOTLOADER_VERSION)
# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration # Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES)) CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
TOOLSDIR = $(TOPDIR)/tools/espressif
CHIPDIR = $(TOPDIR)/arch/risc-v/src/chip
HALDIR = $(CHIPDIR)/esp-hal-3rdparty
BOOTLOADER_SRCDIR = $(CHIPDIR)/bootloader
BOOTLOADER_OUTDIR = $(BOOTLOADER_SRCDIR)/out
BOOTLOADER_CONFIG = $(BOOTLOADER_SRCDIR)/bootloader.conf
# MCUboot
MCUBOOT_SRCDIR = $(BOOTLOADER_SRCDIR)/mcuboot
MCUBOOT_ESPDIR = $(MCUBOOT_SRCDIR)/boot/espressif
MCUBOOT_URL = https://github.com/mcu-tools/mcuboot
# IDFboot
BLBIN_VERSION = latest
BLBIN_URL = https://github.com/espressif/esp-nuttx-bootloader/releases/download/$(BLBIN_VERSION)
# Helpers for creating the configuration file
cfg_en = echo "$(1)=$(if $(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),1,y)";
cfg_dis = echo "$(1)=$(if $(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),0,n)";
cfg_val = echo "$(1)=$(2)";
$(BOOTLOADER_SRCDIR):
$(Q) mkdir -p $(BOOTLOADER_SRCDIR) &>/dev/null
$(BOOTLOADER_CONFIG): $(TOPDIR)/.config $(BOOTLOADER_SRCDIR)
$(Q) echo "Creating Bootloader configuration"
$(Q) { \
$(if $(CONFIG_ESPRESSIF_FLASH_2M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHSIZE_2MB)) \
$(if $(CONFIG_ESPRESSIF_FLASH_4M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHSIZE_4MB)) \
$(if $(CONFIG_ESPRESSIF_FLASH_MODE_DIO),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHMODE_DIO)) \
$(if $(CONFIG_ESPRESSIF_FLASH_MODE_DOUT),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHMODE_DOUT)) \
$(if $(CONFIG_ESPRESSIF_FLASH_MODE_QIO),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHMODE_QIO)) \
$(if $(CONFIG_ESPRESSIF_FLASH_MODE_QOUT),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHMODE_QOUT)) \
$(if $(CONFIG_ESPRESSIF_FLASH_FREQ_80M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHFREQ_80M)) \
$(if $(CONFIG_ESPRESSIF_FLASH_FREQ_48M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHFREQ_48M)) \
$(if $(CONFIG_ESPRESSIF_FLASH_FREQ_40M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHFREQ_40M)) \
$(if $(CONFIG_ESPRESSIF_FLASH_FREQ_26M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHFREQ_26M)) \
$(if $(CONFIG_ESPRESSIF_FLASH_FREQ_20M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHFREQ_20M)) \
} > $(BOOTLOADER_CONFIG)
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
$(Q) { \
$(call cfg_val,CONFIG_ESP_BOOTLOADER_OFFSET,0x0000) \
$(call cfg_val,CONFIG_ESP_BOOTLOADER_SIZE,0xF000) \
$(call cfg_val,CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS,$(CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET)) \
$(call cfg_val,CONFIG_ESP_APPLICATION_SIZE,$(CONFIG_ESPRESSIF_OTA_SLOT_SIZE)) \
$(call cfg_val,CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS,$(CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET)) \
$(call cfg_en,CONFIG_ESP_MCUBOOT_WDT_ENABLE) \
$(call cfg_val,CONFIG_ESP_SCRATCH_OFFSET,$(CONFIG_ESPRESSIF_OTA_SCRATCH_OFFSET)) \
$(call cfg_val,CONFIG_ESP_SCRATCH_SIZE,$(CONFIG_ESPRESSIF_OTA_SCRATCH_SIZE)) \
$(call cfg_en,CONFIG_ESP_CONSOLE_UART) \
$(if $(CONFIG_UART0_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,0)) \
$(if $(CONFIG_UART1_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,1)) \
} >> $(BOOTLOADER_CONFIG)
else
$(Q) { \
$(call cfg_en,CONFIG_PARTITION_TABLE_CUSTOM) \
$(call cfg_val,CONFIG_PARTITION_TABLE_CUSTOM_FILENAME,\"partitions.csv\") \
$(call cfg_val,CONFIG_PARTITION_TABLE_OFFSET,$(CONFIG_ESPRESSIF_PARTITION_TABLE_OFFSET)) \
} >> $(BOOTLOADER_CONFIG)
endif
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
BOOTLOADER_BIN = $(TOPDIR)/mcuboot-$(CHIP_SERIES).bin
$(MCUBOOT_SRCDIR): $(BOOTLOADER_SRCDIR)
$(Q) echo "Cloning MCUboot"
$(Q) git clone --quiet $(MCUBOOT_URL) $(MCUBOOT_SRCDIR)
$(Q) git -C "$(MCUBOOT_SRCDIR)" checkout --quiet $(CONFIG_ESPRESSIF_MCUBOOT_VERSION)
$(Q) git -C "$(MCUBOOT_SRCDIR)" submodule --quiet update --init --recursive ext/mbedtls
$(BOOTLOADER_BIN): chip/$(ESP_HAL_3RDPARTY_REPO) $(MCUBOOT_SRCDIR) $(BOOTLOADER_CONFIG)
$(Q) echo "Building MCUboot"
$(Q) $(TOOLSDIR)/build_mcuboot.sh \
-c $(CHIP_SERIES) \
-f $(BOOTLOADER_CONFIG) \
-p $(BOOTLOADER_SRCDIR) \
-e $(HALDIR)
$(call COPYFILE, $(BOOTLOADER_OUTDIR)/mcuboot-$(CHIP_SERIES).bin, $(TOPDIR))
bootloader: $(BOOTLOADER_CONFIG) $(BOOTLOADER_BIN)
clean_bootloader:
$(call DELDIR,$(BOOTLOADER_SRCDIR))
$(call DELFILE,$(BOOTLOADER_BIN))
else
bootloader: bootloader:
$(Q) echo "Downloading Bootloader binaries" $(Q) echo "Downloading Bootloader binaries"
$(call DOWNLOAD,$(BOOTLOADER_URL),bootloader-$(CHIP_SERIES).bin,$(TOPDIR)/bootloader-$(CHIP_SERIES).bin) $(call DOWNLOAD,$(BLBIN_URL),bootloader-$(CHIP_SERIES).bin,$(TOPDIR)/bootloader-$(CHIP_SERIES).bin)
$(call DOWNLOAD,$(BOOTLOADER_URL),partition-table-$(CHIP_SERIES).bin,$(TOPDIR)/partition-table-$(CHIP_SERIES).bin) $(call DOWNLOAD,$(BLBIN_URL),partition-table-$(CHIP_SERIES).bin,$(TOPDIR)/partition-table-$(CHIP_SERIES).bin)
clean_bootloader: clean_bootloader:
$(call DELFILE,$(TOPDIR)/bootloader-$(CHIP_SERIES).bin) $(call DELFILE,$(TOPDIR)/bootloader-$(CHIP_SERIES).bin)
$(call DELFILE,$(TOPDIR)/partition-table-$(CHIP_SERIES).bin) $(call DELFILE,$(TOPDIR)/partition-table-$(CHIP_SERIES).bin)
endif

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@ -211,6 +211,100 @@ config ESPRESSIF_SOC_RTC_MEM_SUPPORTED
bool bool
default n default n
menu "Bootloader and Image Configuration"
config ESPRESSIF_BOOTLOADER_MCUBOOT
bool "Enable Native MCUboot"
select ESPRESSIF_HAVE_OTA_PARTITION
depends on ESPRESSIF_ESP32C3
default n
---help---
Enables the Espressif port of MCUboot bootloader.
config ESPRESSIF_MCUBOOT_VERSION
string "MCUboot version"
depends on ESPRESSIF_BOOTLOADER_MCUBOOT
default "aa7e2b1faae623dbe01bbc6094e71ab44ec9d80a"
choice
prompt "Target slot for image flashing"
default ESPRESSIF_ESPTOOL_TARGET_PRIMARY
depends on ESPRESSIF_HAVE_OTA_PARTITION
---help---
Slot to which ESPTOOL will flash the generated binary image.
config ESPRESSIF_ESPTOOL_TARGET_PRIMARY
bool "Application image primary slot"
---help---
This assumes that the generated image is already pre-validated.
This is the recommended option for the initial stages of the
application firmware image development.
config ESPRESSIF_ESPTOOL_TARGET_SECONDARY
bool "Application image secondary slot"
---help---
The application needs to confirm the generated image as valid,
otherwise the bootloader may consider it invalid and perform the
rollback of the update after a reset.
This is the choice most suitable for the development and verification
of a secure firmware update workflow.
endchoice
config ESPRESSIF_APP_MCUBOOT_HEADER_SIZE
int "Application image header size (in bytes)"
default 32
depends on ESPRESSIF_BOOTLOADER_MCUBOOT
config ESPRESSIF_PARTITION_TABLE_OFFSET
hex "Partition Table offset"
default 0x8000
depends on !ESPRESSIF_BOOTLOADER_MCUBOOT
config ESPRESSIF_HAVE_OTA_PARTITION
bool
default n
if ESPRESSIF_HAVE_OTA_PARTITION
comment "Application Image OTA Update support"
config ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET
hex "Application image primary slot offset"
default 0x10000
config ESPRESSIF_OTA_PRIMARY_SLOT_DEVPATH
string "Application image primary slot device path"
default "/dev/ota0"
config ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET
hex "Application image secondary slot offset"
default 0x110000
config ESPRESSIF_OTA_SECONDARY_SLOT_DEVPATH
string "Application image secondary slot device path"
default "/dev/ota1"
config ESPRESSIF_OTA_SLOT_SIZE
hex "Application image slot size (in bytes)"
default 0x100000
config ESPRESSIF_OTA_SCRATCH_OFFSET
hex "Scratch partition offset"
default 0x210000
config ESPRESSIF_OTA_SCRATCH_SIZE
hex "Scratch partition size"
default 0x40000
config ESPRESSIF_OTA_SCRATCH_DEVPATH
string "Scratch partition device path"
default "/dev/otascratch"
endif # ESPRESSIF_HAVE_OTA_PARTITION
endmenu # Bootloader and Image Configuration
menu "Peripheral Support" menu "Peripheral Support"
config ESPRESSIF_UART config ESPRESSIF_UART
@ -551,14 +645,6 @@ config ESPRESSIF_HR_TIMER_TASK_STACK_SIZE
endmenu # High Resolution Timer endmenu # High Resolution Timer
menu "Application Image Configuration"
config ESPRESSIF_PARTITION_TABLE_OFFSET
hex "Partition Table offset"
default 0x8000
endmenu # Application Image Configuration
menu "Brownout Detector Configuration" menu "Brownout Detector Configuration"
depends on ESPRESSIF_BROWNOUT_DET depends on ESPRESSIF_BROWNOUT_DET

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@ -18,7 +18,6 @@
# #
############################################################################ ############################################################################
include chip/Bootloader.mk
include common/Make.defs include common/Make.defs
# The start-up, "head", file. May be either a .S or a .c file. # The start-up, "head", file. May be either a .S or a .c file.
@ -115,3 +114,5 @@ distclean::
$(call DELFILE,../include/chip/gpio_sig_map.h) $(call DELFILE,../include/chip/gpio_sig_map.h)
$(call DELFILE,../include/chip/irq.h) $(call DELFILE,../include/chip/irq.h)
$(call DELDIR,chip/$(ESP_HAL_3RDPARTY_REPO)) $(call DELDIR,chip/$(ESP_HAL_3RDPARTY_REPO))
include chip/Bootloader.mk

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@ -40,6 +40,10 @@
#include "esp_cpu.h" #include "esp_cpu.h"
#include "esp_private/brownout.h" #include "esp_private/brownout.h"
#include "hal/wdt_hal.h" #include "hal/wdt_hal.h"
#include "soc/ext_mem_defs.h"
#include "soc/extmem_reg.h"
#include "soc/mmu.h"
#include "soc/reg_base.h"
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
@ -51,6 +55,75 @@
# define showprogress(c) # define showprogress(c)
#endif #endif
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
# define PRIMARY_SLOT_OFFSET CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET
# define HDR_ATTR __attribute__((section(".entry_addr"))) \
__attribute__((used))
# define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
# define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
# define MMU_BLOCK_SIZE 0x00010000 /* 64 KB */
# define MMU_FLASH_MASK (~(MMU_BLOCK_SIZE - 1))
# define CACHE_REG EXTMEM_ICACHE_CTRL1_REG
# define CACHE_MASK (EXTMEM_ICACHE_SHUT_IBUS_M | \
EXTMEM_ICACHE_SHUT_DBUS_M)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
extern uint8_t _image_irom_vma[];
extern uint8_t _image_irom_lma[];
extern uint8_t _image_irom_size[];
extern uint8_t _image_drom_vma[];
extern uint8_t _image_drom_lma[];
extern uint8_t _image_drom_size[];
#endif
/****************************************************************************
* ROM Function Prototypes
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
extern int ets_printf(const char *fmt, ...) printf_like(1, 2);
extern uint32_t cache_suspend_icache(void);
extern void cache_resume_icache(uint32_t val);
extern void cache_invalidate_icache_all(void);
#ifdef CONFIG_ESPRESSIF_ESP32C3
extern int cache_dbus_mmu_set(uint32_t ext_ram, uint32_t vaddr,
uint32_t paddr, uint32_t psize, uint32_t num,
uint32_t fixed);
extern int cache_ibus_mmu_set(uint32_t ext_ram, uint32_t vaddr,
uint32_t paddr, uint32_t psize, uint32_t num,
uint32_t fixed);
#elif defined(CONFIG_ESPRESSIF_ESP32C6)
extern bool ets_efuse_cache_encryption_enabled(void);
extern int cache_mspi_mmu_set(uint32_t sensitive, uint32_t ext_ram,
uint32_t vaddr, uint32_t paddr, uint32_t psize,
uint32_t num, uint32_t fixed);
#endif
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
IRAM_ATTR noreturn_function void __start(void);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
HDR_ATTR static void (*_entry_point)(void) = __start;
#endif
/**************************************************************************** /****************************************************************************
* Public Data * Public Data
****************************************************************************/ ****************************************************************************/
@ -61,6 +134,101 @@ uint8_t g_idlestack[CONFIG_IDLETHREAD_STACKSIZE]
aligned_data(16) locate_data(".noinit"); aligned_data(16) locate_data(".noinit");
uintptr_t g_idle_topstack = ESP_IDLESTACK_TOP; uintptr_t g_idle_topstack = ESP_IDLESTACK_TOP;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: calc_mmu_pages
*
* Description:
* Calculate the number of cache pages to map.
*
* Input Parameters:
* size - Size of data to map
* vaddr - Virtual address where data will be mapped
*
* Returned Value:
* Number of cache MMU pages required to do the mapping.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
static inline uint32_t calc_mmu_pages(uint32_t size, uint32_t vaddr)
{
return (size + (vaddr - (vaddr & MMU_FLASH_MASK)) + MMU_BLOCK_SIZE - 1) /
MMU_BLOCK_SIZE;
}
#endif
/****************************************************************************
* Name: map_rom_segments
*
* Description:
* Configure the MMU and Cache peripherals for accessing ROM code and data.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
static int map_rom_segments(void)
{
uint32_t rc = 0;
uint32_t regval;
uint32_t drom_lma_aligned;
uint32_t drom_vma_aligned;
uint32_t drom_page_count;
uint32_t irom_lma_aligned;
uint32_t irom_vma_aligned;
uint32_t irom_page_count;
size_t partition_offset = PRIMARY_SLOT_OFFSET;
uint32_t app_irom_lma = partition_offset + (uint32_t)_image_irom_lma;
uint32_t app_irom_size = (uint32_t)_image_irom_size;
uint32_t app_irom_vma = (uint32_t)_image_irom_vma;
uint32_t app_drom_lma = partition_offset + (uint32_t)_image_drom_lma;
uint32_t app_drom_size = (uint32_t)_image_drom_size;
uint32_t app_drom_vma = (uint32_t)_image_drom_vma;
uint32_t autoload = cache_suspend_icache();
cache_invalidate_icache_all();
/* Clear the MMU entries that are already set up, so the new app only has
* the mappings it creates.
*/
for (size_t i = 0; i < FLASH_MMU_TABLE_SIZE; i++)
{
FLASH_MMU_TABLE[i] = MMU_INVALID;
}
drom_lma_aligned = app_drom_lma & MMU_FLASH_MASK;
drom_vma_aligned = app_drom_vma & MMU_FLASH_MASK;
drom_page_count = calc_mmu_pages(app_drom_size, app_drom_vma);
rc = cache_dbus_mmu_set(MMU_ACCESS_FLASH, drom_vma_aligned,
drom_lma_aligned, 64, (int)drom_page_count, 0);
irom_lma_aligned = app_irom_lma & MMU_FLASH_MASK;
irom_vma_aligned = app_irom_vma & MMU_FLASH_MASK;
irom_page_count = calc_mmu_pages(app_irom_size, app_irom_vma);
rc |= cache_ibus_mmu_set(MMU_ACCESS_FLASH, irom_vma_aligned,
irom_lma_aligned, 64, (int)irom_page_count, 0);
regval = getreg32(CACHE_REG);
regval &= ~(CACHE_MASK);
putreg32(regval, CACHE_REG);
cache_resume_icache(autoload);
return (int)rc;
}
#endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@ -71,6 +239,15 @@ uintptr_t g_idle_topstack = ESP_IDLESTACK_TOP;
void __esp_start(void) void __esp_start(void)
{ {
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
if (map_rom_segments() != 0)
{
ets_printf("Failed to setup XIP, aborting\n");
while (true);
}
#endif
#ifdef CONFIG_ESPRESSIF_REGION_PROTECTION #ifdef CONFIG_ESPRESSIF_REGION_PROTECTION
/* Configure region protection */ /* Configure region protection */

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@ -18,6 +18,12 @@
* *
****************************************************************************/ ****************************************************************************/
cache_dbus_mmu_set = Cache_Dbus_MMU_Set;
cache_ibus_mmu_set = Cache_Ibus_MMU_Set;
cache_invalidate_icache_all = Cache_Invalidate_ICache_All;
cache_resume_icache = Cache_Resume_ICache;
cache_suspend_icache = Cache_Suspend_ICache;
#ifdef CONFIG_ESPRESSIF_BLE #ifdef CONFIG_ESPRESSIF_BLE
/* Lower-case aliases for BLE library symbols not compliant to nxstyle */ /* Lower-case aliases for BLE library symbols not compliant to nxstyle */

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@ -48,8 +48,33 @@
#define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_ORG) #define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_ORG)
#ifdef CONFIG_ESPRESSIF_FLASH_2M
# define FLASH_SIZE 0x200000
#elif defined (CONFIG_ESPRESSIF_FLASH_4M)
# define FLASH_SIZE 0x400000
#elif defined (CONFIG_ESPRESSIF_FLASH_8M)
# define FLASH_SIZE 0x800000
#elif defined (CONFIG_ESPRESSIF_FLASH_16M)
# define FLASH_SIZE 0x1000000
#endif
MEMORY MEMORY
{ {
#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
/* The origin values for "metadata" and "ROM" memory regions are the actual
* load addresses.
*
* NOTE: The memory region starting from 0x0 with length represented by
* CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE is reserved for the MCUboot header,
* which will be prepended to the binary file by the "imgtool" during the
* signing of firmware image.
*/
metadata (RX) : org = CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE, len = 0x20
ROM (RX) : org = ORIGIN(metadata) + LENGTH(metadata),
len = FLASH_SIZE - ORIGIN(ROM)
#endif
/* Below values assume the flash cache is on, and have the blocks this /* Below values assume the flash cache is on, and have the blocks this
* uses subtracted from the length of the various regions. The 'data access * uses subtracted from the length of the various regions. The 'data access
* port' dram/drom regions map to the same iram/irom regions but are * port' dram/drom regions map to the same iram/irom regions but are
@ -58,31 +83,53 @@ MEMORY
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
/* Flash mapped instruction data. /* Flash mapped instruction data. */
*
* The 0x20 offset is a convenience for the app binary image generation. #ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
irom0_0_seg (RX) : org = 0x42000000, len = FLASH_SIZE
#else
/* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip * Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment * has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's * header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB). * constraint that (paddr % 64KB == vaddr % 64KB).
*/ */
irom0_0_seg (RX) : org = 0x42000020, len = 0x800000 - 0x20 irom0_0_seg (RX) : org = 0x42000020, len = FLASH_SIZE - 0x20
#endif
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack. */ /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. */
dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE
/* Flash mapped constant data. /* Flash mapped constant data. */
*
* The 0x20 offset is a convenience for the app binary image generation. #ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT
/* The DROM segment origin is offset by 0x40 for mirroring the actual ROM
* image layout:
* 0x0 - 0x1F : MCUboot header
* 0x20 - 0x3F : Application image metadata section
* 0x40 onwards: ROM code and data
* This is required to meet the following constraint from the external
* flash MMU:
* VMA % 64KB == LMA % 64KB
* i.e. the lower 16 bits of both the virtual address (address seen by the
* CPU) and the load address (physical address of the external flash) must
* be equal.
*/
drom0_0_seg (R) : org = 0x3c000000 + ORIGIN(ROM),
len = FLASH_SIZE - ORIGIN(ROM)
#else
/* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip * Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment * has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's * header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB). * constraint that (paddr % 64KB == vaddr % 64KB).
*/ */
drom0_0_seg (R) : org = 0x3c000020, len = 0x800000 - 0x20 drom0_0_seg (R) : org = 0x3c000020, len = FLASH_SIZE - 0x20
#endif
/* RTC fast memory (executable). Persists over deep sleep. */ /* RTC fast memory (executable). Persists over deep sleep. */

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@ -0,0 +1,313 @@
/****************************************************************************
* boards/risc-v/espressif/common/scripts/esp32c3_mcuboot_sections.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* Default entry point: */
ENTRY(__start);
SECTIONS
{
.metadata :
{
/* Magic for load header */
LONG(0xace637d3)
/* Application entry point address */
KEEP(*(.entry_addr))
/* IRAM metadata:
* - Destination address (VMA) for IRAM region
* - Flash offset (LMA) for start of IRAM region
* - Size of IRAM region
*/
LONG(ADDR(.iram0.text))
LONG(LOADADDR(.iram0.text))
LONG(SIZEOF(.iram0.text))
/* DRAM metadata:
* - Destination address (VMA) for DRAM region
* - Flash offset (LMA) for start of DRAM region
* - Size of DRAM region
*/
LONG(ADDR(.dram0.data))
LONG(LOADADDR(.dram0.data))
LONG(SIZEOF(.dram0.data))
} >metadata
_image_drom_vma = ADDR(.flash.rodata);
_image_drom_lma = LOADADDR(.flash.rodata);
_image_drom_size = LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - _image_drom_lma;
.flash.rodata :
{
_srodata = ABSOLUTE(.);
*(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata)
*(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata.*)
*(.srodata.*)
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table .gcc_except_table.*)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
. = (. + 3) & ~ 3;
__eh_frame = ABSOLUTE(.);
KEEP(*(.eh_frame))
. = (. + 7) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
_sinit = ABSOLUTE(.);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* This table MUST be 4-byte aligned */
_erodata = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
} >drom0_0_seg AT>ROM
.iram0.text :
{
_iram_start = ABSOLUTE(.);
/* Vectors go to start of IRAM */
KEEP(*(.exception_vectors.text));
. = ALIGN(4);
*(.iram1)
*(.iram1.*)
*libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
esp_head.*(.literal .text .literal.* .text.*)
esp_start.*(.literal .text .literal.* .text.*)
*(.wifi0iram .wifi0iram.*)
*(.wifirxiram .wifirxiram.*)
*(.wifislpiram .wifislpiram.*)
*(.wifislprxiram .wifislprxiram.*)
} >iram0_0_seg AT>ROM
.dram0.dummy (NOLOAD):
{
/* This section is required to skip .iram0.text area because iram0_0_seg
* and dram0_0_seg reflect the same address space on different buses.
*/
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
} >dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
/* .bss initialized on power-up */
. = ALIGN (8);
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
KEEP (*(.bss))
*(.bss.*)
*(.share.mem)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(8);
_ebss = ABSOLUTE(.);
} >dram0_0_seg
.noinit (NOLOAD):
{
/* This section contains data that is not initialized during load,
* or during the application's initialization sequence.
*/
. = ALIGN(8);
*(.noinit)
*(.noinit.*)
. = ALIGN(8);
} >dram0_0_seg
.dram0.data :
{
/* .data initialized on power-up in ROMed configurations. */
_sdata = ABSOLUTE(.);
KEEP (*(.data))
KEEP (*(.data.*))
KEEP (*(.gnu.linkonce.d.*))
KEEP (*(.data1))
__global_pointer$ = . + 0x800;
KEEP (*(.sdata))
KEEP (*(.sdata.*))
KEEP (*(.gnu.linkonce.s.*))
KEEP (*(.sdata2))
KEEP (*(.sdata2.*))
KEEP (*(.gnu.linkonce.s2.*))
KEEP (*(.jcr))
*(.dram1 .dram1.*)
*libarch.a:esp_spiflash.*(.rodata .rodata.*)
esp_head.*(.rodata .rodata.*)
esp_start.*(.rodata .rodata.*)
_edata = ABSOLUTE(.);
. = ALIGN(4);
/* Heap starts at the end of .data */
_sheap = ABSOLUTE(.);
} >dram0_0_seg AT>ROM
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
. = ALIGN (16);
} >iram0_0_seg
.iram0.data :
{
. = ALIGN(16);
*(.iram.data)
*(.iram.data*)
} >iram0_0_seg AT>ROM
.iram0.bss (NOLOAD) :
{
. = ALIGN(16);
*(.iram.bss)
*(.iram.bss*)
. = ALIGN(16);
_iram_end = ABSOLUTE(.);
} >iram0_0_seg
_image_irom_vma = ADDR(.flash.text);
_image_irom_lma = LOADADDR(.flash.text);
_image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma;
/* The alignment of the ".flash.text" output section is forced to
* 0x0000FFFF (64KB) to ensure that it will be allocated at the beginning
* of the next available Flash block.
* This is required to meet the following constraint from the external
* flash MMU:
* VMA % 64KB == LMA % 64KB
* i.e. the lower 16 bits of both the virtual address (address seen by the
* CPU) and the load address (physical address of the external flash) must
* be equal.
*/
.flash_text_dummy (NOLOAD) : ALIGN(0x0000FFFF)
{
/* This section is required to skip .flash.rodata area because irom0_0_seg
* and drom0_0_seg reflect the same address space on different buses.
*/
. = SIZEOF(.flash.rodata);
} >irom0_0_seg
.flash.text : ALIGN(0x0000FFFF)
{
_stext = .;
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
. = ALIGN(4);
_etext = .;
} >irom0_0_seg AT>ROM
.rtc.text :
{
. = ALIGN(4);
*(.rtc.literal .rtc.text)
} >rtc_iram_seg AT>ROM
/* RTC BSS section. */
.rtc.bss (NOLOAD) :
{
*(.rtc.bss)
} >rtc_iram_seg
.rtc.data :
{
*(.rtc.data)
*(.rtc.rodata)
} >rtc_iram_seg AT>ROM
/* This section holds RTC data that should have fixed addresses.
* The data are not initialized at power-up and are retained during deep sleep.
*/
.rtc_reserved (NOLOAD):
{
. = ALIGN(4);
_rtc_reserved_start = ABSOLUTE(.);
/* New data can only be added here to ensure existing data are not moved.
Because data have adhered to the end of the segment and code is relied on it.
>> put new data here << */
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
_rtc_reserved_end = ABSOLUTE(.);
} > rtc_reserved_seg
_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
}

View File

@ -0,0 +1,47 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c3-generic"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32C3_GENERIC=y
CONFIG_ARCH_CHIP="espressif"
CONFIG_ARCH_CHIP_ESPRESSIF=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEV_ZERO=y
CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

View File

@ -31,9 +31,13 @@ CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
# pick the common linker scripts. # pick the common linker scripts.
ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld) ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld)
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld)
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_mcuboot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld)
endif
ARCHPICFLAGS = -fpic ARCHPICFLAGS = -fpic

View File

@ -58,21 +58,51 @@ else ifeq ($(CONFIG_ESPRESSIF_FLASH_FREQ_20M),y)
FLASH_FREQ := 20m FLASH_FREQ := 20m
endif endif
ifeq ($(CONFIG_ESPRESSIF_FLASH_DETECT),y)
ESPTOOL_WRITEFLASH_OPTS := -fs detect -fm dio -ff $(FLASH_FREQ)
else
ESPTOOL_WRITEFLASH_OPTS := -fs $(FLASH_SIZE) -fm dio -ff $(FLASH_FREQ)
endif
# Configure the variables according to build environment # Configure the variables according to build environment
ifdef ESPTOOL_BINDIR ifdef ESPTOOL_BINDIR
BL_OFFSET := 0x0 ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
PT_OFFSET := $(CONFIG_ESPRESSIF_PARTITION_TABLE_OFFSET) BL_OFFSET := 0x0000
BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-$(CHIP_SERIES).bin BOOTLOADER := $(ESPTOOL_BINDIR)/mcuboot-$(CHIP_SERIES).bin
PARTITION_TABLE := $(ESPTOOL_BINDIR)/partition-table-$(CHIP_SERIES).bin FLASH_BL := $(BL_OFFSET) $(BOOTLOADER)
FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) ESPTOOL_BINS := $(FLASH_BL)
FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE) else
ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) BL_OFFSET := 0x0
PT_OFFSET := $(CONFIG_ESPRESSIF_PARTITION_TABLE_OFFSET)
BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-$(CHIP_SERIES).bin
PARTITION_TABLE := $(ESPTOOL_BINDIR)/partition-table-$(CHIP_SERIES).bin
FLASH_BL := $(BL_OFFSET) $(BOOTLOADER)
FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE)
ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT)
endif
endif endif
APP_OFFSET := 0x10000 ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
APP_IMAGE := nuttx.bin ifeq ($(CONFIG_ESPRESSIF_ESPTOOL_TARGET_PRIMARY),y)
FLASH_APP := $(APP_OFFSET) $(APP_IMAGE) VERIFIED := --confirm
APP_OFFSET := $(CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET)
else ifeq ($(CONFIG_ESPRESSIF_ESPTOOL_TARGET_SECONDARY),y)
VERIFIED :=
APP_OFFSET := $(CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET)
endif
APP_IMAGE := nuttx.bin
FLASH_APP := $(APP_OFFSET) $(APP_IMAGE)
IMGTOOL_ALIGN_ARGS := --align 4
IMGTOOL_SIGN_ARGS := --pad $(VERIFIED) $(IMGTOOL_ALIGN_ARGS) -v 0 -s auto \
-H $(CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE) --pad-header \
-S $(CONFIG_ESPRESSIF_OTA_SLOT_SIZE)
else
APP_OFFSET := 0x10000
APP_IMAGE := nuttx.bin
FLASH_APP := $(APP_OFFSET) $(APP_IMAGE)
endif
ESPTOOL_BINS += $(FLASH_APP) ESPTOOL_BINS += $(FLASH_APP)
@ -99,6 +129,21 @@ endef
# MKIMAGE -- Convert an ELF file into a compatible binary file # MKIMAGE -- Convert an ELF file into a compatible binary file
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
define MKIMAGE
$(Q) echo "MKIMAGE: NuttX binary"
$(Q) if ! imgtool version 1>/dev/null 2>&1; then \
echo ""; \
echo "imgtool not found. Please run: \"pip install imgtool\""; \
echo ""; \
echo "Run make again to create the nuttx.bin image."; \
exit 1; \
fi
imgtool sign $(IMGTOOL_SIGN_ARGS) nuttx.hex nuttx.bin
$(Q) echo nuttx.bin >> nuttx.manifest
$(Q) echo "Generated: nuttx.bin (MCUboot compatible)"
endef
else
define MKIMAGE define MKIMAGE
$(Q) echo "MKIMAGE: NuttX binary" $(Q) echo "MKIMAGE: NuttX binary"
$(Q) if ! esptool.py version 1>/dev/null 2>&1; then \ $(Q) if ! esptool.py version 1>/dev/null 2>&1; then \
@ -117,6 +162,7 @@ define MKIMAGE
$(Q) echo nuttx.bin >> nuttx.manifest $(Q) echo nuttx.bin >> nuttx.manifest
$(Q) echo "Generated: nuttx.bin" $(Q) echo "Generated: nuttx.bin"
endef endef
endif
# POSTBUILD -- Perform post build operations # POSTBUILD -- Perform post build operations
@ -139,6 +185,6 @@ define FLASH
fi fi
$(eval ESPTOOL_OPTS := -c $(CHIP_SERIES) -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) $(if $(CONFIG_ESPRESSIF_ESPTOOLPY_NO_STUB),--no-stub)) $(eval ESPTOOL_OPTS := -c $(CHIP_SERIES) -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) $(if $(CONFIG_ESPRESSIF_ESPTOOLPY_NO_STUB),--no-stub))
$(eval WRITEFLASH_OPTS := $(if $(CONFIG_ESPRESSIF_MERGE_BINS),0x0 nuttx.merged.bin,$(if $(CONFIG_ESPRESSIF_FLASH_DETECT),-fs detect) -fm dio $(ESPTOOL_BINS))) $(eval WRITEFLASH_OPTS := $(if $(CONFIG_ESPRESSIF_MERGE_BINS),0x0 nuttx.merged.bin,$(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS)))
esptool.py $(ESPTOOL_OPTS) write_flash $(WRITEFLASH_OPTS) esptool.py $(ESPTOOL_OPTS) write_flash $(WRITEFLASH_OPTS)
endef endef

136
tools/espressif/build_mcuboot.sh Executable file
View File

@ -0,0 +1,136 @@
#!/usr/bin/env bash
SCRIPT_NAME=$(basename "${BASH_SOURCE[0]}")
usage() {
echo ""
echo "USAGE: ${SCRIPT_NAME} [-h] -c <chip> -f <config> -p <path> -e <hal>"
echo ""
echo "Where:"
echo " -c <chip> Target chip"
echo " -f <config> Path to file containing configuration options"
echo " -p <path> Path to execute the script"
echo " -e <hal> Path to HAL directory"
echo " -h Show usage and terminate"
echo ""
}
build_mcuboot() {
local target=${1}
local config=${2}
local mcuboot_dir="${exec_path}/mcuboot"
local build_dir=".build-${target}"
local source_dir="boot/espressif"
local output_dir="${exec_path}/out"
local toolchain_file="tools/toolchain-${target}.cmake"
local mcuboot_config
local mcuboot_flashsize
local mcuboot_flashmode
local mcuboot_flashfreq
local make_generator
mcuboot_config=$(realpath "${config:-${exec_path}/mcuboot.conf}")
# Try parsing Flash parameters from the mcuboot config file.
# If not found, let's assume some commonplace values.
mcuboot_flashsize=$(sed -n 's/^CONFIG_ESPTOOLPY_FLASHSIZE_\(.*\)MB=1/\1MB/p' "${mcuboot_config}")
if [ -z "${mcuboot_flashsize}" ]; then
mcuboot_flashsize="4MB"
fi
mcuboot_flashmode=$(sed -n 's/^CONFIG_ESPTOOLPY_FLASHMODE_\(.*\)=1/\L\1/p' "${mcuboot_config}")
if [ -z "${mcuboot_flashmode}" ]; then
mcuboot_flashmode="dio"
fi
mcuboot_flashfreq=$(sed -n 's/^CONFIG_ESPTOOLPY_FLASHFREQ_\(.*\)M=1/\1m/p' "${mcuboot_config}")
if [ -z "${mcuboot_flashfreq}" ]; then
mcuboot_flashfreq="40m"
fi
pushd "${exec_path}" &>/dev/null
mkdir -p "${output_dir}" &>/dev/null
# Build with Ninja if installed
if command -v ninja &>/dev/null; then
make_generator="-GNinja"
fi
# Build bootloader for selected target
cd "${mcuboot_dir}" &>/dev/null
cmake -DCMAKE_TOOLCHAIN_FILE="${toolchain_file}" \
-DMCUBOOT_TARGET="${target}" \
-DMCUBOOT_CONFIG_FILE="${mcuboot_config}" \
-DESP_HAL_PATH="${esp_hal}" \
-DCONFIG_ESP_FLASH_SIZE="${mcuboot_flashsize}" \
-DESP_FLASH_MODE="${mcuboot_flashmode}" \
-DESP_FLASH_FREQ="${mcuboot_flashfreq}" \
-B "${build_dir}" \
"${make_generator}" \
"${source_dir}"
cmake --build "${build_dir}"/
# Copy bootloader binary file to output directory
cp "${build_dir}"/mcuboot_"${target}".bin "${output_dir}"/mcuboot-"${target}".bin &>/dev/null
# Remove build directory
rm -rf "${build_dir}" &>/dev/null
popd &>/dev/null
}
while getopts ":hc:f:p:e:" arg; do
case "${arg}" in
c)
chip=${OPTARG}
;;
f)
config=${OPTARG}
;;
p)
exec_path=${OPTARG}
;;
e)
esp_hal=${OPTARG}
;;
h)
usage
exit 0
;;
*)
usage
exit 1
;;
esac
done
if [ -z "${chip}" ]; then
printf "ERROR: Missing target chip.\n"
usage
exit 1
fi
if ! [ -d "${esp_hal}" ]; then
printf "ERROR: Invalid HAL path.\n"
usage
exit 1
fi
if [ ! -d "${exec_path}" ]; then
printf "ERROR: Invalid exec path.\n"
usage
exit 1
fi
if [ -n "${config}" ] && [ ! -f "${config}" ]; then
printf "ERROR: Configuration file %s not found.\n" "${config}"
usage
exit 1
fi
build_mcuboot "${chip}" "${config}"