STM32 SDIO driver now build with DMA enabled
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4404 42af7a65-404d-4744-a932-0658087f49c3
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@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/arm/src/stm32/chip/stm32f10xxx_dma.h
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/arm/src/stm32/chip/stm32f40xxx_dma.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -1,8 +1,8 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_sdio.c
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -89,7 +89,13 @@
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#endif
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#ifndef CONFIG_SDIO_DMAPRIO
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# define CONFIG_SDIO_DMAPRIO DMA_CCR_PRIMED
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# if defined(CONFIG_STM32_STM32F10XX)
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# define CONFIG_SDIO_DMAPRIO DMA_CCR_PRIMED
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# elif defined(CONFIG_STM32_STM32F40XX)
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# define CONFIG_SDIO_DMAPRIO DMA_SCR_PRIMED
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# else
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# error "Unknown STM32 DMA"
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# endif
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#endif
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#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
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@ -105,7 +111,7 @@
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* be defined in the board-specific board.h header file: SDIO_INIT_CLKDIV,
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* SDIO_MMCXFR_CLKDIV, and SDIO_SDXFR_CLKDIV.
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*/
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#define STM32_CLCKCR_INIT (SDIO_INIT_CLKDIV|SDIO_CLKCR_RISINGEDGE|\
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SDIO_CLKCR_WIDBUS_D1)
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#define SDIO_CLKCR_MMCXFR (SDIO_MMCXFR_CLKDIV|SDIO_CLKCR_RISINGEDGE|\
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@ -124,13 +130,49 @@
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#define SDIO_DTIMER_DATATIMEOUT (0x000fffff)
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/* DMA CCR register settings */
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/* DMA channel/stream configuration register settings. The following
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* must be selected. The DMA driver will select the remaining fields.
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*
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* - 32-bit DMA
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* - Memory increment
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* - Direction (memory-to-peripheral, peripheral-to-memory)
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* - Memory burst size (F4 only)
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*/
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#define SDIO_RXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_CCR_MSIZE_32BITS|\
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/* STM32 F1 channel configuration register (CCR) settings */
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#if defined(CONFIG_STM32_STM32F10XX)
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# define SDIO_RXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_CCR_MSIZE_32BITS|\
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DMA_CCR_PSIZE_32BITS|DMA_CCR_MINC)
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#define SDIO_TXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_CCR_MSIZE_32BITS|\
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# define SDIO_TXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_CCR_MSIZE_32BITS|\
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DMA_CCR_PSIZE_32BITS|DMA_CCR_MINC|DMA_CCR_DIR)
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/* STM32 F4 stream configuration register (SCR) settings */
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#elif defined(CONFIG_STM32_STM32F40XX)
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# define SDIO_RXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_SCR_MSIZE_32BITS|\
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DMA_SCR_PSIZE_32BITS|DMA_SCR_MINC|DMA_SCR_DIR_P2M|\
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DMA_SCR_PBURST_SINGLE|DMA_SCR_PBURST_INCR8)
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# define SDIO_TXDMA32_CONFIG (CONFIG_SDIO_DMAPRIO|DMA_SCR_MSIZE_32BITS|\
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DMA_SCR_PSIZE_32BITS|DMA_SCR_MINC|DMA_SCR_DIR_M2P|\
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DMA_SCR_PBURST_SINGLE|DMA_SCR_PBURST_INCR8)
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#else
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# error "Unknown STM32 DMA"
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#endif
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/* SDIO DMA Channel/Stream selection. For the the case of the STM32 F4, there
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* are multiple DMA stream options that must be dis-ambiguated in the board.h
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* file.
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*/
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#if defined(CONFIG_STM32_STM32F10XX)
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# define SDIO_DMACHAN DMACHAN_SDIO
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#elif defined(CONFIG_STM32_STM32F40XX)
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# define SDIO_DMACHAN DMAMAP_SDIO
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#else
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# error "Unknown STM32 DMA"
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#endif
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/* FIFO sizes */
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#define SDIO_HALFFIFO_WORDS (8)
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@ -2617,7 +2659,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
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/* Allocate a DMA channel */
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#ifdef CONFIG_SDIO_DMA
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priv->dma = stm32_dmachannel(DMACHAN_SDIO);
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priv->dma = stm32_dmachannel(SDIO_DMACHAN);
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#endif
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/* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
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