arch/arm/src/stm32/stm32f40xxx_i2c.c: Correct some recent changes to STM32F4 I2C that broke poll mode of operation.
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@ -1273,7 +1273,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
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if (priv->dcnt == -1 && priv->msgc != 0 && (status & I2C_SR1_SB) == 0)
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if (priv->dcnt == -1 && priv->msgc != 0 && (status & I2C_SR1_SB) == 0)
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{
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{
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#ifdef CONFIG_STM32_I2C_DMA
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#if defined(CONFIG_STM32_I2C_DMA) || defined(CONFIG_I2C_POLLED)
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return OK;
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return OK;
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#else
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#else
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priv->status |= I2C_SR1_TIMEOUT;
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priv->status |= I2C_SR1_TIMEOUT;
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@ -2049,7 +2049,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
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/* Clear interrupt flags */
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/* Clear interrupt flags */
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#ifndef CONFIG_STM32_I2C_DMA
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#if !defined(CONFIG_STM32_I2C_DMA) && !defined(CONFIG_I2C_POLLED)
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state_error:
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state_error:
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#endif
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#endif
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stm32_i2c_putreg(priv, STM32_I2C_SR1_OFFSET, 0);
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stm32_i2c_putreg(priv, STM32_I2C_SR1_OFFSET, 0);
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