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Fix typos in comments and README.txt.

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No functional changes.
This commit is contained in:
Nathan Hartman 2020-01-15 11:05:36 -05:00 committed by patacongo
parent 58c3ee65e7
commit d1dd2841c5
10 changed files with 13 additions and 12 deletions
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2
arch/arm/src/imxrt/imxrt_lpspi.c
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@ -55,7 +55,7 @@
* mmcsd_lpspislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************c*******************************/
************************************************************************************/
/************************************************************************************
* Included Files

2
arch/arm/src/s32k1xx/s32k1xx_lpspi.c
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@ -55,7 +55,7 @@
* mmcsd_lpspislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************c*******************************/
************************************************************************************/
/************************************************************************************
* Included Files

2
arch/arm/src/sama5/sam_spi.c
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@ -191,7 +191,7 @@ typedef void (*select_t)(uint32_t devid, bool selected);
struct sam_spidev_s
{
uint32_t base; /* SPI controller register base address */
sem_t spisem; /* Assures mutually exclusive acess to SPI */
sem_t spisem; /* Assures mutually exclusive access to SPI */
select_t select; /* SPI select callout */
bool initialized; /* TRUE: Controller has been initialized */
#ifdef CONFIG_SAMA5_SPI_DMA

2
arch/arm/src/sama5/sam_ssc.c
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@ -452,7 +452,7 @@ struct sam_ssc_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
uintptr_t base; /* SSC controller register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SSC */
sem_t exclsem; /* Assures mutually exclusive access to SSC */
uint8_t datalen; /* Data width (8, 16, or 32) */
#ifdef CONFIG_DEBUG_FEATURES
uint8_t align; /* Log2 of data width (0, 1, or 3) */

2
arch/arm/src/samv7/sam_ssc.c
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@ -427,7 +427,7 @@ struct sam_ssc_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
uintptr_t base; /* SSC controller register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SSC */
sem_t exclsem; /* Assures mutually exclusive access to SSC */
uint8_t datalen; /* Data width (8, 16, or 32) */
#ifdef CONFIG_DEBUG_FEATURES
uint8_t align; /* Log2 of data width (0, 1, or 3) */

4
arch/arm/src/stm32/stm32_i2s.c
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@ -51,7 +51,7 @@
* 4. The handle returned by stm32_i2sdev_initialize() may then be used to
* bind the I2S driver to higher level logic
*
****************************************************c***********************/
****************************************************************************/
/****************************************************************************
* Included Files
@ -286,7 +286,7 @@ struct stm32_i2s_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
uintptr_t base; /* I2S controller register base address */
sem_t exclsem; /* Assures mutually exclusive acess to I2S */
sem_t exclsem; /* Assures mutually exclusive access to I2S */
bool initialized; /* Has I2S interface been initialized */
uint8_t datalen; /* Data width (8 or 16) */
#ifdef CONFIG_DEBUG_FEATURES

2
arch/arm/src/stm32f7/stm32_sai.c
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@ -206,7 +206,7 @@ struct stm32f7_sai_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
uintptr_t base; /* SAI block register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SAI */
sem_t exclsem; /* Assures mutually exclusive access to SAI */
uint32_t frequency; /* SAI clock frequency */
uint32_t syncen; /* Synchronization setting */
#ifdef CONFIG_STM32F7_SAI_DMA

2
arch/arm/src/stm32f7/stm32_spi.c
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@ -55,7 +55,7 @@
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************c*******************************/
************************************************************************************/
/************************************************************************************
* Included Files

2
arch/arm/src/stm32l4/stm32l4_sai.c
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@ -144,7 +144,7 @@ struct stm32l4_sai_s
{
struct i2s_dev_s dev; /* Externally visible I2S interface */
uintptr_t base; /* SAI block register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SAI */
sem_t exclsem; /* Assures mutually exclusive access to SAI */
uint32_t frequency; /* SAI clock frequency */
uint32_t syncen; /* Synchronization setting */
#ifdef CONFIG_STM32L4_SAI_DMA

5
boards/arm/cxd56xx/spresense/README.txt
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@ -25,7 +25,8 @@ Configuration sub-directories
smp
This is a configuration to run Spresense in SMP mode. To use this
configuration, bootloader for Spresense SDK 1.5.0 or later must be intalled.
configuration, bootloader for Spresense SDK 1.5.0 or later must be
installed.
wifi
@ -79,7 +80,7 @@ Configuration sub-directories
nsh> date
Jul 30 06:42:13 2019
(2) Acess Point (AP) mode
(2) Access Point (AP) mode
To run the module in AP mode, you need to specify SSID to advertise and
WEP-key. (NOTE: in AP mode, you can also specify channel number to use)