xtensa_panic.S: Save exception cause and vaddr into the user frame.
This area is what's passed later to assert and be used to dump the state. Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
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@ -128,6 +128,13 @@ _xtensa_panic:
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call0 _xtensa_context_save /* Save full register state */
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/* Save exception cause and vaddr into the user frame */
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rsr a0, EXCCAUSE
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s32i a0, sp, (4 * REG_EXCCAUSE)
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rsr a0, EXCVADDR
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s32i a0, sp, (4 * REG_EXCVADDR)
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/* Dispatch the sycall as with other interrupts. */
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mov a12, sp /* a12 = address of register save area */
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@ -138,13 +145,6 @@ _xtensa_panic:
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setintstack a13 a14
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#endif
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/* Save exc cause and vaddr into exception frame */
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rsr a0, EXCCAUSE
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s32i a0, sp, (4 * REG_EXCCAUSE)
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rsr a0, EXCVADDR
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s32i a0, sp, (4 * REG_EXCVADDR)
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/* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */
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#ifdef __XTENSA_CALL0_ABI__
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