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xtensa_panic.S: Save exception cause and vaddr into the user frame.

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This area is what's passed later to assert and be used to dump the
state.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2022-03-14 11:14:09 +01:00 committed by Xiang Xiao
parent a9e3b5ae37
commit d21d02c65d
1 changed files with 7 additions and 7 deletions
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14
arch/xtensa/src/common/xtensa_panic.S
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@ -128,6 +128,13 @@ _xtensa_panic:
call0 _xtensa_context_save /* Save full register state */ call0 _xtensa_context_save /* Save full register state */
/* Save exception cause and vaddr into the user frame */
rsr a0, EXCCAUSE
s32i a0, sp, (4 * REG_EXCCAUSE)
rsr a0, EXCVADDR
s32i a0, sp, (4 * REG_EXCVADDR)
/* Dispatch the sycall as with other interrupts. */ /* Dispatch the sycall as with other interrupts. */
mov a12, sp /* a12 = address of register save area */ mov a12, sp /* a12 = address of register save area */
@ -138,13 +145,6 @@ _xtensa_panic:
setintstack a13 a14 setintstack a13 a14
#endif #endif
/* Save exc cause and vaddr into exception frame */
rsr a0, EXCCAUSE
s32i a0, sp, (4 * REG_EXCCAUSE)
rsr a0, EXCVADDR
s32i a0, sp, (4 * REG_EXCVADDR)
/* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */ /* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__