arch/arm/src/max326xx/chip: Add MAX32660 pin multiplexing header files.
This commit is contained in:
Gregory Nutt
parent
8e18e8ae54
commit
d2da0be4ee
@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_flc.h
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* arch/arm/src/max326xx/chip/max32660_flc.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H
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/************************************************************************************
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* Included Files
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@ -111,4 +111,4 @@
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/* Flash Controller Data Register 2 (32-bit FLASH data) */
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/* Flash Controller Data Register 3 (32-bit FLASH data) */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_FLC_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_FLC_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_gpio.h
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* arch/arm/src/max326xx/chip/max32660_gpio.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H
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/************************************************************************************
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* Included Files
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@ -181,4 +181,4 @@
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* Resistor Select:
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* n=0-1, 4-7, 10-13: Pullup select */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_GPIO_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_GPIO_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_i2c.h
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* arch/arm/src/max326xx/chip/max32660_i2c.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H
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/************************************************************************************
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* Included Files
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@ -298,4 +298,4 @@
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#define I2C_DMA_TXEN (1 << 0) /* Bit 0: TX DMA Channel Enable */
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#define I2C_DMA_RXEN (1 << 1) /* Bit 1: RX DMA Channel Enable */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_I2C_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_I2C_H */
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134
arch/arm/src/max326xx/chip/max32660_pinmux.h
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134
arch/arm/src/max326xx/chip/max32660_pinmux.h
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@ -0,0 +1,134 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max32660_pinmux.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Alternate Pin Functions.
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*
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* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
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* Drivers, however, will use the pin selection without the numeric suffix.
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* Additional definitions are required in the board.h file. For example, if
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* UART1 RX connects vis P0.7 on some board, then the following definition should
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* appear in the board.h header file for that board:
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*
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* #define GPIO_UART1_RX GPIO_UART1_RX_2
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*
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* The driver will then automatically configure P0.7 as the UART1 RX pin.
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*/
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/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
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* Additional effort is required to select specific GPIO options such as frequency,
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* open-drain/push-pull, and pull-up/down! Just the basics are defined for most
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* pins in this file.
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*/
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/* 32KHz Clock Output */
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#define GPIO_32KCAL (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN2)
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/* I2C */
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#define GPIO_I2C0_SCL (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN8)
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#define GPIO_I2C0_SDA (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_I2C1_SCL (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN2)
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#define GPIO_I2C1_SDA (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN3)
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/* SPIMMS/I2S */
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#define GPIO_I2S_BCLK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN2)
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#define GPIO_I2S_BCLK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */
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#define GPIO_I2S_LRCLK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN3)
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#define GPIO_I2S_LRCLK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */
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#define GPIO_I2S_SDI_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN0)
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#define GPIO_I2S_SDI_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */
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#define GPIO_I2S_SDO_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN1)
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#define GPIO_I2S_SDO_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */
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/* SPI */
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#define GPIO_SPI0_MISO (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN4)
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#define GPIO_SPI0_MOSI (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN5)
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#define GPIO_SPI0_SCK (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN6)
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#define GPIO_SPI0_SS0 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN7)
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#define GPIO_SPI1_MISO_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN0)
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#define GPIO_SPI1_MISO_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */
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#define GPIO_SPI1_MOSI_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN1)
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#define GPIO_SPI1_MOSI_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */
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#define GPIO_SPI1_SCK_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN2)
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#define GPIO_SPI1_SCK_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */
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#define GPIO_SPI1_SS0_1 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN3)
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#define GPIO_SPI1_SS0_2 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */
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/* JTAG/SWD */
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#define GPIO_SWDCLK_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN1)
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#define GPIO_SWDCLK_2 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_SWDIO_1 (GPIO_ALT1 | GPIO_PORT0 | GPIO_PIN0)
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#define GPIO_SWDIO_2 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN8)
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/* Timer */
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#define GPIO_TMR0 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN3)
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/* UARTs */
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#define GPIO_UART0_CTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN6)
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#define GPIO_UART0_RTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN7)
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#define GPIO_UART0_RX (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN5)
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#define GPIO_UART0_TX (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN4)
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#define GPIO_UART1_CTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN12) /* 20-TQFN only */
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#define GPIO_UART1_RTS (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN13) /* 20-TQFN only */
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#define GPIO_UART1_RX_1 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN1)
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#define GPIO_UART1_RX_2 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN7)
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#define GPIO_UART1_RX_3 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN11) /* 20-TQFN only */
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#define GPIO_UART1_TX_1 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN0)
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#define GPIO_UART1_TX_2 (GPIO_ALT3 | GPIO_PORT0 | GPIO_PIN6)
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#define GPIO_UART1_TX_3 (GPIO_ALT2 | GPIO_PORT0 | GPIO_PIN10) /* 20-TQFN only */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_PINMUX_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_rtc.h
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* arch/arm/src/max326xx/chip/max32660_rtc.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H
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/************************************************************************************
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* Included Files
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@ -124,4 +124,4 @@
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#define RTC_OSCCTRL_BYPASS (1 << 4) /* Bit 4: RTC Crystal Bypass */
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#define RTC_OSCCTRL_32KOUT (1 << 5) /* Bit 5: RTC Square Wave Output */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_RTC_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_RTC_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_spi.h
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* arch/arm/src/max326xx/chip/max32660_spi.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H
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/************************************************************************************
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* Included Files
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@ -195,4 +195,4 @@
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#define SPI_STAT_BUSY (1 << 0) /* Bit 0: SPI Active Status */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPI_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPI_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_spimss.h
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* arch/arm/src/max326xx/chip/max32660_spimss.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H
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/************************************************************************************
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* Included Files
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@ -138,4 +138,4 @@
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#define SPIMSS_I2SCTRL_I2SMONO (1 << 3) /* Bit 3: I2S Monophonic Audio Mode */
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#define SPIMSS_I2SCTRL_I2SLJ (1 << 4) /* Bit 4: I2S Left Justify */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_SPIMSS_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_SPIMSS_H */
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_tmr.h
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* arch/arm/src/max326xx/chip/max32660_tmr.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H
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/************************************************************************************
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* Included Files
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@ -127,4 +127,4 @@
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#define TMR_CN_NOLLPOL (1 << 11) /* Bit 11: PWM Output phase A' Polarity */
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#define TMR_CN_PWMCKBD (1 << 12) /* Bit 12: PWM Output phase A' Disable */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_TMR_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_TMR_H */
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_uart.h
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* arch/arm/src/max326xx/chip/max32660_uart.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H
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/************************************************************************************
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* Included Files
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@ -193,4 +193,4 @@
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#define UART_TXFIFO_MASK (0xff) /* Bits 0-7: TX FIFO Data Output Peek Register */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_UART_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_UART_H */
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_wdt.h
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* arch/arm/src/max326xx/chip/max32660_wdt.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H
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#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H
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#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H
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/************************************************************************************
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* Included Files
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# define WDT0_RST_SEQ1 (0xa5 << WDT0_RST_SHIFT)
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# define WDT0_RST_SEQ2 (0x5a << WDT0_RST_SHIFT)
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_WDT_H */
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#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX32660_WDT_H */
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53
arch/arm/src/max326xx/chip/max326_pinmux.h
Normal file
53
arch/arm/src/max326xx/chip/max326_pinmux.h
Normal file
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/************************************************************************************
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* arch/arm/src/max326xx/chip/max326_pinmux.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H
|
||||
#define __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
|
||||
# include "chip/max32620_30_pinmux.h"
|
||||
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
|
||||
# include "chip/max32660_pinmux.h"
|
||||
#else
|
||||
# error "Unsupported MAX326XX family"
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_MAX326XX_CHIP_MAX326_PINMUX_H */
|
||||
@ -193,7 +193,7 @@ void __start(void)
|
||||
|
||||
__asm__ __volatile__ ("\tcpsid i\n");
|
||||
|
||||
/* Configure the clocking and the console uart so that we can get debug
|
||||
/* Configure the clocking and the console UART so that we can get debug
|
||||
* output as soon as possible. NOTE: That this logic must not assume that
|
||||
* .bss or .data have been initialized.
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user