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SAMA5 NAND: Still debugging

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This commit is contained in:
Gregory Nutt 2013-11-28 12:21:33 -06:00
parent ec3397dde6
commit d2eee4b7f0
5 changed files with 23 additions and 11 deletions
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4
arch/arm/src/sama5/sam_gf1024.c
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@ -48,7 +48,7 @@
#include "sam_pmecc.h" #include "sam_pmecc.h"
#ifndef CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES #if defined(CONFIG_SAMA5_HAVE_PMECC) && !defined(CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES)
/********************************************************************************************************************************** /**********************************************************************************************************************************
* Public Data * Public Data
@ -2116,4 +2116,4 @@ const uint16_t pmecc_gf_1024[2][PMECC_GF_SIZEOF_1024] =
} }
}; };
#endif /* CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES */ #endif /* CONFIG_SAMA5_HAVE_PMECC && !CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES */

4
arch/arm/src/sama5/sam_gf512.c
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@ -48,7 +48,7 @@
#include "sam_pmecc.h" #include "sam_pmecc.h"
#ifndef CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES #if defined(CONFIG_SAMA5_HAVE_PMECC) && !defined(CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES)
/********************************************************************************************************************************** /**********************************************************************************************************************************
* Public Data * Public Data
@ -1092,4 +1092,4 @@ const uint16_t pmecc_gf512[2][PMECC_GF_SIZEOF_512] =
} }
}; };
#endif /* CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES */ #endif /* CONFIG_SAMA5_HAVE_PMECC && !CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES */

14
arch/arm/src/sama5/sam_nand.c
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@ -1420,7 +1420,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
regval = nand_getreg(SAM_HSMC_PMECCTRL); regval = nand_getreg(SAM_HSMC_PMECCTRL);
regval |= HSMC_PMECCTRL_DATA; regval |= HSMC_PMECCTRL_DATA;
nand_putreg(SAM_HSMC_PMECCFG, regval); nand_putreg(SAM_HSMC_PMECCTRL, regval);
regval = nand_getreg(SAM_HSMC_PMECCEADDR); regval = nand_getreg(SAM_HSMC_PMECCEADDR);
ret = nand_read(priv, true, (uint8_t *)data, pagesize + (regval + 1)); ret = nand_read(priv, true, (uint8_t *)data, pagesize + (regval + 1));
@ -2612,7 +2612,9 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
{ {
/* Initialize the global nand state structure */ /* Initialize the global nand state structure */
#if NAND_NBANKS > 1
sem_init(&g_nand.exclsem, 0, 1); sem_init(&g_nand.exclsem, 0, 1);
#endif
sem_init(&g_nand.waitsem, 0, 0); sem_init(&g_nand.waitsem, 0, 0);
/* Enable the NAND FLASH Controller (The NFC is always used) */ /* Enable the NAND FLASH Controller (The NFC is always used) */
@ -2627,9 +2629,9 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
#else #else
/* Disable the PMECC if it is not being used */ /* Disable the PMECC if it is not being used */
nand_putreg(SAM_SMC_PMECCTRL, HSMC_PMECCTRL_RST); nand_putreg(SAM_HSMC_PMECCTRL, HSMC_PMECCTRL_RST);
nand_putreg(SAM_SMC_PMECCTRL, HSMC_PMECCTRL_DISABLE); nand_putreg(SAM_HSMC_PMECCTRL, HSMC_PMECCTRL_DISABLE);
nand_putreg(SAM_SMC_PMECCFG, 0); nand_putreg(SAM_HSMC_PMECCFG, 0);
#endif #endif
/* Attach the CAN interrupt handler */ /* Attach the CAN interrupt handler */
@ -2743,8 +2745,8 @@ bool nand_checkreg(bool wr, uintptr_t regaddr, uint32_t regval)
/* Save information about the new access */ /* Save information about the new access */
g_nand.wr = wr; g_nand.wr = wr;
g_nand.regval = regval; g_nand.regval = regval;
g_nand.regadddr = regaddr; g_nand.regadddr = regaddr;
g_nand.ntimes = 0; g_nand.ntimes = 0;
} }

4
arch/arm/src/sama5/sam_nand.h
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@ -268,11 +268,13 @@ struct sam_nandcs_s
struct sam_nand_s struct sam_nand_s
{ {
bool initialized; /* True: One time initialization is complete */ bool initialized; /* True: One time initialization is complete */
#if NAND_NBANKS > 1
sem_t exclsem; /* Enforce exclusive access to the SMC hardware */ sem_t exclsem; /* Enforce exclusive access to the SMC hardware */
#endif
/* Dynamic state */ /* Dynamic state */
volatile bool cmddone; /* True: NFC commnad has completed */ volatile bool cmddone; /* True: NFC command has completed */
volatile bool xfrdone; /* True: Transfer has completed */ volatile bool xfrdone; /* True: Transfer has completed */
volatile bool rbedge; /* True: Ready/busy edge detected */ volatile bool rbedge; /* True: Ready/busy edge detected */
sem_t waitsem; /* Used to wait for one of the above states */ sem_t waitsem; /* Used to wait for one of the above states */

8
arch/arm/src/sama5/sam_pmecc.c
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@ -60,6 +60,12 @@
#include "sam_pmecc.h" #include "sam_pmecc.h"
#include "sam_nand.h" #include "sam_nand.h"
/* Compile this logic only if there is at least one CS configure for NAND
* and with PMECC support enabled.
*/
#ifdef CONFIG_SAMA5_HAVE_PMECC
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
@ -1411,3 +1417,5 @@ void pmecc_buildgf(uint32_t mm, int16_t* indexof, int16_t* alphato)
indexof[0] = -1; indexof[0] = -1;
} }
#endif /* CONFIG_SAMA5_PMECC_GALOIS_CUSTOM */ #endif /* CONFIG_SAMA5_PMECC_GALOIS_CUSTOM */
#endif /* CONFIG_SAMA5_HAVE_PMECC */