s32k3xx:Serial add DMA
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f2de1ce930
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d33475d2d4
@ -1318,6 +1318,21 @@ config S32K3XX_LPUART_SINGLEWIRE
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bool "Signal Wire Support"
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default n
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config S32K3XX_SERIAL_RXDMA_BUFFER_SIZE
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int "RX DMA buffer size"
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default 64
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depends on LPUART0_RXDMA || LPUART1_RXDMA || LPUART2_RXDMA || LPUART3_RXDMA || \
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LPUART4_RXDMA || LPUART5_RXDMA || LPUART6_RXDMA || LPUART7_RXDMA || \
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LPUART8_RXDMA || LPUART9_RXDMA || LPUART10_RXDMA || LPUART11_RXDMA || \
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LPUART12_RXDMA || LPUART13_RXDMA ||LPUART14_RXDMA || LPUART15_RXDMA
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---help---
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The DMA buffer size when using RX DMA to emulate a FIFO.
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When streaming data, the generic serial layer will be called
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every time the FIFO receives half this number of bytes.
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Value given here will be rounded up to next multiple of 32 bytes.
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endmenu
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menu "Ethernet Configuration"
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@ -215,7 +215,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART1_RX);
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s32k3xx_pinconfig(PIN_LPUART1_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART1_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART1_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART1_RS485RTSCONTROL)) || \
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@ -232,7 +232,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART2_RX);
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s32k3xx_pinconfig(PIN_LPUART2_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART2_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART2_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART2_RS485RTSCONTROL)) || \
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@ -249,7 +249,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART3_RX);
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s32k3xx_pinconfig(PIN_LPUART3_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART3_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART3_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART3_RS485RTSCONTROL)) || \
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@ -266,7 +266,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART4_RX);
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s32k3xx_pinconfig(PIN_LPUART4_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART4_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART4_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART4_RS485RTSCONTROL)) || \
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@ -283,7 +283,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART5_RX);
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s32k3xx_pinconfig(PIN_LPUART5_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART5_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART5_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART5_RS485RTSCONTROL)) || \
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@ -300,7 +300,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART6_RX);
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s32k3xx_pinconfig(PIN_LPUART6_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART6_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART6_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART6_RS485RTSCONTROL)) || \
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@ -317,7 +317,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART7_RX);
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s32k3xx_pinconfig(PIN_LPUART7_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART7_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART7_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART7_RS485RTSCONTROL)) || \
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@ -334,7 +334,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART8_RX);
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s32k3xx_pinconfig(PIN_LPUART8_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART8_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART8_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART8_RS485RTSCONTROL)) || \
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@ -351,7 +351,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART9_RX);
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s32k3xx_pinconfig(PIN_LPUART9_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART9_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART9_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART9_RS485RTSCONTROL)) || \
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@ -368,7 +368,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART10_RX);
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s32k3xx_pinconfig(PIN_LPUART10_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART10_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART10_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART10_RS485RTSCONTROL)) || \
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@ -385,7 +385,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART11_RX);
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s32k3xx_pinconfig(PIN_LPUART11_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART11_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART11_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART11_RS485RTSCONTROL)) || \
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@ -402,7 +402,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART12_RX);
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s32k3xx_pinconfig(PIN_LPUART12_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART12_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART12_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART12_RS485RTSCONTROL)) || \
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@ -419,7 +419,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART13_RX);
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s32k3xx_pinconfig(PIN_LPUART13_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART13_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART13_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART13_RS485RTSCONTROL)) || \
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@ -436,7 +436,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART14_RX);
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s32k3xx_pinconfig(PIN_LPUART14_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART14_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART14_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART14_RS485RTSCONTROL)) || \
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@ -453,7 +453,7 @@ void s32k3xx_lowsetup(void)
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s32k3xx_pinconfig(PIN_LPUART15_RX);
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s32k3xx_pinconfig(PIN_LPUART15_TX);
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#ifdef CONFIG_LPUART0_OFLOWCONTROL
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#ifdef CONFIG_LPUART15_OFLOWCONTROL
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s32k3xx_pinconfig(PIN_LPUART15_CTS);
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#endif
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#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART15_RS485RTSCONTROL)) || \
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@ -641,14 +641,14 @@ int s32k3xx_lpuart_configure(uint32_t base,
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regval |= LPUART_CTRL_PE | LPUART_CTRL_PT_EVEN;
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}
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if (config->bits == 8)
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{
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regval &= ~LPUART_CTRL_M;
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}
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else if (config->bits == 9)
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if (config->bits == 9 || (config->bits == 8 && config->parity != 0))
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{
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regval |= LPUART_CTRL_M;
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}
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else if ((config->bits == 8))
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{
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regval &= ~LPUART_CTRL_M;
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}
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else
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{
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/* REVISIT: Here should be added support of other bit modes. */
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File diff suppressed because it is too large
Load Diff
@ -36,6 +36,347 @@
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_S32K3XX_LPUART0) || defined(CONFIG_S32K3XX_LPUART1) || \
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defined(CONFIG_S32K3XX_LPUART2) || defined(CONFIG_S32K3XX_LPUART3) || \
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defined(CONFIG_S32K3XX_LPUART3) || defined(CONFIG_S32K3XX_LPUART5) || \
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defined(CONFIG_S32K3XX_LPUART6) || defined(CONFIG_S32K3XX_LPUART7) || \
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defined(CONFIG_S32K3XX_LPUART8) || defined(CONFIG_S32K3XX_LPUART9) || \
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defined(CONFIG_S32K3XX_LPUART10) || defined(CONFIG_S32K3XX_LPUART11) || \
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defined(CONFIG_S32K3XX_LPUART12) || defined(CONFIG_S32K3XX_LPUART13) || \
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defined(CONFIG_S32K3XX_LPUART14) || defined(CONFIG_S32K3XX_LPUART15)
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# define HAVE_UART 1
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#endif
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/* Assume DMA is not used on the console UART */
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#undef SERIAL_HAVE_CONSOLE_RXDMA
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#undef SERIAL_HAVE_CONSOLE_TXDMA
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#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
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# undef CONFIG_LPUART0_RXDMA
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# undef CONFIG_LPUART0_TXDMA
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# undef CONFIG_LPUART1_RXDMA
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# undef CONFIG_LPUART1_TXDMA
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# undef CONFIG_LPUART2_RXDMA
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# undef CONFIG_LPUART2_TXDMA
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# undef CONFIG_LPUART3_RXDMA
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# undef CONFIG_LPUART3_TXDMA
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# undef CONFIG_LPUART4_RXDMA
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# undef CONFIG_LPUART4_TXDMA
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# undef CONFIG_LPUART5_RXDMA
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# undef CONFIG_LPUART5_TXDMA
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# undef CONFIG_LPUART6_RXDMA
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# undef CONFIG_LPUART6_TXDMA
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# undef CONFIG_LPUART7_RXDMA
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# undef CONFIG_LPUART7_TXDMA
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# undef CONFIG_LPUART8_RXDMA
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# undef CONFIG_LPUART8_TXDMA
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# undef CONFIG_LPUART9_RXDMA
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# undef CONFIG_LPUART9_TXDMA
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# undef CONFIG_LPUART10_RXDMA
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# undef CONFIG_LPUART10_TXDMA
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# undef CONFIG_LPUART11_RXDMA
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# undef CONFIG_LPUART11_TXDMA
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# undef CONFIG_LPUART12_RXDMA
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# undef CONFIG_LPUART12_TXDMA
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# undef CONFIG_LPUART13_RXDMA
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# undef CONFIG_LPUART13_TXDMA
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# undef CONFIG_LPUART14_RXDMA
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# undef CONFIG_LPUART14_TXDMA
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# undef CONFIG_LPUART15_RXDMA
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# undef CONFIG_LPUART15_TXDMA
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#endif
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/* Disable the DMA configuration on all unused LPUARTs */
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#ifndef CONFIG_S32K3XX_LPUART1
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# undef CONFIG_LPUART1_RXDMA
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# undef CONFIG_LPUART1_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART2
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# undef CONFIG_LPUART2_RXDMA
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# undef CONFIG_LPUART2_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART3
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# undef CONFIG_LPUART3_RXDMA
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# undef CONFIG_LPUART3_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART4
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# undef CONFIG_LPUART4_RXDMA
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# undef CONFIG_LPUART4_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART5
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# undef CONFIG_LPUART5_RXDMA
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# undef CONFIG_LPUART5_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART6
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# undef CONFIG_LPUART6_RXDMA
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# undef CONFIG_LPUART6_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART7
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# undef CONFIG_LPUART7_RXDMA
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# undef CONFIG_LPUART7_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART8
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# undef CONFIG_LPUART8_RXDMA
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# undef CONFIG_LPUART8_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART9
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# undef CONFIG_LPUART9_RXDMA
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# undef CONFIG_LPUART9_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART10
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# undef CONFIG_LPUART10_RXDMA
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# undef CONFIG_LPUART10_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART11
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# undef CONFIG_LPUART11_RXDMA
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# undef CONFIG_LPUART11_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART12
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# undef CONFIG_LPUART12_RXDMA
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# undef CONFIG_LPUART12_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART13
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# undef CONFIG_LPUART13_RXDMA
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# undef CONFIG_LPUART13_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART14
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# undef CONFIG_LPUART14_RXDMA
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# undef CONFIG_LPUART14_TXDMA
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#endif
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#ifndef CONFIG_S32K3XX_LPUART15
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# undef CONFIG_LPUART15_RXDMA
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# undef CONFIG_LPUART15_TXDMA
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#endif
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/* Is RX DMA available on any (enabled) LPUART? */
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#undef SERIAL_HAVE_RXDMA
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#if defined(CONFIG_LPUART0_RXDMA) || defined(CONFIG_LPUART1_RXDMA) || \
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defined(CONFIG_LPUART2_RXDMA) || defined(CONFIG_LPUART3_RXDMA) || \
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defined(CONFIG_LPUART3_RXDMA) || defined(CONFIG_LPUART5_RXDMA) || \
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defined(CONFIG_LPUART6_RXDMA) || defined(CONFIG_LPUART7_RXDMA) || \
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defined(CONFIG_LPUART8_RXDMA) || defined(CONFIG_LPUART9_RXDMA) || \
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defined(CONFIG_LPUART10_RXDMA) || defined(CONFIG_LPUART11_RXDMA) || \
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defined(CONFIG_LPUART12_RXDMA) || defined(CONFIG_LPUART13_RXDMA) || \
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defined(CONFIG_LPUART14_RXDMA) || defined(CONFIG_LPUART15_RXDMA)
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# define SERIAL_HAVE_RXDMA 1
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#endif
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/* Is TX DMA available on any (enabled) LPUART? */
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#undef SERIAL_HAVE_TXDMA
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#if defined(CONFIG_LPUART0_TXDMA) || defined(CONFIG_LPUART1_TXDMA) || \
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defined(CONFIG_LPUART2_TXDMA) || defined(CONFIG_LPUART3_TXDMA) || \
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defined(CONFIG_LPUART3_TXDMA) || defined(CONFIG_LPUART5_TXDMA) || \
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defined(CONFIG_LPUART6_TXDMA) || defined(CONFIG_LPUART7_TXDMA) || \
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defined(CONFIG_LPUART8_TXDMA) || defined(CONFIG_LPUART9_TXDMA) || \
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defined(CONFIG_LPUART10_TXDMA) || defined(CONFIG_LPUART11_TXDMA) || \
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defined(CONFIG_LPUART12_TXDMA) || defined(CONFIG_LPUART13_TXDMA) || \
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defined(CONFIG_LPUART14_TXDMA) || defined(CONFIG_LPUART15_TXDMA)
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# define SERIAL_HAVE_TXDMA 1
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#endif
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/* Is RX DMA used on all (enabled) LPUARTs */
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#define SERIAL_HAVE_ONLY_RXDMA 1
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#if defined(CONFIG_S32K3XX_LPUART0) && !defined(CONFIG_LPUART0_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART1) && !defined(CONFIG_LPUART1_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART2) && !defined(CONFIG_LPUART2_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART3) && !defined(CONFIG_LPUART3_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART4) && !defined(CONFIG_LPUART4_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART5) && !defined(CONFIG_LPUART5_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART6) && !defined(CONFIG_LPUART6_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART7) && !defined(CONFIG_LPUART7_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART8) && !defined(CONFIG_LPUART8_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART9) && !defined(CONFIG_LPUART9_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART10) && !defined(CONFIG_LPUART10_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART11) && !defined(CONFIG_LPUART11_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART12) && !defined(CONFIG_LPUART12_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART13) && !defined(CONFIG_LPUART13_RXDMA)
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# undef SERIAL_HAVE_ONLY_RXDMA
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#elif defined(CONFIG_S32K3XX_LPUART14) && !defined(CONFIG_LPUART14_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_RXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART15) && !defined(CONFIG_LPUART15_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_RXDMA
|
||||
#endif
|
||||
|
||||
/* Is TX DMA used on all (enabled) LPUARTs */
|
||||
|
||||
#define SERIAL_HAVE_ONLY_TXDMA 1
|
||||
#if defined(CONFIG_S32K3XX_LPUART0) && !defined(CONFIG_LPUART0_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART1) && !defined(CONFIG_LPUART1_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART2) && !defined(CONFIG_LPUART2_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART3) && !defined(CONFIG_LPUART3_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART4) && !defined(CONFIG_LPUART4_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART5) && !defined(CONFIG_LPUART5_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART6) && !defined(CONFIG_LPUART6_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART7) && !defined(CONFIG_LPUART7_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART8) && !defined(CONFIG_LPUART8_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART9) && !defined(CONFIG_LPUART9_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART10) && !defined(CONFIG_LPUART10_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART11) && !defined(CONFIG_LPUART11_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART12) && !defined(CONFIG_LPUART12_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART13) && !defined(CONFIG_LPUART13_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART14) && !defined(CONFIG_LPUART14_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#elif defined(CONFIG_S32K3XX_LPUART15) && !defined(CONFIG_LPUART15_TXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_TXDMA
|
||||
#endif
|
||||
|
||||
#undef SERIAL_HAVE_ONLY_DMA
|
||||
#if defined(SERIAL_HAVE_ONLY_RXDMA) && defined(SERIAL_HAVE_ONLY_TXDMA)
|
||||
#define SERIAL_HAVE_ONLY_DMA
|
||||
#endif
|
||||
|
||||
/* Verify that DMA has been enabled and the DMA channel has been defined.
|
||||
*/
|
||||
|
||||
# if defined(SERIAL_HAVE_TXDMA) || defined(SERIAL_HAVE_RXDMA)
|
||||
# ifndef CONFIG_S32K3XX_EDMA
|
||||
# error IMXRT LPUART receive or transmit DMA requires CONFIG_S32K3XX_EDMA
|
||||
# endif
|
||||
# endif
|
||||
|
||||
/* Verify that there are not 2 devices enabled on one DMAMUX input */
|
||||
|
||||
#if (defined(CONFIG_LPUART0_RXDMA) && defined(CONFIG_LPUART8_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART0_RXDMA and CONFIG_LPUART8_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART0_TXDMA) && defined(CONFIG_LPUART8_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART0_TXDMA and CONFIG_LPUART8_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART1_RXDMA) && defined(CONFIG_LPUART9_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART1_RXDMA and CONFIG_LPUART9_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART1_TXDMA) && defined(CONFIG_LPUART9_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART1_TXDMA and CONFIG_LPUART9_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART2_RXDMA) && defined(CONFIG_LPUART10_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART2_RXDMA and CONFIG_LPUART10_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART2_TXDMA) && defined(CONFIG_LPUART10_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART2_TXDMA and CONFIG_LPUART10_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART3_RXDMA) && defined(CONFIG_LPUART11_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART3_RXDMA and CONFIG_LPUART11_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART3_TXDMA) && defined(CONFIG_LPUART11_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART3_TXDMA and CONFIG_LPUART11_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART4_RXDMA) && defined(CONFIG_LPUART12_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART4_RXDMA and CONFIG_LPUART12_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART4_TXDMA) && defined(CONFIG_LPUART12_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART4_TXDMA and CONFIG_LPUART12_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART5_RXDMA) && defined(CONFIG_LPUART13_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART5_RXDMA and CONFIG_LPUART13_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART5_TXDMA) && defined(CONFIG_LPUART13_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART5_TXDMA and CONFIG_LPUART13_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART6_RXDMA) && defined(CONFIG_LPUART14_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART6_RXDMA and CONFIG_LPUART14_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART6_TXDMA) && defined(CONFIG_LPUART14_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART6_TXDMA and CONFIG_LPUART14_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART7_RXDMA) && defined(CONFIG_LPUART15_RXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART7_RXDMA and CONFIG_LPUART15_RXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if (defined(CONFIG_LPUART7_TXDMA) && defined(CONFIG_LPUART15_TXDMA))
|
||||
# error "DMA MUX conflict:CONFIG_LPUART7_TXDMA and CONFIG_LPUART15_TXDMA can not be set at the same time"
|
||||
#endif
|
||||
#if defined(SERIAL_HAVE_RXDMA)
|
||||
/* Currently RS-485 support cannot be enabled when RXDMA is in use due to
|
||||
* lack of testing.
|
||||
*/
|
||||
|
||||
# if (defined(CONFIG_LPUART0_RXDMA) && defined(CONFIG_LPUART0_RS485)) || \
|
||||
(defined(CONFIG_LPUART1_RXDMA) && defined(CONFIG_LPUART1_RS485)) || \
|
||||
(defined(CONFIG_LPUART2_RXDMA) && defined(CONFIG_LPUART2_RS485)) || \
|
||||
(defined(CONFIG_LPUART3_RXDMA) && defined(CONFIG_LPUART3_RS485)) || \
|
||||
(defined(CONFIG_LPUART4_RXDMA) && defined(CONFIG_LPUART4_RS485)) || \
|
||||
(defined(CONFIG_LPUART5_RXDMA) && defined(CONFIG_LPUART5_RS485)) || \
|
||||
(defined(CONFIG_LPUART6_RXDMA) && defined(CONFIG_LPUART6_RS485)) || \
|
||||
(defined(CONFIG_LPUART7_RXDMA) && defined(CONFIG_LPUART7_RS485)) || \
|
||||
(defined(CONFIG_LPUART8_RXDMA) && defined(CONFIG_LPUART8_RS485)) || \
|
||||
(defined(CONFIG_LPUART9_RXDMA) && defined(CONFIG_LPUART9_RS485)) || \
|
||||
(defined(CONFIG_LPUART10_RXDMA) && defined(CONFIG_LPUART10_RS485)) || \
|
||||
(defined(CONFIG_LPUART11_RXDMA) && defined(CONFIG_LPUART11_RS485)) || \
|
||||
(defined(CONFIG_LPUART12_RXDMA) && defined(CONFIG_LPUART12_RS485)) || \
|
||||
(defined(CONFIG_LPUART13_RXDMA) && defined(CONFIG_LPUART13_RS485)) || \
|
||||
(defined(CONFIG_LPUART14_RXDMA) && defined(CONFIG_LPUART14_RS485)) || \
|
||||
(defined(CONFIG_LPUART15_RXDMA) && defined(CONFIG_LPUART15_RS485))
|
||||
# error "RXDMA and RS-485 cannot be enabled at the same time for the same LPUART"
|
||||
# endif
|
||||
#endif /* SERIAL_HAVE_RXDMA */
|
||||
|
||||
/* Currently RS-485 support cannot be enabled when TXDMA is in use due to
|
||||
* lack of testing.
|
||||
*/
|
||||
|
||||
# if (defined(CONFIG_LPUART0_TXDMA) && defined(CONFIG_LPUART0_RS485)) || \
|
||||
(defined(CONFIG_LPUART1_TXDMA) && defined(CONFIG_LPUART1_RS485)) || \
|
||||
(defined(CONFIG_LPUART2_TXDMA) && defined(CONFIG_LPUART2_RS485)) || \
|
||||
(defined(CONFIG_LPUART3_TXDMA) && defined(CONFIG_LPUART3_RS485)) || \
|
||||
(defined(CONFIG_LPUART4_TXDMA) && defined(CONFIG_LPUART4_RS485)) || \
|
||||
(defined(CONFIG_LPUART5_TXDMA) && defined(CONFIG_LPUART5_RS485)) || \
|
||||
(defined(CONFIG_LPUART6_TXDMA) && defined(CONFIG_LPUART6_RS485)) || \
|
||||
(defined(CONFIG_LPUART7_TXDMA) && defined(CONFIG_LPUART7_RS485)) || \
|
||||
(defined(CONFIG_LPUART8_TXDMA) && defined(CONFIG_LPUART8_RS485)) || \
|
||||
(defined(CONFIG_LPUART9_TXDMA) && defined(CONFIG_LPUART9_RS485)) || \
|
||||
(defined(CONFIG_LPUART10_TXDMA) && defined(CONFIG_LPUART10_RS485)) || \
|
||||
(defined(CONFIG_LPUART11_TXDMA) && defined(CONFIG_LPUART11_RS485)) || \
|
||||
(defined(CONFIG_LPUART12_TXDMA) && defined(CONFIG_LPUART12_RS485)) || \
|
||||
(defined(CONFIG_LPUART13_TXDMA) && defined(CONFIG_LPUART13_RS485)) || \
|
||||
(defined(CONFIG_LPUART14_TXDMA) && defined(CONFIG_LPUART14_RS485)) || \
|
||||
(defined(CONFIG_LPUART15_TXDMA) && defined(CONFIG_LPUART15_RS485))
|
||||
# error "TXDMA and RS-485 cannot be enabled at the same time for the same LPUART"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
Loading…
Reference in New Issue
Block a user