s32k3xx:Serial add DMA

This commit is contained in:
David Sidrane 2022-12-16 06:52:44 -08:00 committed by Xiang Xiao
parent f2de1ce930
commit d33475d2d4
4 changed files with 3123 additions and 1231 deletions

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@ -1318,6 +1318,21 @@ config S32K3XX_LPUART_SINGLEWIRE
bool "Signal Wire Support"
default n
config S32K3XX_SERIAL_RXDMA_BUFFER_SIZE
int "RX DMA buffer size"
default 64
depends on LPUART0_RXDMA || LPUART1_RXDMA || LPUART2_RXDMA || LPUART3_RXDMA || \
LPUART4_RXDMA || LPUART5_RXDMA || LPUART6_RXDMA || LPUART7_RXDMA || \
LPUART8_RXDMA || LPUART9_RXDMA || LPUART10_RXDMA || LPUART11_RXDMA || \
LPUART12_RXDMA || LPUART13_RXDMA ||LPUART14_RXDMA || LPUART15_RXDMA
---help---
The DMA buffer size when using RX DMA to emulate a FIFO.
When streaming data, the generic serial layer will be called
every time the FIFO receives half this number of bytes.
Value given here will be rounded up to next multiple of 32 bytes.
endmenu
menu "Ethernet Configuration"

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@ -215,7 +215,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART1_RX);
s32k3xx_pinconfig(PIN_LPUART1_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART1_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART1_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART1_RS485RTSCONTROL)) || \
@ -232,7 +232,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART2_RX);
s32k3xx_pinconfig(PIN_LPUART2_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART2_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART2_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART2_RS485RTSCONTROL)) || \
@ -249,7 +249,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART3_RX);
s32k3xx_pinconfig(PIN_LPUART3_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART3_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART3_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART3_RS485RTSCONTROL)) || \
@ -266,7 +266,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART4_RX);
s32k3xx_pinconfig(PIN_LPUART4_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART4_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART4_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART4_RS485RTSCONTROL)) || \
@ -283,7 +283,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART5_RX);
s32k3xx_pinconfig(PIN_LPUART5_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART5_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART5_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART5_RS485RTSCONTROL)) || \
@ -300,7 +300,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART6_RX);
s32k3xx_pinconfig(PIN_LPUART6_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART6_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART6_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART6_RS485RTSCONTROL)) || \
@ -317,7 +317,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART7_RX);
s32k3xx_pinconfig(PIN_LPUART7_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART7_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART7_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART7_RS485RTSCONTROL)) || \
@ -334,7 +334,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART8_RX);
s32k3xx_pinconfig(PIN_LPUART8_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART8_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART8_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART8_RS485RTSCONTROL)) || \
@ -351,7 +351,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART9_RX);
s32k3xx_pinconfig(PIN_LPUART9_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART9_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART9_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART9_RS485RTSCONTROL)) || \
@ -368,7 +368,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART10_RX);
s32k3xx_pinconfig(PIN_LPUART10_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART10_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART10_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART10_RS485RTSCONTROL)) || \
@ -385,7 +385,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART11_RX);
s32k3xx_pinconfig(PIN_LPUART11_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART11_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART11_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART11_RS485RTSCONTROL)) || \
@ -402,7 +402,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART12_RX);
s32k3xx_pinconfig(PIN_LPUART12_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART12_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART12_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART12_RS485RTSCONTROL)) || \
@ -419,7 +419,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART13_RX);
s32k3xx_pinconfig(PIN_LPUART13_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART13_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART13_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART13_RS485RTSCONTROL)) || \
@ -436,7 +436,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART14_RX);
s32k3xx_pinconfig(PIN_LPUART14_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART14_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART14_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART14_RS485RTSCONTROL)) || \
@ -453,7 +453,7 @@ void s32k3xx_lowsetup(void)
s32k3xx_pinconfig(PIN_LPUART15_RX);
s32k3xx_pinconfig(PIN_LPUART15_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
#ifdef CONFIG_LPUART15_OFLOWCONTROL
s32k3xx_pinconfig(PIN_LPUART15_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART15_RS485RTSCONTROL)) || \
@ -641,14 +641,14 @@ int s32k3xx_lpuart_configure(uint32_t base,
regval |= LPUART_CTRL_PE | LPUART_CTRL_PT_EVEN;
}
if (config->bits == 8)
{
regval &= ~LPUART_CTRL_M;
}
else if (config->bits == 9)
if (config->bits == 9 || (config->bits == 8 && config->parity != 0))
{
regval |= LPUART_CTRL_M;
}
else if ((config->bits == 8))
{
regval &= ~LPUART_CTRL_M;
}
else
{
/* REVISIT: Here should be added support of other bit modes. */

File diff suppressed because it is too large Load Diff

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@ -36,6 +36,347 @@
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_S32K3XX_LPUART0) || defined(CONFIG_S32K3XX_LPUART1) || \
defined(CONFIG_S32K3XX_LPUART2) || defined(CONFIG_S32K3XX_LPUART3) || \
defined(CONFIG_S32K3XX_LPUART3) || defined(CONFIG_S32K3XX_LPUART5) || \
defined(CONFIG_S32K3XX_LPUART6) || defined(CONFIG_S32K3XX_LPUART7) || \
defined(CONFIG_S32K3XX_LPUART8) || defined(CONFIG_S32K3XX_LPUART9) || \
defined(CONFIG_S32K3XX_LPUART10) || defined(CONFIG_S32K3XX_LPUART11) || \
defined(CONFIG_S32K3XX_LPUART12) || defined(CONFIG_S32K3XX_LPUART13) || \
defined(CONFIG_S32K3XX_LPUART14) || defined(CONFIG_S32K3XX_LPUART15)
# define HAVE_UART 1
#endif
/* Assume DMA is not used on the console UART */
#undef SERIAL_HAVE_CONSOLE_RXDMA
#undef SERIAL_HAVE_CONSOLE_TXDMA
#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
# undef CONFIG_LPUART0_RXDMA
# undef CONFIG_LPUART0_TXDMA
# undef CONFIG_LPUART1_RXDMA
# undef CONFIG_LPUART1_TXDMA
# undef CONFIG_LPUART2_RXDMA
# undef CONFIG_LPUART2_TXDMA
# undef CONFIG_LPUART3_RXDMA
# undef CONFIG_LPUART3_TXDMA
# undef CONFIG_LPUART4_RXDMA
# undef CONFIG_LPUART4_TXDMA
# undef CONFIG_LPUART5_RXDMA
# undef CONFIG_LPUART5_TXDMA
# undef CONFIG_LPUART6_RXDMA
# undef CONFIG_LPUART6_TXDMA
# undef CONFIG_LPUART7_RXDMA
# undef CONFIG_LPUART7_TXDMA
# undef CONFIG_LPUART8_RXDMA
# undef CONFIG_LPUART8_TXDMA
# undef CONFIG_LPUART9_RXDMA
# undef CONFIG_LPUART9_TXDMA
# undef CONFIG_LPUART10_RXDMA
# undef CONFIG_LPUART10_TXDMA
# undef CONFIG_LPUART11_RXDMA
# undef CONFIG_LPUART11_TXDMA
# undef CONFIG_LPUART12_RXDMA
# undef CONFIG_LPUART12_TXDMA
# undef CONFIG_LPUART13_RXDMA
# undef CONFIG_LPUART13_TXDMA
# undef CONFIG_LPUART14_RXDMA
# undef CONFIG_LPUART14_TXDMA
# undef CONFIG_LPUART15_RXDMA
# undef CONFIG_LPUART15_TXDMA
#endif
/* Disable the DMA configuration on all unused LPUARTs */
#ifndef CONFIG_S32K3XX_LPUART1
# undef CONFIG_LPUART1_RXDMA
# undef CONFIG_LPUART1_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART2
# undef CONFIG_LPUART2_RXDMA
# undef CONFIG_LPUART2_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART3
# undef CONFIG_LPUART3_RXDMA
# undef CONFIG_LPUART3_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART4
# undef CONFIG_LPUART4_RXDMA
# undef CONFIG_LPUART4_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART5
# undef CONFIG_LPUART5_RXDMA
# undef CONFIG_LPUART5_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART6
# undef CONFIG_LPUART6_RXDMA
# undef CONFIG_LPUART6_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART7
# undef CONFIG_LPUART7_RXDMA
# undef CONFIG_LPUART7_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART8
# undef CONFIG_LPUART8_RXDMA
# undef CONFIG_LPUART8_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART9
# undef CONFIG_LPUART9_RXDMA
# undef CONFIG_LPUART9_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART10
# undef CONFIG_LPUART10_RXDMA
# undef CONFIG_LPUART10_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART11
# undef CONFIG_LPUART11_RXDMA
# undef CONFIG_LPUART11_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART12
# undef CONFIG_LPUART12_RXDMA
# undef CONFIG_LPUART12_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART13
# undef CONFIG_LPUART13_RXDMA
# undef CONFIG_LPUART13_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART14
# undef CONFIG_LPUART14_RXDMA
# undef CONFIG_LPUART14_TXDMA
#endif
#ifndef CONFIG_S32K3XX_LPUART15
# undef CONFIG_LPUART15_RXDMA
# undef CONFIG_LPUART15_TXDMA
#endif
/* Is RX DMA available on any (enabled) LPUART? */
#undef SERIAL_HAVE_RXDMA
#if defined(CONFIG_LPUART0_RXDMA) || defined(CONFIG_LPUART1_RXDMA) || \
defined(CONFIG_LPUART2_RXDMA) || defined(CONFIG_LPUART3_RXDMA) || \
defined(CONFIG_LPUART3_RXDMA) || defined(CONFIG_LPUART5_RXDMA) || \
defined(CONFIG_LPUART6_RXDMA) || defined(CONFIG_LPUART7_RXDMA) || \
defined(CONFIG_LPUART8_RXDMA) || defined(CONFIG_LPUART9_RXDMA) || \
defined(CONFIG_LPUART10_RXDMA) || defined(CONFIG_LPUART11_RXDMA) || \
defined(CONFIG_LPUART12_RXDMA) || defined(CONFIG_LPUART13_RXDMA) || \
defined(CONFIG_LPUART14_RXDMA) || defined(CONFIG_LPUART15_RXDMA)
# define SERIAL_HAVE_RXDMA 1
#endif
/* Is TX DMA available on any (enabled) LPUART? */
#undef SERIAL_HAVE_TXDMA
#if defined(CONFIG_LPUART0_TXDMA) || defined(CONFIG_LPUART1_TXDMA) || \
defined(CONFIG_LPUART2_TXDMA) || defined(CONFIG_LPUART3_TXDMA) || \
defined(CONFIG_LPUART3_TXDMA) || defined(CONFIG_LPUART5_TXDMA) || \
defined(CONFIG_LPUART6_TXDMA) || defined(CONFIG_LPUART7_TXDMA) || \
defined(CONFIG_LPUART8_TXDMA) || defined(CONFIG_LPUART9_TXDMA) || \
defined(CONFIG_LPUART10_TXDMA) || defined(CONFIG_LPUART11_TXDMA) || \
defined(CONFIG_LPUART12_TXDMA) || defined(CONFIG_LPUART13_TXDMA) || \
defined(CONFIG_LPUART14_TXDMA) || defined(CONFIG_LPUART15_TXDMA)
# define SERIAL_HAVE_TXDMA 1
#endif
/* Is RX DMA used on all (enabled) LPUARTs */
#define SERIAL_HAVE_ONLY_RXDMA 1
#if defined(CONFIG_S32K3XX_LPUART0) && !defined(CONFIG_LPUART0_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART1) && !defined(CONFIG_LPUART1_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART2) && !defined(CONFIG_LPUART2_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART3) && !defined(CONFIG_LPUART3_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART4) && !defined(CONFIG_LPUART4_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART5) && !defined(CONFIG_LPUART5_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART6) && !defined(CONFIG_LPUART6_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART7) && !defined(CONFIG_LPUART7_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART8) && !defined(CONFIG_LPUART8_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART9) && !defined(CONFIG_LPUART9_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART10) && !defined(CONFIG_LPUART10_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART11) && !defined(CONFIG_LPUART11_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART12) && !defined(CONFIG_LPUART12_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART13) && !defined(CONFIG_LPUART13_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART14) && !defined(CONFIG_LPUART14_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#elif defined(CONFIG_S32K3XX_LPUART15) && !defined(CONFIG_LPUART15_RXDMA)
# undef SERIAL_HAVE_ONLY_RXDMA
#endif
/* Is TX DMA used on all (enabled) LPUARTs */
#define SERIAL_HAVE_ONLY_TXDMA 1
#if defined(CONFIG_S32K3XX_LPUART0) && !defined(CONFIG_LPUART0_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART1) && !defined(CONFIG_LPUART1_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART2) && !defined(CONFIG_LPUART2_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART3) && !defined(CONFIG_LPUART3_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART4) && !defined(CONFIG_LPUART4_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART5) && !defined(CONFIG_LPUART5_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART6) && !defined(CONFIG_LPUART6_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART7) && !defined(CONFIG_LPUART7_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART8) && !defined(CONFIG_LPUART8_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART9) && !defined(CONFIG_LPUART9_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART10) && !defined(CONFIG_LPUART10_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART11) && !defined(CONFIG_LPUART11_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART12) && !defined(CONFIG_LPUART12_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART13) && !defined(CONFIG_LPUART13_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART14) && !defined(CONFIG_LPUART14_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#elif defined(CONFIG_S32K3XX_LPUART15) && !defined(CONFIG_LPUART15_TXDMA)
# undef SERIAL_HAVE_ONLY_TXDMA
#endif
#undef SERIAL_HAVE_ONLY_DMA
#if defined(SERIAL_HAVE_ONLY_RXDMA) && defined(SERIAL_HAVE_ONLY_TXDMA)
#define SERIAL_HAVE_ONLY_DMA
#endif
/* Verify that DMA has been enabled and the DMA channel has been defined.
*/
# if defined(SERIAL_HAVE_TXDMA) || defined(SERIAL_HAVE_RXDMA)
# ifndef CONFIG_S32K3XX_EDMA
# error IMXRT LPUART receive or transmit DMA requires CONFIG_S32K3XX_EDMA
# endif
# endif
/* Verify that there are not 2 devices enabled on one DMAMUX input */
#if (defined(CONFIG_LPUART0_RXDMA) && defined(CONFIG_LPUART8_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART0_RXDMA and CONFIG_LPUART8_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART0_TXDMA) && defined(CONFIG_LPUART8_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART0_TXDMA and CONFIG_LPUART8_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART1_RXDMA) && defined(CONFIG_LPUART9_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART1_RXDMA and CONFIG_LPUART9_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART1_TXDMA) && defined(CONFIG_LPUART9_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART1_TXDMA and CONFIG_LPUART9_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART2_RXDMA) && defined(CONFIG_LPUART10_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART2_RXDMA and CONFIG_LPUART10_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART2_TXDMA) && defined(CONFIG_LPUART10_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART2_TXDMA and CONFIG_LPUART10_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART3_RXDMA) && defined(CONFIG_LPUART11_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART3_RXDMA and CONFIG_LPUART11_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART3_TXDMA) && defined(CONFIG_LPUART11_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART3_TXDMA and CONFIG_LPUART11_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART4_RXDMA) && defined(CONFIG_LPUART12_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART4_RXDMA and CONFIG_LPUART12_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART4_TXDMA) && defined(CONFIG_LPUART12_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART4_TXDMA and CONFIG_LPUART12_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART5_RXDMA) && defined(CONFIG_LPUART13_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART5_RXDMA and CONFIG_LPUART13_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART5_TXDMA) && defined(CONFIG_LPUART13_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART5_TXDMA and CONFIG_LPUART13_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART6_RXDMA) && defined(CONFIG_LPUART14_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART6_RXDMA and CONFIG_LPUART14_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART6_TXDMA) && defined(CONFIG_LPUART14_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART6_TXDMA and CONFIG_LPUART14_TXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART7_RXDMA) && defined(CONFIG_LPUART15_RXDMA))
# error "DMA MUX conflict:CONFIG_LPUART7_RXDMA and CONFIG_LPUART15_RXDMA can not be set at the same time"
#endif
#if (defined(CONFIG_LPUART7_TXDMA) && defined(CONFIG_LPUART15_TXDMA))
# error "DMA MUX conflict:CONFIG_LPUART7_TXDMA and CONFIG_LPUART15_TXDMA can not be set at the same time"
#endif
#if defined(SERIAL_HAVE_RXDMA)
/* Currently RS-485 support cannot be enabled when RXDMA is in use due to
* lack of testing.
*/
# if (defined(CONFIG_LPUART0_RXDMA) && defined(CONFIG_LPUART0_RS485)) || \
(defined(CONFIG_LPUART1_RXDMA) && defined(CONFIG_LPUART1_RS485)) || \
(defined(CONFIG_LPUART2_RXDMA) && defined(CONFIG_LPUART2_RS485)) || \
(defined(CONFIG_LPUART3_RXDMA) && defined(CONFIG_LPUART3_RS485)) || \
(defined(CONFIG_LPUART4_RXDMA) && defined(CONFIG_LPUART4_RS485)) || \
(defined(CONFIG_LPUART5_RXDMA) && defined(CONFIG_LPUART5_RS485)) || \
(defined(CONFIG_LPUART6_RXDMA) && defined(CONFIG_LPUART6_RS485)) || \
(defined(CONFIG_LPUART7_RXDMA) && defined(CONFIG_LPUART7_RS485)) || \
(defined(CONFIG_LPUART8_RXDMA) && defined(CONFIG_LPUART8_RS485)) || \
(defined(CONFIG_LPUART9_RXDMA) && defined(CONFIG_LPUART9_RS485)) || \
(defined(CONFIG_LPUART10_RXDMA) && defined(CONFIG_LPUART10_RS485)) || \
(defined(CONFIG_LPUART11_RXDMA) && defined(CONFIG_LPUART11_RS485)) || \
(defined(CONFIG_LPUART12_RXDMA) && defined(CONFIG_LPUART12_RS485)) || \
(defined(CONFIG_LPUART13_RXDMA) && defined(CONFIG_LPUART13_RS485)) || \
(defined(CONFIG_LPUART14_RXDMA) && defined(CONFIG_LPUART14_RS485)) || \
(defined(CONFIG_LPUART15_RXDMA) && defined(CONFIG_LPUART15_RS485))
# error "RXDMA and RS-485 cannot be enabled at the same time for the same LPUART"
# endif
#endif /* SERIAL_HAVE_RXDMA */
/* Currently RS-485 support cannot be enabled when TXDMA is in use due to
* lack of testing.
*/
# if (defined(CONFIG_LPUART0_TXDMA) && defined(CONFIG_LPUART0_RS485)) || \
(defined(CONFIG_LPUART1_TXDMA) && defined(CONFIG_LPUART1_RS485)) || \
(defined(CONFIG_LPUART2_TXDMA) && defined(CONFIG_LPUART2_RS485)) || \
(defined(CONFIG_LPUART3_TXDMA) && defined(CONFIG_LPUART3_RS485)) || \
(defined(CONFIG_LPUART4_TXDMA) && defined(CONFIG_LPUART4_RS485)) || \
(defined(CONFIG_LPUART5_TXDMA) && defined(CONFIG_LPUART5_RS485)) || \
(defined(CONFIG_LPUART6_TXDMA) && defined(CONFIG_LPUART6_RS485)) || \
(defined(CONFIG_LPUART7_TXDMA) && defined(CONFIG_LPUART7_RS485)) || \
(defined(CONFIG_LPUART8_TXDMA) && defined(CONFIG_LPUART8_RS485)) || \
(defined(CONFIG_LPUART9_TXDMA) && defined(CONFIG_LPUART9_RS485)) || \
(defined(CONFIG_LPUART10_TXDMA) && defined(CONFIG_LPUART10_RS485)) || \
(defined(CONFIG_LPUART11_TXDMA) && defined(CONFIG_LPUART11_RS485)) || \
(defined(CONFIG_LPUART12_TXDMA) && defined(CONFIG_LPUART12_RS485)) || \
(defined(CONFIG_LPUART13_TXDMA) && defined(CONFIG_LPUART13_RS485)) || \
(defined(CONFIG_LPUART14_TXDMA) && defined(CONFIG_LPUART14_RS485)) || \
(defined(CONFIG_LPUART15_TXDMA) && defined(CONFIG_LPUART15_RS485))
# error "TXDMA and RS-485 cannot be enabled at the same time for the same LPUART"
#endif
/****************************************************************************
* Public Types
****************************************************************************/