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Xtensa/ESP32: Fix some compile issues related to new co-processor logic

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This commit is contained in:
Gregory Nutt 2016-10-29 10:27:46 -06:00
parent 365e753774
commit d346f25aae
12 changed files with 59 additions and 40 deletions
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6
arch/xtensa/Kconfig
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@ -45,9 +45,9 @@ config XTENSA_USE_OVLY
Enable code overlay support. This option is currently unsupported.
config XTENSA_CP_INITSET
bool "Default co-processor enables"
default 1
range 0 65535
hex "Default co-processor enables"
default 0x0001
range 0 0xffff
---help---
Co-processors may be enabled on a thread by calling xtensa_coproc_enable()
and disabled by calling xtensa_coproc_disable(). Some co-processors

3
arch/xtensa/include/irq.h
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@ -48,8 +48,11 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/types.h>
#include <arch/chip/tie.h>
#include <arch/chip/core-isa.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/xtensa/xtensa_corebits.h>
#include <arch/xtensa/xtensa_coproc.h>

8
arch/xtensa/include/xtensa/xtensa_coproc.h
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@ -38,7 +38,7 @@
* Included Files
****************************************************************************/
#include <arch/exp32/core-isa.h>
#include <arch/esp32/core-isa.h>
/****************************************************************************
* Pre-processor Definitions
@ -139,7 +139,11 @@ struct xtensa_cpstate_s
uint16_t cpenable; /* (2 bytes) Co-processors active for this thread */
uint16_t cpstored; /* (2 bytes) Co-processors saved for this thread */
uint32_t *cpasa; /* (4 bytes) Pointer to aligned save area */
}
};
/****************************************************************************
* Inline Functions
****************************************************************************/
/* Return the current value of the CPENABLE register */

2
arch/xtensa/src/common/xtensa.h
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@ -46,6 +46,7 @@
#endif
#include <arch/chip/core-isa.h>
#include <arch/chip/tie.h>
/****************************************************************************
* Pre-processor Definitions
@ -259,6 +260,7 @@ int xtensa_context_save(uint32_t *regs);
void xtensa_context_restore(uint32_t *regs) noreturn_function;
#if XCHAL_CP_NUM > 0
struct tcb_s;
void xtensa_coproc_savestate(struct tcb_s *tcb);
void xtensa_coproc_restorestate(struct tcb_s *tcb);
#endif

1
arch/xtensa/src/common/xtensa_context.S
View File

@ -62,6 +62,7 @@
#include <arch/irq.h>
#include <arch/chip/core-isa.h>
#include <arch/chip/tie.h>
#include <arch/xtensa/xtensa_specregs.h>
#warning REVIST XTENSA_EXTRA_SA_SIZE is not yet provided

38
arch/xtensa/src/common/xtensa_coproc.S
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@ -39,10 +39,12 @@
#include <nuttx/config.h>
#include <arch/chip/core-isa.h>
#include <arch/chip/tie-asm.h>
#include <arch/xtensa/core.h>
#include <arch/xtensa/xtensa_coproc.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/chip/core-isa.h>
#include <arch/chip/tie.h>
#include <arch/chip/tie-asm.h>
#if XCHAL_CP_NUM > 0
@ -120,7 +122,7 @@ _xtensa_coproc_savestate:
movi a13, _xtensa_coproc_saoffsets /* Array of CP save offsets */
l32i a15, a15, XTENSA_CPASA /* a15 = base of aligned save area */
#if XTENSA_CP0_SA_SIZE > 0
#if XCHAL_CP0_SA_SIZE > 0
bbci.l a2, 0, 2f /* CP 0 not enabled */
l32i a14, a13, 0 /* a14 = _xtensa_coproc_saoffsets[0] */
add a3, a14, a15 /* a3 = save area for CP 0 */
@ -128,7 +130,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP1_SA_SIZE > 0
#if XCHAL_CP1_SA_SIZE > 0
bbci.l a2, 1, 2f /* CP 1 not enabled */
l32i a14, a13, 4 /* a14 = _xtensa_coproc_saoffsets[1] */
add a3, a14, a15 /* a3 = save area for CP 1 */
@ -136,7 +138,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP2_SA_SIZE > 0
#if XCHAL_CP2_SA_SIZE > 0
bbci.l a2, 2, 2f
l32i a14, a13, 8
add a3, a14, a15
@ -144,7 +146,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP3_SA_SIZE > 0
#if XCHAL_CP3_SA_SIZE > 0
bbci.l a2, 3, 2f
l32i a14, a13, 12
add a3, a14, a15
@ -152,7 +154,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP4_SA_SIZE > 0
#if XCHAL_CP4_SA_SIZE > 0
bbci.l a2, 4, 2f
l32i a14, a13, 16
add a3, a14, a15
@ -160,7 +162,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP5_SA_SIZE > 0
#if XCHAL_CP5_SA_SIZE > 0
bbci.l a2, 5, 2f
l32i a14, a13, 20
add a3, a14, a15
@ -168,7 +170,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP6_SA_SIZE > 0
#if XCHAL_CP6_SA_SIZE > 0
bbci.l a2, 6, 2f
l32i a14, a13, 24
add a3, a14, a15
@ -176,7 +178,7 @@ _xtensa_coproc_savestate:
2:
#endif
#if XTENSA_CP7_SA_SIZE > 0
#if XCHAL_CP7_SA_SIZE > 0
bbci.l a2, 7, 2f
l32i a14, a13, 28
add a3, a14, a15
@ -236,7 +238,7 @@ _xtensa_coproc_restorestate:
movi a13, _xtensa_coproc_saoffsets /* Array of CP save offsets */
l32i a15, a15, XTENSA_CPASA /* a15 = base of aligned save area */
#if XTENSA_CP0_SA_SIZE
#if XCHAL_CP0_SA_SIZE
bbci.l a2, 0, 2f /* CP 0 not enabled */
l32i a14, a13, 0 /* a14 = _xtensa_coproc_saoffsets[0] */
add a3, a14, a15 /* a3 = save area for CP 0 */
@ -244,7 +246,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP1_SA_SIZE
#if XCHAL_CP1_SA_SIZE
bbci.l a2, 1, 2f /* CP 1 not enabled */
l32i a14, a13, 4 /* a14 = _xtensa_coproc_saoffsets[1] */
add a3, a14, a15 /* a3 = save area for CP 1 */
@ -252,7 +254,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP2_SA_SIZE
#if XCHAL_CP2_SA_SIZE
bbci.l a2, 2, 2f
l32i a14, a13, 8
add a3, a14, a15
@ -260,7 +262,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP3_SA_SIZE
#if XCHAL_CP3_SA_SIZE
bbci.l a2, 3, 2f
l32i a14, a13, 12
add a3, a14, a15
@ -268,7 +270,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP4_SA_SIZE
#if XCHAL_CP4_SA_SIZE
bbci.l a2, 4, 2f
l32i a14, a13, 16
add a3, a14, a15
@ -276,7 +278,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP5_SA_SIZE
#if XCHAL_CP5_SA_SIZE
bbci.l a2, 5, 2f
l32i a14, a13, 20
add a3, a14, a15
@ -284,7 +286,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP6_SA_SIZE
#if XCHAL_CP6_SA_SIZE
bbci.l a2, 6, 2f
l32i a14, a13, 24
add a3, a14, a15
@ -292,7 +294,7 @@ _xtensa_coproc_restorestate:
2:
#endif
#if XTENSA_CP7_SA_SIZE
#if XCHAL_CP7_SA_SIZE
bbci.l a2, 7, 2f
l32i a14, a13, 28
add a3, a14, a15

27
arch/xtensa/src/common/xtensa_cpsave.c
View File

@ -40,6 +40,8 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/sched.h>
#include <arch/xtensa/xtensa_coproc.h>
#include <arch/chip/core-isa.h>
@ -81,16 +83,16 @@
void xtensa_coproc_savestate(struct tcb_s *tcb)
{
uint32_t cpsave = (uint32_t)((uintptr_t)&tcp->xcp.cpsave);
uint32_t cpstate = (uint32_t)((uintptr_t)&tcb->xcp.cpstate);
__asm__ __volatile__
(
"mov a2, %0\n"
"call0 _xtensa_coproc_savestate\n"
:
: "r" (cpsave)
: "r" (cpstate)
: "a0", "a2", "a3", "a4", "a5", "a6", "a7", "a13", "a14", "a15"
)
);
}
/****************************************************************************
@ -122,17 +124,16 @@ void xtensa_coproc_savestate(struct tcb_s *tcb)
void xtensa_coproc_restorestate(struct tcb_s *tcb)
{
uint32_t cpsave = (uint32_t)((uintptr_t)&tcp->xcp.cpsave);
uint32_t cpstate = (uint32_t)((uintptr_t)&tcb->xcp.cpstate);
__asm__ __volatile__
(
"mov a2, %0\n"
"mov a3, %1\n"
"call0 _xtensa_coproc_restorestate\n"
:
: "r" (cpmask) "r" (cpsave)
: "r" (cpstate)
: "a0", "a2", "a3", "a4", "a5", "a6", "a7", "a13", "a14", "a15"
)
);
}
/****************************************************************************
@ -177,13 +178,13 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
cpenable = xtensa_get_cpenable();
cpenable |= cpset;
xtensa_put_cpenable(cpenable);
xtensa_set_cpenable(cpenable);
cpstate->cpenable = cpenable;
cpsates->cpstored &= ~cpset;
cpstate->cpstored &= ~cpset;
}
leave_critical_section();
leave_critical_section(flags);
}
/****************************************************************************
@ -228,13 +229,13 @@ void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset)
cpenable = xtensa_get_cpenable();
cpenable &= ~cpset;
xtensa_put_cpenable(cpenable);
xtensa_set_cpenable(cpenable);
cpstate->cpenable = cpenable;
cpsates->cpstored &= ~cpset;
cpstate->cpstored &= ~cpset;
}
leave_critical_section();
leave_critical_section(flags);
}

8
arch/xtensa/src/common/xtensa_createstack.c
View File

@ -49,6 +49,7 @@
#include <nuttx/board.h>
#include <arch/xtensa/xtensa_coproc.h>
#include <arch/chip/tie.h>
#include <arch/board/board.h>
#include "xtensa.h"
@ -115,9 +116,8 @@
int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
{
#if XCHAL_CP_NUM > 0
struct xcptcontext *xcp;
uintptr_t cpstart;
uintptr_t cpend;
size_t cpsize;
#endif
/* Is there already a stack allocated of a different size? Because of
@ -208,11 +208,13 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
* memory rather than using the stack.
*/
cpstart = (uintptr_t)_CP_ALIGNDOWN(top_of_stack - XCHAL_CP1_SA_ALIGN);
cpstart = (uintptr_t)_CP_ALIGNDOWN(XCHAL_CP0_SA_ALIGN,
top_of_stack - XCHAL_CP1_SA_ALIGN);
top_of_stack = cpstart;
/* Initialize the coprocessor save area (see xtensa_coproc.h) */
xcp = &tcb->xcp;
xcp->cpstate.cpenable = 0; /* No coprocessors active for this thread */
xcp->cpstate.cpstored = 0; /* No coprocessors saved for this thread */
xcp->cpstate.cpasa = (uint32_t *)cpstart; /* Start of aligned save area */

3
arch/xtensa/src/common/xtensa_initialstate.c
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@ -48,6 +48,7 @@
#include <arch/xtensa/core.h>
#include <arch/chip/core-isa.h>
#include <arch/xtensa/xtensa_corebits.h>
#include <arch/xtensa/xtensa_coproc.h>
#include "xtensa.h"
@ -100,7 +101,7 @@ void up_initial_state(struct tcb_s *tcb)
* starts (see xtensa_coproc.h)
*/
xcp->cpstate.cpenable = CONFIG_XTENSA_CP_INITSET;
xcp->cpstate.cpenable = (CONFIG_XTENSA_CP_INITSET & XTENSA_CP_ALLSET);
xcp->cpstate.cpstored = 0; /* No coprocessors haved statee saved for this thread */
#endif
}

1
arch/xtensa/src/common/xtensa_irqdispatch.c
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@ -51,6 +51,7 @@
#include "xtensa.h"
#include "group/group.h"
#include "sched/sched.h"
/****************************************************************************
* Public Functions

1
arch/xtensa/src/esp32/esp32_intdecode.c
View File

@ -39,6 +39,7 @@
#include <nuttx/config.h>
#include <nuttx/sched.h>
#include <arch/chip/irq.h>
#include "chip/esp32_dport.h"

1
configs/esp32-core/nsh/defconfig
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@ -77,6 +77,7 @@ CONFIG_ARCH_CHIP_ESP32=y
CONFIG_ARCH_FAMILY_LX6=y
CONFIG_XTENSA_CALL0_ABI=y
# CONFIG_XTENSA_USE_OVLY is not set
CONFIG_XTENSA_CP_INITSET=0x0001
CONFIG_ESP32_UART=y
# CONFIG_ESP32_SPI2 is not set
# CONFIG_XTENSA_TIMER1 is not set